/home/daniel/Projects/java/jdk/build/linux-x86_64-server-fastdebug/hotspot/variant-server/gensrc/adfiles/ad

Bug Summary

File:	jdk/build/linux-x86_64-server-fastdebug/hotspot/variant-server/gensrc/adfiles/ad_x86.cpp
Warning:	line 113, column 51 Called C++ object pointer is null
Annotated Source Code

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clang -cc1 -triple x86_64-pc-linux-gnu -analyze -disable-free -disable-llvm-verifier -discard-value-names -main-file-name ad_x86.cpp -analyzer-store=region -analyzer-opt-analyze-nested-blocks -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model pic -pic-level 2 -mthread-model posix -fno-delete-null-pointer-checks -mframe-pointer=all -relaxed-aliasing -fmath-errno -fno-rounding-math -masm-verbose -mconstructor-aliases -munwind-tables -target-cpu x86-64 -dwarf-column-info -fno-split-dwarf-inlining -debugger-tuning=gdb -resource-dir /usr/lib/llvm-10/lib/clang/10.0.0 -I /home/daniel/Projects/java/jdk/build/linux-x86_64-server-fastdebug/hotspot/variant-server/libjvm/objs/precompiled -D __STDC_FORMAT_MACROS -D __STDC_LIMIT_MACROS -D __STDC_CONSTANT_MACROS -D _GNU_SOURCE -D _REENTRANT -D LIBC=gnu -D LINUX -D VM_LITTLE_ENDIAN -D _LP64=1 -D ASSERT -D CHECK_UNHANDLED_OOPS -D TARGET_ARCH_x86 -D INCLUDE_SUFFIX_OS=_linux -D INCLUDE_SUFFIX_CPU=_x86 -D INCLUDE_SUFFIX_COMPILER=_gcc -D TARGET_COMPILER_gcc -D AMD64 -D HOTSPOT_LIB_ARCH="amd64" -D COMPILER1 -D COMPILER2 -I /home/daniel/Projects/java/jdk/build/linux-x86_64-server-fastdebug/hotspot/variant-server/gensrc/adfiles -I /home/daniel/Projects/java/jdk/src/hotspot/share -I /home/daniel/Projects/java/jdk/src/hotspot/os/linux -I /home/daniel/Projects/java/jdk/src/hotspot/os/posix -I /home/daniel/Projects/java/jdk/src/hotspot/cpu/x86 -I /home/daniel/Projects/java/jdk/src/hotspot/os_cpu/linux_x86 -I /home/daniel/Projects/java/jdk/build/linux-x86_64-server-fastdebug/hotspot/variant-server/gensrc -I /home/daniel/Projects/java/jdk/src/hotspot/share/precompiled -I /home/daniel/Projects/java/jdk/src/hotspot/share/include -I /home/daniel/Projects/java/jdk/src/hotspot/os/posix/include -I /home/daniel/Projects/java/jdk/build/linux-x86_64-server-fastdebug/support/modules_include/java.base -I /home/daniel/Projects/java/jdk/build/linux-x86_64-server-fastdebug/support/modules_include/java.base/linux -I /home/daniel/Projects/java/jdk/src/java.base/share/native/libjimage -I /home/daniel/Projects/java/jdk/build/linux-x86_64-server-fastdebug/hotspot/variant-server/gensrc/adfiles -I /home/daniel/Projects/java/jdk/src/hotspot/share -I /home/daniel/Projects/java/jdk/src/hotspot/os/linux -I /home/daniel/Projects/java/jdk/src/hotspot/os/posix -I /home/daniel/Projects/java/jdk/src/hotspot/cpu/x86 -I /home/daniel/Projects/java/jdk/src/hotspot/os_cpu/linux_x86 -I /home/daniel/Projects/java/jdk/build/linux-x86_64-server-fastdebug/hotspot/variant-server/gensrc -D _FORTIFY_SOURCE=2 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.5.0/../../../../include/c++/7.5.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.5.0/../../../../include/x86_64-linux-gnu/c++/7.5.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.5.0/../../../../include/x86_64-linux-gnu/c++/7.5.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/7.5.0/../../../../include/c++/7.5.0/backward -internal-isystem /usr/local/include -internal-isystem /usr/lib/llvm-10/lib/clang/10.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O3 -Wno-format-zero-length -Wno-unused-parameter -Wno-unused -Wno-parentheses -Wno-comment -Wno-unknown-pragmas -Wno-address -Wno-delete-non-virtual-dtor -Wno-char-subscripts -Wno-array-bounds -Wno-int-in-bool-context -Wno-ignored-qualifiers -Wno-missing-field-initializers -Wno-implicit-fallthrough -Wno-empty-body -Wno-strict-overflow -Wno-sequence-point -Wno-maybe-uninitialized -Wno-misleading-indentation -Wno-cast-function-type -Wno-shift-negative-value -Wno-nonnull -std=c++14 -fdeprecated-macro -fdebug-compilation-dir /home/daniel/Projects/java/jdk/make/hotspot -ferror-limit 19 -fmessage-length 0 -fvisibility hidden -stack-protector 1 -fno-rtti -fgnuc-version=4.2.1 -fobjc-runtime=gcc -fdiagnostics-show-option -vectorize-loops -vectorize-slp -analyzer-output=html -faddrsig -o /home/daniel/Projects/java/scan/2021-12-21-193737-8510-1 -x c++ /home/daniel/Projects/java/jdk/build/linux-x86_64-server-fastdebug/hotspot/variant-server/gensrc/adfiles/ad_x86.cpp
1#line 1 "ad_x86.cpp"
2//
3// Copyright (c) 2003, 2021, Oracle and/or its affiliates. All rights reserved.
4// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5//
6// This code is free software; you can redistribute it and/or modify it
7// under the terms of the GNU General Public License version 2 only, as
8// published by the Free Software Foundation.
9//
10// This code is distributed in the hope that it will be useful, but WITHOUT
11// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13// version 2 for more details (a copy is included in the LICENSE file that
14// accompanied this code).
15//
16// You should have received a copy of the GNU General Public License version
17// 2 along with this work; if not, write to the Free Software Foundation,
18// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19//
20// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21// or visit www.oracle.com if you need additional information or have any
22// questions.
23//
24//

26// Machine Generated File.  Do Not Edit!

28#include "precompiled.hpp"
29#include "adfiles/adGlobals_x86.hpp"
30#include "adfiles/ad_x86.hpp"
31#include "memory/allocation.inline.hpp"
32#include "code/codeCache.hpp"
33#include "code/compiledIC.hpp"
34#include "code/nativeInst.hpp"
35#include "code/vmreg.inline.hpp"
36#include "gc/shared/collectedHeap.inline.hpp"
37#include "oops/compiledICHolder.hpp"
38#include "oops/compressedOops.hpp"
39#include "oops/markWord.hpp"
40#include "oops/method.hpp"
41#include "oops/oop.inline.hpp"
42#include "opto/c2_MacroAssembler.hpp"
43#include "opto/cfgnode.hpp"
44#include "opto/intrinsicnode.hpp"
45#include "opto/locknode.hpp"
46#include "opto/opcodes.hpp"
47#include "opto/regalloc.hpp"
48#include "opto/regmask.hpp"
49#include "opto/runtime.hpp"
50#include "runtime/safepointMechanism.hpp"
51#include "runtime/sharedRuntime.hpp"
52#include "runtime/stubRoutines.hpp"
53#include "utilities/growableArray.hpp"
54#include "utilities/powerOfTwo.hpp"

56//SourceForm

58#line 337 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

60#define   RELOC_IMM64Assembler::imm_operand    Assembler::imm_operand
61#define   RELOC_DISP32Assembler::disp32_operand   Assembler::disp32_operand

63#define ___masm. _masm.

65RegMask _ANY_REG_mask;
66RegMask _PTR_REG_mask;
67RegMask _PTR_REG_NO_RBP_mask;
68RegMask _PTR_NO_RAX_REG_mask;
69RegMask _PTR_NO_RAX_RBX_REG_mask;
70RegMask _LONG_REG_mask;
71RegMask _LONG_NO_RAX_RDX_REG_mask;
72RegMask _LONG_NO_RCX_REG_mask;
73RegMask _INT_REG_mask;
74RegMask _INT_NO_RAX_RDX_REG_mask;
75RegMask _INT_NO_RCX_REG_mask;
76RegMask _FLOAT_REG_mask;
77RegMask _STACK_OR_PTR_REG_mask;
78RegMask _STACK_OR_LONG_REG_mask;
79RegMask _STACK_OR_INT_REG_mask;

81static bool need_r12_heapbase() {
return UseCompressedOops;
83}

85void reg_mask_init() {
// _ALL_REG_mask is generated by adlc from the all_reg register class below.
// We derive a number of subsets from it.
_ANY_REG_mask = _ALL_REG_mask;

if (PreserveFramePointer) {
1
Assuming 'PreserveFramePointer' is false→
2
←
Taking false branch→
  _ANY_REG_mask.Remove(OptoReg::as_OptoReg(rbp->as_VMReg()));
  _ANY_REG_mask.Remove(OptoReg::as_OptoReg(rbp->as_VMReg()->next()));
}
if (need_r12_heapbase()) {
3
←
Assuming the condition is false→
4
←
Taking false branch→
  _ANY_REG_mask.Remove(OptoReg::as_OptoReg(r12->as_VMReg()));
  _ANY_REG_mask.Remove(OptoReg::as_OptoReg(r12->as_VMReg()->next()));
}

_PTR_REG_mask = _ANY_REG_mask;
_PTR_REG_mask.Remove(OptoReg::as_OptoReg(rsp->as_VMReg()));
_PTR_REG_mask.Remove(OptoReg::as_OptoReg(rsp->as_VMReg()->next()));
_PTR_REG_mask.Remove(OptoReg::as_OptoReg(r15->as_VMReg()));
_PTR_REG_mask.Remove(OptoReg::as_OptoReg(r15->as_VMReg()->next()));

_STACK_OR_PTR_REG_mask = _PTR_REG_mask;
_STACK_OR_PTR_REG_mask.OR(STACK_OR_STACK_SLOTS_mask());

_PTR_REG_NO_RBP_mask = _PTR_REG_mask;
_PTR_REG_NO_RBP_mask.Remove(OptoReg::as_OptoReg(rbp->as_VMReg()));
_PTR_REG_NO_RBP_mask.Remove(OptoReg::as_OptoReg(rbp->as_VMReg()->next()));

_PTR_NO_RAX_REG_mask = _PTR_REG_mask;
_PTR_NO_RAX_REG_mask.Remove(OptoReg::as_OptoReg(rax->as_VMReg()));
5
←
Called C++ object pointer is null
_PTR_NO_RAX_REG_mask.Remove(OptoReg::as_OptoReg(rax->as_VMReg()->next()));

_PTR_NO_RAX_RBX_REG_mask = _PTR_NO_RAX_REG_mask;
_PTR_NO_RAX_RBX_REG_mask.Remove(OptoReg::as_OptoReg(rbx->as_VMReg()));
_PTR_NO_RAX_RBX_REG_mask.Remove(OptoReg::as_OptoReg(rbx->as_VMReg()->next()));

_LONG_REG_mask = _PTR_REG_mask;
_STACK_OR_LONG_REG_mask = _LONG_REG_mask;
_STACK_OR_LONG_REG_mask.OR(STACK_OR_STACK_SLOTS_mask());

_LONG_NO_RAX_RDX_REG_mask = _LONG_REG_mask;
_LONG_NO_RAX_RDX_REG_mask.Remove(OptoReg::as_OptoReg(rax->as_VMReg()));
_LONG_NO_RAX_RDX_REG_mask.Remove(OptoReg::as_OptoReg(rax->as_VMReg()->next()));
_LONG_NO_RAX_RDX_REG_mask.Remove(OptoReg::as_OptoReg(rdx->as_VMReg()));
_LONG_NO_RAX_RDX_REG_mask.Remove(OptoReg::as_OptoReg(rdx->as_VMReg()->next()));

_LONG_NO_RCX_REG_mask = _LONG_REG_mask;
_LONG_NO_RCX_REG_mask.Remove(OptoReg::as_OptoReg(rcx->as_VMReg()));
_LONG_NO_RCX_REG_mask.Remove(OptoReg::as_OptoReg(rcx->as_VMReg()->next()));

_INT_REG_mask = _ALL_INT_REG_mask;
if (PreserveFramePointer) {
  _INT_REG_mask.Remove(OptoReg::as_OptoReg(rbp->as_VMReg()));
}
if (need_r12_heapbase()) {
  _INT_REG_mask.Remove(OptoReg::as_OptoReg(r12->as_VMReg()));
}

_STACK_OR_INT_REG_mask = _INT_REG_mask;
_STACK_OR_INT_REG_mask.OR(STACK_OR_STACK_SLOTS_mask());

_INT_NO_RAX_RDX_REG_mask = _INT_REG_mask;
_INT_NO_RAX_RDX_REG_mask.Remove(OptoReg::as_OptoReg(rax->as_VMReg()));
_INT_NO_RAX_RDX_REG_mask.Remove(OptoReg::as_OptoReg(rdx->as_VMReg()));

_INT_NO_RCX_REG_mask = _INT_REG_mask;
_INT_NO_RCX_REG_mask.Remove(OptoReg::as_OptoReg(rcx->as_VMReg()));

// _FLOAT_REG_LEGACY_mask/_FLOAT_REG_EVEX_mask is generated by adlc
// from the float_reg_legacy/float_reg_evex register class.
_FLOAT_REG_mask = VM_Version::supports_evex() ? _FLOAT_REG_EVEX_mask : _FLOAT_REG_LEGACY_mask;

if (Matcher::has_predicated_vectors()) {
  // Post-loop multi-versioning expects mask to be present in K1 register, till the time
  // its fixed, RA should not be allocting K1 register, this shall prevent any accidental
  // curruption of value held in K1 register.
  if (PostLoopMultiversioning) {
    const_cast<RegMask*>(&_VECTMASK_REG_mask)->Remove(OptoReg::as_OptoReg(k1->as_VMReg()));
    const_cast<RegMask*>(&_VECTMASK_REG_mask)->Remove(OptoReg::as_OptoReg(k1->as_VMReg()->next()));
  }
}
165}

167static bool generate_vzeroupper(Compile* C) {
return (VM_Version::supports_vzeroupper() && (C->max_vector_size() > 16 || C->clear_upper_avx() == true)) ? true: false;  // Generate vzeroupper
169}

171static int clear_avx_size() {
return generate_vzeroupper(Compile::current()) ? 3: 0;  // vzeroupper
173}

175// !!!!! Special hack to get all types of calls to specify the byte offset
176//       from the start of the call to the point where the return address
177//       will point.
178int MachCallStaticJavaNode::ret_addr_offset()
179{
int offset = 5; // 5 bytes from start of call to where return address points
offset += clear_avx_size();
return offset;
183}

185int MachCallDynamicJavaNode::ret_addr_offset()
186{
int offset = 15; // 15 bytes from start of call to where return address points
offset += clear_avx_size();
return offset;
190}

192int MachCallRuntimeNode::ret_addr_offset() {
int offset = 13; // movq r10,#addr; callq (r10)
if (this->ideal_Opcode() != Op_CallLeafVector) {
  offset += clear_avx_size();
}
return offset;
198}

200int MachCallNativeNode::ret_addr_offset() {
int offset = 13; // movq r10,#addr; callq (r10)
offset += clear_avx_size();
return offset;
204}
205//
206// Compute padding required for nodes which need alignment
207//

209// The address of the call instruction needs to be 4-byte aligned to
210// ensure that it does not span a cache line so that it can be patched.
211int CallStaticJavaDirectNode::compute_padding(int current_offset) const
212{
current_offset += clear_avx_size(); // skip vzeroupper
current_offset += 1; // skip call opcode byte
return align_up(current_offset, alignment_required()) - current_offset;
216}

218// The address of the call instruction needs to be 4-byte aligned to
219// ensure that it does not span a cache line so that it can be patched.
220int CallDynamicJavaDirectNode::compute_padding(int current_offset) const
221{
current_offset += clear_avx_size(); // skip vzeroupper
current_offset += 11; // skip movq instruction + call opcode byte
return align_up(current_offset, alignment_required()) - current_offset;
225}

227// EMIT_RM()
228void emit_rm(CodeBuffer &cbuf, int f1, int f2, int f3) {
unsigned char c = (unsigned char) ((f1 << 6) | (f2 << 3) | f3);
cbuf.insts()->emit_int8(c);
231}

233// EMIT_CC()
234void emit_cc(CodeBuffer &cbuf, int f1, int f2) {
unsigned char c = (unsigned char) (f1 | f2);
cbuf.insts()->emit_int8(c);
237}

239// EMIT_OPCODE()
240void emit_opcode(CodeBuffer &cbuf, int code) {
cbuf.insts()->emit_int8((unsigned char) code);
242}

244// EMIT_OPCODE() w/ relocation information
245void emit_opcode(CodeBuffer &cbuf,
               int code, relocInfo::relocType reloc, int offset, int format)
247{
cbuf.relocate(cbuf.insts_mark() + offset, reloc, format);
emit_opcode(cbuf, code);
250}

252// EMIT_D8()
253void emit_d8(CodeBuffer &cbuf, int d8) {
cbuf.insts()->emit_int8((unsigned char) d8);
255}

257// EMIT_D16()
258void emit_d16(CodeBuffer &cbuf, int d16) {
cbuf.insts()->emit_int16(d16);
260}

262// EMIT_D32()
263void emit_d32(CodeBuffer &cbuf, int d32) {
cbuf.insts()->emit_int32(d32);
265}

267// EMIT_D64()
268void emit_d64(CodeBuffer &cbuf, int64_t d64) {
cbuf.insts()->emit_int64(d64);
270}

272// emit 32 bit value and construct relocation entry from relocInfo::relocType
273void emit_d32_reloc(CodeBuffer& cbuf,
                  int d32,
                  relocInfo::relocType reloc,
                  int format)
277{
assert(reloc != relocInfo::external_word_type, "use 2-arg emit_d32_reloc")do { if (!(reloc != relocInfo::external_word_type)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 556, "assert(" "reloc != relocInfo::external_word_type" ") failed"
, "use 2-arg emit_d32_reloc"); ::breakpoint(); } } while (0);
cbuf.relocate(cbuf.insts_mark(), reloc, format);
cbuf.insts()->emit_int32(d32);
281}

283// emit 32 bit value and construct relocation entry from RelocationHolder
284void emit_d32_reloc(CodeBuffer& cbuf, int d32, RelocationHolder const& rspec, int format) {
285#ifdef ASSERT1
if (rspec.reloc()->type() == relocInfo::oop_type &&
    d32 != 0 && d32 != (intptr_t) Universe::non_oop_word()) {
  assert(Universe::heap()->is_in((address)(intptr_t)d32), "should be real oop")do { if (!(Universe::heap()->is_in((address)(intptr_t)d32)
)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 566, "assert(" "Universe::heap()->is_in((address)(intptr_t)d32)"
 ") failed", "should be real oop"); ::breakpoint(); } } while
 (0);
  assert(oopDesc::is_oop(cast_to_oop((intptr_t)d32)), "cannot embed broken oops in code")do { if (!(oopDesc::is_oop(cast_to_oop((intptr_t)d32)))) { (*
g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 567, "assert(" "oopDesc::is_oop(cast_to_oop((intptr_t)d32))"
 ") failed", "cannot embed broken oops in code"); ::breakpoint
(); } } while (0);
}
291#endif
cbuf.relocate(cbuf.insts_mark(), rspec, format);
cbuf.insts()->emit_int32(d32);
294}

296void emit_d32_reloc(CodeBuffer& cbuf, address addr) {
address next_ip = cbuf.insts_end() + 4;
emit_d32_reloc(cbuf, (int) (addr - next_ip),
               external_word_Relocation::spec(addr),
               RELOC_DISP32Assembler::disp32_operand);
301}


304// emit 64 bit value and construct relocation entry from relocInfo::relocType
305void emit_d64_reloc(CodeBuffer& cbuf, int64_t d64, relocInfo::relocType reloc, int format) {
cbuf.relocate(cbuf.insts_mark(), reloc, format);
cbuf.insts()->emit_int64(d64);
308}

310// emit 64 bit value and construct relocation entry from RelocationHolder
311void emit_d64_reloc(CodeBuffer& cbuf, int64_t d64, RelocationHolder const& rspec, int format) {
312#ifdef ASSERT1
if (rspec.reloc()->type() == relocInfo::oop_type &&
    d64 != 0 && d64 != (int64_t) Universe::non_oop_word()) {
  assert(Universe::heap()->is_in((address)d64), "should be real oop")do { if (!(Universe::heap()->is_in((address)d64))) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 593, "assert(" "Universe::heap()->is_in((address)d64)" ") failed"
, "should be real oop"); ::breakpoint(); } } while (0);
  assert(oopDesc::is_oop(cast_to_oop(d64)), "cannot embed broken oops in code")do { if (!(oopDesc::is_oop(cast_to_oop(d64)))) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 594, "assert(" "oopDesc::is_oop(cast_to_oop(d64))" ") failed"
, "cannot embed broken oops in code"); ::breakpoint(); } } while
 (0);
}
318#endif
cbuf.relocate(cbuf.insts_mark(), rspec, format);
cbuf.insts()->emit_int64(d64);
321}

323// Access stack slot for load or store
324void store_to_stackslot(CodeBuffer &cbuf, int opcode, int rm_field, int disp)
325{
emit_opcode(cbuf, opcode);                  // (e.g., FILD   [RSP+src])
if (-0x80 <= disp && disp < 0x80) {
  emit_rm(cbuf, 0x01, rm_field, RSP_enc);   // R/M byte
  emit_rm(cbuf, 0x00, RSP_enc, RSP_enc);    // SIB byte
  emit_d8(cbuf, disp);     // Displacement  // R/M byte
} else {
  emit_rm(cbuf, 0x02, rm_field, RSP_enc);   // R/M byte
  emit_rm(cbuf, 0x00, RSP_enc, RSP_enc);    // SIB byte
  emit_d32(cbuf, disp);     // Displacement // R/M byte
}
336}

 // rRegI ereg, memory mem) %{    // emit_reg_mem
339void encode_RegMem(CodeBuffer &cbuf,
                 int reg,
                 int base, int index, int scale, int disp, relocInfo::relocType disp_reloc)
342{
assert(disp_reloc == relocInfo::none, "cannot have disp")do { if (!(disp_reloc == relocInfo::none)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 621, "assert(" "disp_reloc == relocInfo::none" ") failed", "cannot have disp"
); ::breakpoint(); } } while (0);
int regenc = reg & 7;
int baseenc = base & 7;
int indexenc = index & 7;

// There is no index & no scale, use form without SIB byte
if (index == 0x4 && scale == 0 && base != RSP_enc && base != R12_enc) {
  // If no displacement, mode is 0x0; unless base is [RBP] or [R13]
  if (disp == 0 && base != RBP_enc && base != R13_enc) {
    emit_rm(cbuf, 0x0, regenc, baseenc); // *
  } else if (-0x80 <= disp && disp < 0x80 && disp_reloc == relocInfo::none) {
    // If 8-bit displacement, mode 0x1
    emit_rm(cbuf, 0x1, regenc, baseenc); // *
    emit_d8(cbuf, disp);
  } else {
    // If 32-bit displacement
    if (base == -1) { // Special flag for absolute address
      emit_rm(cbuf, 0x0, regenc, 0x5); // *
      if (disp_reloc != relocInfo::none) {
        emit_d32_reloc(cbuf, disp, relocInfo::oop_type, RELOC_DISP32Assembler::disp32_operand);
      } else {
        emit_d32(cbuf, disp);
      }
    } else {
      // Normal base + offset
      emit_rm(cbuf, 0x2, regenc, baseenc); // *
      if (disp_reloc != relocInfo::none) {
        emit_d32_reloc(cbuf, disp, relocInfo::oop_type, RELOC_DISP32Assembler::disp32_operand);
      } else {
        emit_d32(cbuf, disp);
      }
    }
  }
} else {
  // Else, encode with the SIB byte
  // If no displacement, mode is 0x0; unless base is [RBP] or [R13]
  if (disp == 0 && base != RBP_enc && base != R13_enc) {
    // If no displacement
    emit_rm(cbuf, 0x0, regenc, 0x4); // *
    emit_rm(cbuf, scale, indexenc, baseenc);
  } else {
    if (-0x80 <= disp && disp < 0x80 && disp_reloc == relocInfo::none) {
      // If 8-bit displacement, mode 0x1
      emit_rm(cbuf, 0x1, regenc, 0x4); // *
      emit_rm(cbuf, scale, indexenc, baseenc);
      emit_d8(cbuf, disp);
    } else {
      // If 32-bit displacement
      if (base == 0x04 ) {
        emit_rm(cbuf, 0x2, regenc, 0x4);
        emit_rm(cbuf, scale, indexenc, 0x04); // XXX is this valid???
      } else {
        emit_rm(cbuf, 0x2, regenc, 0x4);
        emit_rm(cbuf, scale, indexenc, baseenc); // *
      }
      if (disp_reloc != relocInfo::none) {
        emit_d32_reloc(cbuf, disp, relocInfo::oop_type, RELOC_DISP32Assembler::disp32_operand);
      } else {
        emit_d32(cbuf, disp);
      }
    }
  }
}
406}

408// This could be in MacroAssembler but it's fairly C2 specific
409void emit_cmpfp_fixup(MacroAssembler& _masm) {
Label exit;
___masm. jccb(Assembler::noParity, exit)jccb_0(Assembler::noParity, exit, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 689);
___masm. pushf();
//
// comiss/ucomiss instructions set ZF,PF,CF flags and
// zero OF,AF,SF for NaN values.
// Fixup flags by zeroing ZF,PF so that compare of NaN
// values returns 'less than' result (CF is set).
// Leave the rest of flags unchanged.
//
//    7 6 5 4 3 2 1 0
//   |S|Z|r|A|r|P|r|C|  (r - reserved bit)
//    0 0 1 0 1 0 1 1   (0x2B)
//
___masm. andq(Address(rsp, 0), 0xffffff2b);
___masm. popf();
___masm. bind(exit);
427}

429void emit_cmpfp3(MacroAssembler& _masm, Register dst) {
Label done;
___masm. movl(dst, -1);
___masm. jcc(Assembler::parity, done);
___masm. jcc(Assembler::below, done);
___masm. setb(Assembler::notEqual, dst);
___masm. movzbl(dst, dst);
___masm. bind(done);
437}

439// Math.min()    # Math.max()
440// --------------------------
441// ucomis[s/d]   #
442// ja   -> b     # a
443// jp   -> NaN   # NaN
444// jb   -> a     # b
445// je            #
446// |-jz -> a | b # a & b
447// |    -> a     #
448void emit_fp_min_max(MacroAssembler& _masm, XMMRegister dst,
                   XMMRegister a, XMMRegister b,
                   XMMRegister xmmt, Register rt,
                   bool min, bool single) {

Label nan, zero, below, above, done;

if (single)
  ___masm. ucomiss(a, b);
else
  ___masm. ucomisd(a, b);

if (dst->encoding() != (min ? b : a)->encoding())
  ___masm. jccb(Assembler::above, above)jccb_0(Assembler::above, above, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 739); // CF=0 & ZF=0
else
  ___masm. jccb(Assembler::above, done)jccb_0(Assembler::above, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 741);

___masm. jccb(Assembler::parity, nan)jccb_0(Assembler::parity, nan, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 743);  // PF=1
___masm. jccb(Assembler::below, below)jccb_0(Assembler::below, below, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 744); // CF=1

// equal
___masm. vpxor(xmmt, xmmt, xmmt, Assembler::AVX_128bit);
if (single) {
  ___masm. ucomiss(a, xmmt);
  ___masm. jccb(Assembler::equal, zero)jccb_0(Assembler::equal, zero, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 750);

  ___masm. movflt(dst, a);
  ___masm. jmp(done);
}
else {
  ___masm. ucomisd(a, xmmt);
  ___masm. jccb(Assembler::equal, zero)jccb_0(Assembler::equal, zero, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 757);

  ___masm. movdbl(dst, a);
  ___masm. jmp(done);
}

___masm. bind(zero);
if (min)
  ___masm. vpor(dst, a, b, Assembler::AVX_128bit);
else
  ___masm. vpand(dst, a, b, Assembler::AVX_128bit);

___masm. jmp(done);

___masm. bind(above);
if (single)
  ___masm. movflt(dst, min ? b : a);
else
  ___masm. movdbl(dst, min ? b : a);

___masm. jmp(done);

___masm. bind(nan);
if (single) {
  ___masm. movl(rt, 0x7fc00000); // Float.NaN
  ___masm. movdl(dst, rt);
}
else {
  ___masm. mov64(rt, 0x7ff8000000000000L); // Double.NaN
  ___masm. movdq(dst, rt);
}
___masm. jmp(done);

___masm. bind(below);
if (single)
  ___masm. movflt(dst, min ? a : b);
else
  ___masm. movdbl(dst, min ? a : b);

___masm. bind(done);
519}

521//=============================================================================
522const RegMask& MachConstantBaseNode::_out_RegMask = RegMask::Empty;

524int ConstantTable::calculate_table_base_offset() const {
return 0;  // absolute addressing, no offset
526}

528bool MachConstantBaseNode::requires_postalloc_expand() const { return false; }
529void MachConstantBaseNode::postalloc_expand(GrowableArray <Node *> *nodes, PhaseRegAlloc *ra_) {
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 808); ::breakpoint(); } while (0);
531}

533void MachConstantBaseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
// Empty encoding
535}

537uint MachConstantBaseNode::size(PhaseRegAlloc* ra_) const {
return 0;
539}

541#ifndef PRODUCT
542void MachConstantBaseNode::format(PhaseRegAlloc* ra_, outputStream* st) const {
st->print("# MachConstantBaseNode (empty encoding)");
544}
545#endif


548//=============================================================================
549#ifndef PRODUCT
550void MachPrologNode::format(PhaseRegAlloc* ra_, outputStream* st) const {
Compile* C = ra_->C;

int framesize = C->output()->frame_size_in_bytes();
int bangsize = C->output()->bang_size_in_bytes();
assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned")do { if (!((framesize & (StackAlignmentInBytes-1)) == 0))
 { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 833, "assert(" "(framesize & (StackAlignmentInBytes-1)) == 0"
 ") failed", "frame size not aligned"); ::breakpoint(); } } while
 (0);
// Remove wordSize for return addr which is already pushed.
framesize -= wordSize;

if (C->output()->need_stack_bang(bangsize)) {
  framesize -= wordSize;
  st->print("# stack bang (%d bytes)", bangsize);
  st->print("\n\t");
  st->print("pushq   rbp\t# Save rbp");
  if (PreserveFramePointer) {
      st->print("\n\t");
      st->print("movq    rbp, rsp\t# Save the caller's SP into rbp");
  }
  if (framesize) {
    st->print("\n\t");
    st->print("subq    rsp, #%d\t# Create frame",framesize);
  }
} else {
  st->print("subq    rsp, #%d\t# Create frame",framesize);
  st->print("\n\t");
  framesize -= wordSize;
  st->print("movq    [rsp + #%d], rbp\t# Save rbp",framesize);
  if (PreserveFramePointer) {
    st->print("\n\t");
    st->print("movq    rbp, rsp\t# Save the caller's SP into rbp");
    if (framesize > 0) {
      st->print("\n\t");
      st->print("addq    rbp, #%d", framesize);
    }
  }
}

if (VerifyStackAtCalls) {
  st->print("\n\t");
  framesize -= wordSize;
  st->print("movq    [rsp + #%d], 0xbadb100d\t# Majik cookie for stack depth check",framesize);
591#ifdef ASSERT1
  st->print("\n\t");
  st->print("# stack alignment check");
594#endif
}
if (C->stub_function() != NULL__null && BarrierSet::barrier_set()->barrier_set_nmethod() != NULL__null) {
  st->print("\n\t");
  st->print("cmpl    [r15_thread + #disarmed_offset], #disarmed_value\t");
  st->print("\n\t");
  st->print("je      fast_entry\t");
  st->print("\n\t");
  st->print("call    #nmethod_entry_barrier_stub\t");
  st->print("\n\tfast_entry:");
}
st->cr();
606}
607#endif

609void MachPrologNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
Compile* C = ra_->C;
MacroAssembler _masm(&cbuf);

int framesize = C->output()->frame_size_in_bytes();
int bangsize = C->output()->bang_size_in_bytes();

if (C->clinit_barrier_on_entry()) {
  assert(VM_Version::supports_fast_class_init_checks(), "sanity")do { if (!(VM_Version::supports_fast_class_init_checks())) { (
*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 895, "assert(" "VM_Version::supports_fast_class_init_checks()"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started")do { if (!(!C->method()->holder()->is_not_initialized
())) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 896, "assert(" "!C->method()->holder()->is_not_initialized()"
 ") failed", "initialization should have been started"); ::breakpoint
(); } } while (0);

  Label L_skip_barrier;
  Register klass = rscratch1;

  ___masm. mov_metadata(klass, C->method()->holder()->constant_encoding());
  ___masm. clinit_barrier(klass, r15_thread, &L_skip_barrier /*L_fast_path*/);

  ___masm. jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); // slow path

  ___masm. bind(L_skip_barrier);
}

___masm. verified_entry(framesize, C->output()->need_stack_bang(bangsize)?bangsize:0, false, C->stub_function() != NULL__null);

C->output()->set_frame_complete(cbuf.insts_size());

if (C->has_mach_constant_base_node()) {
  // NOTE: We set the table base offset here because users might be
  // emitted before MachConstantBaseNode.
  ConstantTable& constant_table = C->output()->constant_table();
  constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
}
641}

643uint MachPrologNode::size(PhaseRegAlloc* ra_) const
644{
return MachNode::size(ra_); // too many variables; just compute it
                            // the hard way
647}

649int MachPrologNode::reloc() const
650{
return 0; // a large enough number
652}

654//=============================================================================
655#ifndef PRODUCT
656void MachEpilogNode::format(PhaseRegAlloc* ra_, outputStream* st) const
657{
Compile* C = ra_->C;
if (generate_vzeroupper(C)) {
  st->print("vzeroupper");
  st->cr(); st->print("\t");
}

int framesize = C->output()->frame_size_in_bytes();
assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned")do { if (!((framesize & (StackAlignmentInBytes-1)) == 0))
 { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 943, "assert(" "(framesize & (StackAlignmentInBytes-1)) == 0"
 ") failed", "frame size not aligned"); ::breakpoint(); } } while
 (0);
// Remove word for return adr already pushed
// and RBP
framesize -= 2*wordSize;

if (framesize) {
  st->print_cr("addq    rsp, %d\t# Destroy frame", framesize);
  st->print("\t");
}

st->print_cr("popq    rbp");
if (do_polling() && C->is_method_compilation()) {
  st->print("\t");
  st->print_cr("cmpq     rsp, poll_offset[r15_thread] \n\t"
               "ja       #safepoint_stub\t"
               "# Safepoint: poll for GC");
}
682}
683#endif

685void MachEpilogNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
686{
Compile* C = ra_->C;
MacroAssembler _masm(&cbuf);

if (generate_vzeroupper(C)) {
  // Clear upper bits of YMM registers when current compiled code uses
  // wide vectors to avoid AVX <-> SSE transition penalty during call.
  ___masm. vzeroupper();
}

int framesize = C->output()->frame_size_in_bytes();
assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned")do { if (!((framesize & (StackAlignmentInBytes-1)) == 0))
 { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 975, "assert(" "(framesize & (StackAlignmentInBytes-1)) == 0"
 ") failed", "frame size not aligned"); ::breakpoint(); } } while
 (0);
// Remove word for return adr already pushed
// and RBP
framesize -= 2*wordSize;

// Note that VerifyStackAtCalls' Majik cookie does not change the frame size popped here

if (framesize) {
  emit_opcode(cbuf, Assembler::REX_W);
  if (framesize < 0x80) {
    emit_opcode(cbuf, 0x83); // addq rsp, #framesize
    emit_rm(cbuf, 0x3, 0x00, RSP_enc);
    emit_d8(cbuf, framesize);
  } else {
    emit_opcode(cbuf, 0x81); // addq rsp, #framesize
    emit_rm(cbuf, 0x3, 0x00, RSP_enc);
    emit_d32(cbuf, framesize);
  }
}

// popq rbp
emit_opcode(cbuf, 0x58 | RBP_enc);

if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
  ___masm. reserved_stack_check();
}

if (do_polling() && C->is_method_compilation()) {
  MacroAssembler _masm(&cbuf);
  Label dummy_label;
  Label* code_stub = &dummy_label;
  if (!C->output()->in_scratch_emit_size()) {
    code_stub = &C->output()->safepoint_poll_table()->add_safepoint(___masm. offset());
  }
  ___masm. relocate(relocInfo::poll_return_type);
  ___masm. safepoint_poll(*code_stub, r15_thread, true /* at_return */, true /* in_nmethod */);
}
734}

736uint MachEpilogNode::size(PhaseRegAlloc* ra_) const
737{
return MachNode::size(ra_); // too many variables; just compute it
                            // the hard way
740}

742int MachEpilogNode::reloc() const
743{
return 2; // a large enough number
745}

747const Pipeline* MachEpilogNode::pipeline() const
748{
return MachNode::pipeline_class();
750}

752//=============================================================================

754enum RC {
rc_bad,
rc_int,
rc_kreg,
rc_float,
rc_stack
760};

762static enum RC rc_class(OptoReg::Name reg)
763{
if( !OptoReg::is_valid(reg)  ) return rc_bad;

if (OptoReg::is_stack(reg)) return rc_stack;

VMReg r = OptoReg::as_VMReg(reg);

if (r->is_Register()) return rc_int;

if (r->is_KRegister()) return rc_kreg;

assert(r->is_XMMRegister(), "must be")do { if (!(r->is_XMMRegister())) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1052, "assert(" "r->is_XMMRegister()" ") failed", "must be"
); ::breakpoint(); } } while (0);
return rc_float;
776}

778// Next two methods are shared by 32- and 64-bit VM. They are defined in x86.ad.
779static void vec_mov_helper(CodeBuffer *cbuf, int src_lo, int dst_lo,
                        int src_hi, int dst_hi, uint ireg, outputStream* st);

782void vec_spill_helper(CodeBuffer *cbuf, bool is_load,
                   int stack_offset, int reg, uint ireg, outputStream* st);

785static void vec_stack_to_stack_helper(CodeBuffer *cbuf, int src_offset,
                                    int dst_offset, uint ireg, outputStream* st) {
if (cbuf) {
  MacroAssembler _masm(cbuf);
  switch (ireg) {
  case Op_VecS:
    ___masm. movq(Address(rsp, -8), rax);
    ___masm. movl(rax, Address(rsp, src_offset));
    ___masm. movl(Address(rsp, dst_offset), rax);
    ___masm. movq(rax, Address(rsp, -8));
    break;
  case Op_VecD:
    ___masm. pushq(Address(rsp, src_offset));
    ___masm. popq (Address(rsp, dst_offset));
    break;
  case Op_VecX:
    ___masm. pushq(Address(rsp, src_offset));
    ___masm. popq (Address(rsp, dst_offset));
    ___masm. pushq(Address(rsp, src_offset+8));
    ___masm. popq (Address(rsp, dst_offset+8));
    break;
  case Op_VecY:
    ___masm. vmovdqu(Address(rsp, -32), xmm0);
    ___masm. vmovdqu(xmm0, Address(rsp, src_offset));
    ___masm. vmovdqu(Address(rsp, dst_offset), xmm0);
    ___masm. vmovdqu(xmm0, Address(rsp, -32));
    break;
  case Op_VecZ:
    ___masm. evmovdquq(Address(rsp, -64), xmm0, 2);
    ___masm. evmovdquq(xmm0, Address(rsp, src_offset), 2);
    ___masm. evmovdquq(Address(rsp, dst_offset), xmm0, 2);
    ___masm. evmovdquq(xmm0, Address(rsp, -64), 2);
    break;
  default:
    ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1097); ::breakpoint(); } while (0);
  }
821#ifndef PRODUCT
} else {
  switch (ireg) {
  case Op_VecS:
    st->print("movq    [rsp - #8], rax\t# 32-bit mem-mem spill\n\t"
              "movl    rax, [rsp + #%d]\n\t"
              "movl    [rsp + #%d], rax\n\t"
              "movq    rax, [rsp - #8]",
              src_offset, dst_offset);
    break;
  case Op_VecD:
    st->print("pushq   [rsp + #%d]\t# 64-bit mem-mem spill\n\t"
              "popq    [rsp + #%d]",
              src_offset, dst_offset);
    break;
   case Op_VecX:
    st->print("pushq   [rsp + #%d]\t# 128-bit mem-mem spill\n\t"
              "popq    [rsp + #%d]\n\t"
              "pushq   [rsp + #%d]\n\t"
              "popq    [rsp + #%d]",
              src_offset, dst_offset, src_offset+8, dst_offset+8);
    break;
  case Op_VecY:
    st->print("vmovdqu [rsp - #32], xmm0\t# 256-bit mem-mem spill\n\t"
              "vmovdqu xmm0, [rsp + #%d]\n\t"
              "vmovdqu [rsp + #%d], xmm0\n\t"
              "vmovdqu xmm0, [rsp - #32]",
              src_offset, dst_offset);
    break;
  case Op_VecZ:
    st->print("vmovdqu [rsp - #64], xmm0\t# 512-bit mem-mem spill\n\t"
              "vmovdqu xmm0, [rsp + #%d]\n\t"
              "vmovdqu [rsp + #%d], xmm0\n\t"
              "vmovdqu xmm0, [rsp - #64]",
              src_offset, dst_offset);
    break;
  default:
    ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1136); ::breakpoint(); } while (0);
  }
860#endif
}
862}

864uint MachSpillCopyNode::implementation(CodeBuffer* cbuf,
                                     PhaseRegAlloc* ra_,
                                     bool do_size,
                                     outputStream* st) const {
assert(cbuf != NULL || st  != NULL, "sanity")do { if (!(cbuf != __null || st != __null)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1146, "assert(" "cbuf != __null || st != __null" ") failed"
, "sanity"); ::breakpoint(); } } while (0);
// Get registers to move
OptoReg::Name src_second = ra_->get_reg_second(in(1));
OptoReg::Name src_first = ra_->get_reg_first(in(1));
OptoReg::Name dst_second = ra_->get_reg_second(this);
OptoReg::Name dst_first = ra_->get_reg_first(this);

enum RC src_second_rc = rc_class(src_second);
enum RC src_first_rc = rc_class(src_first);
enum RC dst_second_rc = rc_class(dst_second);
enum RC dst_first_rc = rc_class(dst_first);

assert(OptoReg::is_valid(src_first) && OptoReg::is_valid(dst_first),do { if (!(OptoReg::is_valid(src_first) && OptoReg::is_valid
(dst_first))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1159, "assert(" "OptoReg::is_valid(src_first) && OptoReg::is_valid(dst_first)"
 ") failed", "must move at least 1 register"); ::breakpoint()
; } } while (0)
       "must move at least 1 register" )do { if (!(OptoReg::is_valid(src_first) && OptoReg::is_valid
(dst_first))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1159, "assert(" "OptoReg::is_valid(src_first) && OptoReg::is_valid(dst_first)"
 ") failed", "must move at least 1 register"); ::breakpoint()
; } } while (0);

if (src_first == dst_first && src_second == dst_second) {
  // Self copy, no move
  return 0;
}
if (bottom_type()->isa_vect() != NULL__null && bottom_type()->isa_vectmask() == NULL__null) {
  uint ireg = ideal_reg();
  assert((src_first_rc != rc_int && dst_first_rc != rc_int), "sanity")do { if (!((src_first_rc != rc_int && dst_first_rc !=
 rc_int))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1167, "assert(" "(src_first_rc != rc_int && dst_first_rc != rc_int)"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert((ireg == Op_VecS || ireg == Op_VecD || ireg == Op_VecX || ireg == Op_VecY || ireg == Op_VecZ ), "sanity")do { if (!((ireg == Op_VecS || ireg == Op_VecD || ireg == Op_VecX
 || ireg == Op_VecY || ireg == Op_VecZ ))) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1168, "assert(" "(ireg == Op_VecS || ireg == Op_VecD || ireg == Op_VecX || ireg == Op_VecY || ireg == Op_VecZ )"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  if( src_first_rc == rc_stack && dst_first_rc == rc_stack ) {
    // mem -> mem
    int src_offset = ra_->reg2offset(src_first);
    int dst_offset = ra_->reg2offset(dst_first);
    vec_stack_to_stack_helper(cbuf, src_offset, dst_offset, ireg, st);
  } else if (src_first_rc == rc_float && dst_first_rc == rc_float ) {
    vec_mov_helper(cbuf, src_first, dst_first, src_second, dst_second, ireg, st);
  } else if (src_first_rc == rc_float && dst_first_rc == rc_stack ) {
    int stack_offset = ra_->reg2offset(dst_first);
    vec_spill_helper(cbuf, false, stack_offset, src_first, ireg, st);
  } else if (src_first_rc == rc_stack && dst_first_rc == rc_float ) {
    int stack_offset = ra_->reg2offset(src_first);
    vec_spill_helper(cbuf, true,  stack_offset, dst_first, ireg, st);
  } else {
    ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1183); ::breakpoint(); } while (0);
  }
  return 0;
}
if (src_first_rc == rc_stack) {
  // mem ->
  if (dst_first_rc == rc_stack) {
    // mem -> mem
    assert(src_second != dst_first, "overlap")do { if (!(src_second != dst_first)) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1191, "assert(" "src_second != dst_first" ") failed", "overlap"
); ::breakpoint(); } } while (0);
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      int src_offset = ra_->reg2offset(src_first);
      int dst_offset = ra_->reg2offset(dst_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. pushq(Address(rsp, src_offset));
        ___masm. popq (Address(rsp, dst_offset));
923#ifndef PRODUCT
      } else {
        st->print("pushq   [rsp + #%d]\t# 64-bit mem-mem spill\n\t"
                  "popq    [rsp + #%d]",
                   src_offset, dst_offset);
928#endif
      }
    } else {
      // 32-bit
      assert(!((src_first & 1) == 0 && src_first + 1 == src_second), "no transform")do { if (!(!((src_first & 1) == 0 && src_first + 1
 == src_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1210, "assert(" "!((src_first & 1) == 0 && src_first + 1 == src_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      assert(!((dst_first & 1) == 0 && dst_first + 1 == dst_second), "no transform")do { if (!(!((dst_first & 1) == 0 && dst_first + 1
 == dst_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1211, "assert(" "!((dst_first & 1) == 0 && dst_first + 1 == dst_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      // No pushl/popl, so:
      int src_offset = ra_->reg2offset(src_first);
      int dst_offset = ra_->reg2offset(dst_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movq(Address(rsp, -8), rax);
        ___masm. movl(rax, Address(rsp, src_offset));
        ___masm. movl(Address(rsp, dst_offset), rax);
        ___masm. movq(rax, Address(rsp, -8));
943#ifndef PRODUCT
      } else {
        st->print("movq    [rsp - #8], rax\t# 32-bit mem-mem spill\n\t"
                  "movl    rax, [rsp + #%d]\n\t"
                  "movl    [rsp + #%d], rax\n\t"
                  "movq    rax, [rsp - #8]",
                   src_offset, dst_offset);
950#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_int) {
    // mem -> gpr
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      int offset = ra_->reg2offset(src_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movq(as_Register(Matcher::_regEncode[dst_first]), Address(rsp, offset));
963#ifndef PRODUCT
      } else {
        st->print("movq    %s, [rsp + #%d]\t# spill",
                   Matcher::regName[dst_first],
                   offset);
968#endif
      }
    } else {
      // 32-bit
      assert(!((src_first & 1) == 0 && src_first + 1 == src_second), "no transform")do { if (!(!((src_first & 1) == 0 && src_first + 1
 == src_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1250, "assert(" "!((src_first & 1) == 0 && src_first + 1 == src_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      assert(!((dst_first & 1) == 0 && dst_first + 1 == dst_second), "no transform")do { if (!(!((dst_first & 1) == 0 && dst_first + 1
 == dst_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1251, "assert(" "!((dst_first & 1) == 0 && dst_first + 1 == dst_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      int offset = ra_->reg2offset(src_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movl(as_Register(Matcher::_regEncode[dst_first]), Address(rsp, offset));
978#ifndef PRODUCT
      } else {
        st->print("movl    %s, [rsp + #%d]\t# spill",
                   Matcher::regName[dst_first],
                   offset);
983#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_float) {
    // mem-> xmm
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      int offset = ra_->reg2offset(src_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movdbl( as_XMMRegister(Matcher::_regEncode[dst_first]), Address(rsp, offset));
996#ifndef PRODUCT
      } else {
        st->print("%s  %s, [rsp + #%d]\t# spill",
                   UseXmmLoadAndClearUpper ? "movsd " : "movlpd",
                   Matcher::regName[dst_first],
                   offset);
1002#endif
      }
    } else {
      // 32-bit
      assert(!((src_first & 1) == 0 && src_first + 1 == src_second), "no transform")do { if (!(!((src_first & 1) == 0 && src_first + 1
 == src_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1284, "assert(" "!((src_first & 1) == 0 && src_first + 1 == src_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      assert(!((dst_first & 1) == 0 && dst_first + 1 == dst_second), "no transform")do { if (!(!((dst_first & 1) == 0 && dst_first + 1
 == dst_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1285, "assert(" "!((dst_first & 1) == 0 && dst_first + 1 == dst_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      int offset = ra_->reg2offset(src_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movflt( as_XMMRegister(Matcher::_regEncode[dst_first]), Address(rsp, offset));
1012#ifndef PRODUCT
      } else {
        st->print("movss   %s, [rsp + #%d]\t# spill",
                   Matcher::regName[dst_first],
                   offset);
1017#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_kreg) {
    // mem -> kreg
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      int offset = ra_->reg2offset(src_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. kmov(as_KRegister(Matcher::_regEncode[dst_first]), Address(rsp, offset));
1030#ifndef PRODUCT
      } else {
        st->print("kmovq   %s, [rsp + #%d]\t# spill",
                   Matcher::regName[dst_first],
                   offset);
1035#endif
      }
    }
    return 0;
  }
} else if (src_first_rc == rc_int) {
  // gpr ->
  if (dst_first_rc == rc_stack) {
    // gpr -> mem
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      int offset = ra_->reg2offset(dst_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movq(Address(rsp, offset), as_Register(Matcher::_regEncode[src_first]));
1051#ifndef PRODUCT
      } else {
        st->print("movq    [rsp + #%d], %s\t# spill",
                   offset,
                   Matcher::regName[src_first]);
1056#endif
      }
    } else {
      // 32-bit
      assert(!((src_first & 1) == 0 && src_first + 1 == src_second), "no transform")do { if (!(!((src_first & 1) == 0 && src_first + 1
 == src_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1338, "assert(" "!((src_first & 1) == 0 && src_first + 1 == src_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      assert(!((dst_first & 1) == 0 && dst_first + 1 == dst_second), "no transform")do { if (!(!((dst_first & 1) == 0 && dst_first + 1
 == dst_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1339, "assert(" "!((dst_first & 1) == 0 && dst_first + 1 == dst_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      int offset = ra_->reg2offset(dst_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movl(Address(rsp, offset), as_Register(Matcher::_regEncode[src_first]));
1066#ifndef PRODUCT
      } else {
        st->print("movl    [rsp + #%d], %s\t# spill",
                   offset,
                   Matcher::regName[src_first]);
1071#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_int) {
    // gpr -> gpr
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movq(as_Register(Matcher::_regEncode[dst_first]),
                as_Register(Matcher::_regEncode[src_first]));
1084#ifndef PRODUCT
      } else {
        st->print("movq    %s, %s\t# spill",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1089#endif
      }
      return 0;
    } else {
      // 32-bit
      assert(!((src_first & 1) == 0 && src_first + 1 == src_second), "no transform")do { if (!(!((src_first & 1) == 0 && src_first + 1
 == src_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1372, "assert(" "!((src_first & 1) == 0 && src_first + 1 == src_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      assert(!((dst_first & 1) == 0 && dst_first + 1 == dst_second), "no transform")do { if (!(!((dst_first & 1) == 0 && dst_first + 1
 == dst_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1373, "assert(" "!((dst_first & 1) == 0 && dst_first + 1 == dst_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movl(as_Register(Matcher::_regEncode[dst_first]),
                as_Register(Matcher::_regEncode[src_first]));
1100#ifndef PRODUCT
      } else {
        st->print("movl    %s, %s\t# spill",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1105#endif
      }
      return 0;
    }
  } else if (dst_first_rc == rc_float) {
    // gpr -> xmm
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movdq( as_XMMRegister(Matcher::_regEncode[dst_first]), as_Register(Matcher::_regEncode[src_first]));
1117#ifndef PRODUCT
      } else {
        st->print("movdq   %s, %s\t# spill",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1122#endif
      }
    } else {
      // 32-bit
      assert(!((src_first & 1) == 0 && src_first + 1 == src_second), "no transform")do { if (!(!((src_first & 1) == 0 && src_first + 1
 == src_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1404, "assert(" "!((src_first & 1) == 0 && src_first + 1 == src_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      assert(!((dst_first & 1) == 0 && dst_first + 1 == dst_second), "no transform")do { if (!(!((dst_first & 1) == 0 && dst_first + 1
 == dst_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1405, "assert(" "!((dst_first & 1) == 0 && dst_first + 1 == dst_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movdl( as_XMMRegister(Matcher::_regEncode[dst_first]), as_Register(Matcher::_regEncode[src_first]));
1131#ifndef PRODUCT
      } else {
        st->print("movdl   %s, %s\t# spill",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1136#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_kreg) {
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. kmov(as_KRegister(Matcher::_regEncode[dst_first]), as_Register(Matcher::_regEncode[src_first]));
#ifndef PRODUCT
      } else {
         st->print("kmovq   %s, %s\t# spill",
                     Matcher::regName[dst_first],
                     Matcher::regName[src_first]);
#endif
      }
    }
    Unimplemented()do { (*g_assert_poison) = 'X';; report_unimplemented("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1433); ::breakpoint(); } while (0);
    return 0;
  }
} else if (src_first_rc == rc_float) {
  // xmm ->
  if (dst_first_rc == rc_stack) {
    // xmm -> mem
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      int offset = ra_->reg2offset(dst_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movdbl( Address(rsp, offset), as_XMMRegister(Matcher::_regEncode[src_first]));
1169#ifndef PRODUCT
      } else {
        st->print("movsd   [rsp + #%d], %s\t# spill",
                   offset,
                   Matcher::regName[src_first]);
1174#endif
      }
    } else {
      // 32-bit
      assert(!((src_first & 1) == 0 && src_first + 1 == src_second), "no transform")do { if (!(!((src_first & 1) == 0 && src_first + 1
 == src_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1456, "assert(" "!((src_first & 1) == 0 && src_first + 1 == src_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      assert(!((dst_first & 1) == 0 && dst_first + 1 == dst_second), "no transform")do { if (!(!((dst_first & 1) == 0 && dst_first + 1
 == dst_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1457, "assert(" "!((dst_first & 1) == 0 && dst_first + 1 == dst_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      int offset = ra_->reg2offset(dst_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movflt(Address(rsp, offset), as_XMMRegister(Matcher::_regEncode[src_first]));
1184#ifndef PRODUCT
      } else {
        st->print("movss   [rsp + #%d], %s\t# spill",
                   offset,
                   Matcher::regName[src_first]);
1189#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_int) {
    // xmm -> gpr
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movdq( as_Register(Matcher::_regEncode[dst_first]), as_XMMRegister(Matcher::_regEncode[src_first]));
1201#ifndef PRODUCT
      } else {
        st->print("movdq   %s, %s\t# spill",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1206#endif
      }
    } else {
      // 32-bit
      assert(!((src_first & 1) == 0 && src_first + 1 == src_second), "no transform")do { if (!(!((src_first & 1) == 0 && src_first + 1
 == src_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1488, "assert(" "!((src_first & 1) == 0 && src_first + 1 == src_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      assert(!((dst_first & 1) == 0 && dst_first + 1 == dst_second), "no transform")do { if (!(!((dst_first & 1) == 0 && dst_first + 1
 == dst_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1489, "assert(" "!((dst_first & 1) == 0 && dst_first + 1 == dst_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movdl( as_Register(Matcher::_regEncode[dst_first]), as_XMMRegister(Matcher::_regEncode[src_first]));
1215#ifndef PRODUCT
      } else {
        st->print("movdl   %s, %s\t# spill",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1220#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_float) {
    // xmm -> xmm
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movdbl( as_XMMRegister(Matcher::_regEncode[dst_first]), as_XMMRegister(Matcher::_regEncode[src_first]));
1232#ifndef PRODUCT
      } else {
        st->print("%s  %s, %s\t# spill",
                   UseXmmRegToRegMoveAll ? "movapd" : "movsd ",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1238#endif
      }
    } else {
      // 32-bit
      assert(!((src_first & 1) == 0 && src_first + 1 == src_second), "no transform")do { if (!(!((src_first & 1) == 0 && src_first + 1
 == src_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1520, "assert(" "!((src_first & 1) == 0 && src_first + 1 == src_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      assert(!((dst_first & 1) == 0 && dst_first + 1 == dst_second), "no transform")do { if (!(!((dst_first & 1) == 0 && dst_first + 1
 == dst_second))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1521, "assert(" "!((dst_first & 1) == 0 && dst_first + 1 == dst_second)"
 ") failed", "no transform"); ::breakpoint(); } } while (0);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. movflt( as_XMMRegister(Matcher::_regEncode[dst_first]), as_XMMRegister(Matcher::_regEncode[src_first]));
1247#ifndef PRODUCT
      } else {
        st->print("%s  %s, %s\t# spill",
                   UseXmmRegToRegMoveAll ? "movaps" : "movss ",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1253#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_kreg) {
    assert(false, "Illegal spilling")do { if (!(false)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1536, "assert(" "false" ") failed", "Illegal spilling"); ::
breakpoint(); } } while (0);
    return 0;
  }
} else if (src_first_rc == rc_kreg) {
  if (dst_first_rc == rc_stack) {
    // mem -> kreg
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      int offset = ra_->reg2offset(dst_first);
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. kmov(Address(rsp, offset), as_KRegister(Matcher::_regEncode[src_first]));
1271#ifndef PRODUCT
      } else {
        st->print("kmovq   [rsp + #%d] , %s\t# spill",
                   offset,
                   Matcher::regName[src_first]);
1276#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_int) {
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. kmov(as_Register(Matcher::_regEncode[dst_first]), as_KRegister(Matcher::_regEncode[src_first]));
1287#ifndef PRODUCT
      } else {
       st->print("kmovq   %s, %s\t# spill",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1292#endif
      }
    }
    Unimplemented()do { (*g_assert_poison) = 'X';; report_unimplemented("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1573); ::breakpoint(); } while (0);
    return 0;
  } else if (dst_first_rc == rc_kreg) {
    if ((src_first & 1) == 0 && src_first + 1 == src_second &&
        (dst_first & 1) == 0 && dst_first + 1 == dst_second) {
      // 64-bit
      if (cbuf) {
        MacroAssembler _masm(cbuf);
        ___masm. kmov(as_KRegister(Matcher::_regEncode[dst_first]), as_KRegister(Matcher::_regEncode[src_first]));
1304#ifndef PRODUCT
      } else {
       st->print("kmovq   %s, %s\t# spill",
                   Matcher::regName[dst_first],
                   Matcher::regName[src_first]);
1309#endif
      }
    }
    return 0;
  } else if (dst_first_rc == rc_float) {
    assert(false, "Illegal spill")do { if (!(false)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1592, "assert(" "false" ") failed", "Illegal spill"); ::breakpoint
(); } } while (0);
    return 0;
  }
}

assert(0," foo ")do { if (!(0)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1597, "assert(" "0" ") failed", " foo "); ::breakpoint(); }
 } while (0);
Unimplemented()do { (*g_assert_poison) = 'X';; report_unimplemented("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1598); ::breakpoint(); } while (0);
return 0;
1322}

1324#ifndef PRODUCT
1325void MachSpillCopyNode::format(PhaseRegAlloc *ra_, outputStream* st) const {
implementation(NULL__null, ra_, false, st);
1327}
1328#endif

1330void MachSpillCopyNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
implementation(&cbuf, ra_, false, NULL__null);
1332}

1334uint MachSpillCopyNode::size(PhaseRegAlloc *ra_) const {
return MachNode::size(ra_);
1336}

1338//=============================================================================
1339#ifndef PRODUCT
1340void BoxLockNode::format(PhaseRegAlloc* ra_, outputStream* st) const
1341{
int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
int reg = ra_->get_reg_first(this);
st->print("leaq    %s, [rsp + #%d]\t# box lock",
          Matcher::regName[reg], offset);
1346}
1347#endif

1349void BoxLockNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
1350{
int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
int reg = ra_->get_encode(this);
if (offset >= 0x80) {
  emit_opcode(cbuf, reg < 8 ? Assembler::REX_W : Assembler::REX_WR);
  emit_opcode(cbuf, 0x8D); // LEA  reg,[SP+offset]
  emit_rm(cbuf, 0x2, reg & 7, 0x04);
  emit_rm(cbuf, 0x0, 0x04, RSP_enc);
  emit_d32(cbuf, offset);
} else {
  emit_opcode(cbuf, reg < 8 ? Assembler::REX_W : Assembler::REX_WR);
  emit_opcode(cbuf, 0x8D); // LEA  reg,[SP+offset]
  emit_rm(cbuf, 0x1, reg & 7, 0x04);
  emit_rm(cbuf, 0x0, 0x04, RSP_enc);
  emit_d8(cbuf, offset);
}
1366}

1368uint BoxLockNode::size(PhaseRegAlloc *ra_) const
1369{
int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
return (offset < 0x80) ? 5 : 8; // REX
1372}

1374//=============================================================================
1375#ifndef PRODUCT
1376void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
1377{
if (UseCompressedClassPointers) {
  st->print_cr("movl    rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
  st->print_cr("\tdecode_klass_not_null rscratch1, rscratch1");
  st->print_cr("\tcmpq    rax, rscratch1\t # Inline cache check");
} else {
  st->print_cr("\tcmpq    rax, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t"
               "# Inline cache check");
}
st->print_cr("\tjne     SharedRuntime::_ic_miss_stub");
st->print_cr("\tnop\t# nops to align entry point");
1388}
1389#endif

1391void MachUEPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const
1392{
MacroAssembler masm(&cbuf);
uint insts_size = cbuf.insts_size();
if (UseCompressedClassPointers) {
  masm.load_klass(rscratch1, j_rarg0, rscratch2);
  masm.cmpptr(rax, rscratch1);
} else {
  masm.cmpptr(rax, Address(j_rarg0, oopDesc::klass_offset_in_bytes()));
}

masm.jump_cc(Assembler::notEqual, RuntimeAddress(SharedRuntime::get_ic_miss_stub()));

/* WARNING these NOPs are critical so that verified entry point is properly
   4 bytes aligned for patching by NativeJump::patch_verified_entry() */
int nops_cnt = 4 - ((cbuf.insts_size() - insts_size) & 0x3);
if (OptoBreakpoint) {
  // Leave space for int3
  nops_cnt -= 1;
}
nops_cnt &= 0x3; // Do not add nops if code is aligned.
if (nops_cnt > 0)
  masm.nop(nops_cnt);
1414}

1416uint MachUEPNode::size(PhaseRegAlloc* ra_) const
1417{
return MachNode::size(ra_); // too many variables; just compute it
                            // the hard way
1420}


1423//=============================================================================

1425const bool Matcher::supports_vector_calling_convention(void) {
if (EnableVectorSupport && UseVectorStubs) {
  return true;
}
return false;
1430}

1432OptoRegPair Matcher::vector_return_value(uint ideal_reg) {
assert(EnableVectorSupport && UseVectorStubs, "sanity")do { if (!(EnableVectorSupport && UseVectorStubs)) { (
*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1711, "assert(" "EnableVectorSupport && UseVectorStubs"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
int lo = XMM0_num;
int hi = XMM0b_num;
if (ideal_reg == Op_VecX) hi = XMM0d_num;
else if (ideal_reg == Op_VecY) hi = XMM0h_num;
else if (ideal_reg == Op_VecZ) hi = XMM0p_num;
return OptoRegPair(hi, lo);
1440}

1442// Is this branch offset short enough that a short branch can be used?
1443//
1444// NOTE: If the platform does not provide any short branch variants, then
1445//       this method should return false for offset 0.
1446bool Matcher::is_short_branch_offset(int rule, int br_size, int offset) {
// The passed offset is relative to address of the branch.
// On 86 a branch displacement is calculated relative to address
// of a next instruction.
offset -= br_size;

// the short version of jmpConUCF2 contains multiple branches,
// making the reach slightly less
if (rule == jmpConUCF2_rule)
  return (-126 <= offset && offset <= 125);
return (-128 <= offset && offset <= 127);
1457}

1459// Return whether or not this register is ever used as an argument.
1460// This function is used on startup to build the trampoline stubs in
1461// generateOptoStub.  Registers not mentioned will be killed by the VM
1462// call in the trampoline, and arguments in those registers not be
1463// available to the callee.
1464bool Matcher::can_be_java_arg(int reg)
1465{
return
  reg ==  RDI_num || reg == RDI_H_num ||
  reg ==  RSI_num || reg == RSI_H_num ||
  reg ==  RDX_num || reg == RDX_H_num ||
  reg ==  RCX_num || reg == RCX_H_num ||
  reg ==   R8_num || reg ==  R8_H_num ||
  reg ==   R9_num || reg ==  R9_H_num ||
  reg ==  R12_num || reg == R12_H_num ||
  reg == XMM0_num || reg == XMM0b_num ||
  reg == XMM1_num || reg == XMM1b_num ||
  reg == XMM2_num || reg == XMM2b_num ||
  reg == XMM3_num || reg == XMM3b_num ||
  reg == XMM4_num || reg == XMM4b_num ||
  reg == XMM5_num || reg == XMM5b_num ||
  reg == XMM6_num || reg == XMM6b_num ||
  reg == XMM7_num || reg == XMM7b_num;
1482}

1484bool Matcher::is_spillable_arg(int reg)
1485{
return can_be_java_arg(reg);
1487}

1489uint Matcher::int_pressure_limit()
1490{
return (INTPRESSURE == -1) ? _INT_REG_mask.Size() : INTPRESSURE;
1492}

1494uint Matcher::float_pressure_limit()
1495{
// After experiment around with different values, the following default threshold
// works best for LCM's register pressure scheduling on x64.
uint dec_count  = VM_Version::supports_evex() ? 4 : 2;
uint default_float_pressure_threshold = _FLOAT_REG_mask.Size() - dec_count;
return (FLOATPRESSURE == -1) ? default_float_pressure_threshold : FLOATPRESSURE;
1501}

1503bool Matcher::use_asm_for_ldiv_by_con( jlong divisor ) {
// In 64 bit mode a code which use multiply when
// devisor is constant is faster than hardware
// DIV instruction (it uses MulHiL).
return false;
1508}

1510// Register for DIVI projection of divmodI
1511RegMask Matcher::divI_proj_mask() {
return INT_RAX_REG_mask();
1513}

1515// Register for MODI projection of divmodI
1516RegMask Matcher::modI_proj_mask() {
return INT_RDX_REG_mask();
1518}

1520// Register for DIVL projection of divmodL
1521RegMask Matcher::divL_proj_mask() {
return LONG_RAX_REG_mask();
1523}

1525// Register for MODL projection of divmodL
1526RegMask Matcher::modL_proj_mask() {
return LONG_RDX_REG_mask();
1528}

1530// Register for saving SP into on method handle invokes. Not used on x86_64.
1531const RegMask Matcher::method_handle_invoke_SP_save_mask() {
  return NO_REG_mask();
1533}


1536#line 1536 "ad_x86.cpp"


1539//SourceForm

1541#line 1258 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"


1544#include "opto/addnode.hpp"
1545#include "c2_intelJccErratum_x86.hpp"

1547void PhaseOutput::pd_perform_mach_node_analysis() {
if (VM_Version::has_intel_jcc_erratum()) {
  int extra_padding = IntelJccErratum::tag_affected_machnodes(C, C->cfg(), C->regalloc());
  _buf_sizes._code += extra_padding;
}
1552}

1554int MachNode::pd_alignment_required() const {
if (VM_Version::has_intel_jcc_erratum() && IntelJccErratum::is_jcc_erratum_branch(this)) {
  // Conservatively add worst case padding. We assume that relocInfo::addr_unit() is 1 on x86.
  return IntelJccErratum::largest_jcc_size() + 1;
} else {
  return 1;
}
1561}

1563int MachNode::compute_padding(int current_offset) const {
if (flags() & Node::PD::Flag_intel_jcc_erratum) {
  Compile* C = Compile::current();
  PhaseOutput* output = C->output();
  Block* block = output->block();
  int index = output->index();
  return IntelJccErratum::compute_padding(current_offset, this, block, index, C->regalloc());
} else {
  return 0;
}
1573}

1575// Emit exception handler code.
1576// Stuff framesize into a register and call a VM stub routine.
1577int HandlerImpl::emit_exception_handler(CodeBuffer& cbuf) {

// Note that the code buffer's insts_mark is always relative to insts.
// That's why we must use the macroassembler to generate a handler.
C2_MacroAssembler _masm(&cbuf);
address base = ___masm. start_a_stub(size_exception_handler());
if (base == NULL__null) {
  ciEnv::current()->record_failure("CodeCache is full");
  return 0;  // CodeBuffer::expand failed
}
int offset = ___masm. offset();
___masm. jump(RuntimeAddress(OptoRuntime::exception_blob()->entry_point()));
assert(__ offset() - offset <= (int) size_exception_handler(), "overflow")do { if (!(_masm. offset() - offset <= (int) size_exception_handler
())) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 1305, "assert(" "_masm. offset() - offset <= (int) size_exception_handler()"
 ") failed", "overflow"); ::breakpoint(); } } while (0);
___masm. end_a_stub();
return offset;
1592}

1594// Emit deopt handler code.
1595int HandlerImpl::emit_deopt_handler(CodeBuffer& cbuf) {

// Note that the code buffer's insts_mark is always relative to insts.
// That's why we must use the macroassembler to generate a handler.
C2_MacroAssembler _masm(&cbuf);
address base = ___masm. start_a_stub(size_deopt_handler());
if (base == NULL__null) {
  ciEnv::current()->record_failure("CodeCache is full");
  return 0;  // CodeBuffer::expand failed
}
int offset = ___masm. offset();

1607#ifdef _LP641
address the_pc = (address) ___masm. pc();
Label next;
// push a "the_pc" on the stack without destroying any registers
// as they all may be live.

// push address of "next"
___masm. call(next, relocInfo::none); // reloc none is fine since it is a disp32
___masm. bind(next);
// adjust it so it matches "the_pc"
___masm. subptr(Address(rsp, 0), ___masm. offset() - offset);
1618#else
InternalAddress here(___masm. pc());
___masm. pushptr(here.addr());
1621#endif

___masm. jump(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
assert(__ offset() - offset <= (int) size_deopt_handler(), "overflow %d", (__ offset() - offset))do { if (!(_masm. offset() - offset <= (int) size_deopt_handler
())) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 1340, "assert(" "_masm. offset() - offset <= (int) size_deopt_handler()"
 ") failed", "overflow %d", (_masm. offset() - offset)); ::breakpoint
(); } } while (0);
___masm. end_a_stub();
return offset;
1627}

1629Assembler::Width widthForType(BasicType bt) {
if (bt == T_BYTE) {
  return Assembler::B;
} else if (bt == T_SHORT) {
  return Assembler::W;
} else if (bt == T_INT) {
  return Assembler::D;
} else {
  assert(bt == T_LONG, "not a long: %s", type2name(bt))do { if (!(bt == T_LONG)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 1353, "assert(" "bt == T_LONG" ") failed", "not a long: %s",
 type2name(bt)); ::breakpoint(); } } while (0);
  return Assembler::Q;
}
1640}

1642//=============================================================================

// Float masks come from different places depending on platform.
1645#ifdef _LP641
static address float_signmask()  { return StubRoutines::x86::float_sign_mask(); }
static address float_signflip()  { return StubRoutines::x86::float_sign_flip(); }
static address double_signmask() { return StubRoutines::x86::double_sign_mask(); }
static address double_signflip() { return StubRoutines::x86::double_sign_flip(); }
1650#else
static address float_signmask()  { return (address)float_signmask_pool; }
static address float_signflip()  { return (address)float_signflip_pool; }
static address double_signmask() { return (address)double_signmask_pool; }
static address double_signflip() { return (address)double_signflip_pool; }
1655#endif
static address vector_short_to_byte_mask() { return StubRoutines::x86::vector_short_to_byte_mask(); }
static address vector_int_to_byte_mask() { return StubRoutines::x86::vector_int_to_byte_mask(); }
static address vector_byte_perm_mask() { return StubRoutines::x86::vector_byte_perm_mask(); }
static address vector_long_sign_mask() { return StubRoutines::x86::vector_long_sign_mask(); }
static address vector_all_bits_set() { return StubRoutines::x86::vector_all_bits_set(); }
static address vector_int_mask_cmp_bits() { return StubRoutines::x86::vector_int_mask_cmp_bits(); }
static address vector_int_to_short_mask() { return StubRoutines::x86::vector_int_to_short_mask(); }
static address vector_byte_shufflemask() { return StubRoutines::x86::vector_byte_shuffle_mask(); }
static address vector_short_shufflemask() { return StubRoutines::x86::vector_short_shuffle_mask(); }
static address vector_int_shufflemask() { return StubRoutines::x86::vector_int_shuffle_mask(); }
static address vector_long_shufflemask() { return StubRoutines::x86::vector_long_shuffle_mask(); }
static address vector_32_bit_mask() { return StubRoutines::x86::vector_32_bit_mask(); }
static address vector_64_bit_mask() { return StubRoutines::x86::vector_64_bit_mask(); }
static address vector_float_signflip() { return StubRoutines::x86::vector_float_sign_flip();}
static address vector_double_signflip() { return StubRoutines::x86::vector_double_sign_flip();}

1672//=============================================================================
1673const bool Matcher::match_rule_supported(int opcode) {
if (!has_match_rule(opcode)) {
  return false; // no match rule present
}
const bool is_LP64 = LP64_ONLY(true)true NOT_LP64(false);
switch (opcode) {
  case Op_AbsVL:
  case Op_StoreVectorScatter:
    if (UseAVX < 3) {
      return false;
    }
    break;
  case Op_PopCountI:
  case Op_PopCountL:
    if (!UsePopCountInstruction) {
      return false;
    }
    break;
  case Op_PopCountVI:
    if (!UsePopCountInstruction || !VM_Version::supports_avx512_vpopcntdq()) {
      return false;
    }
    break;
  case Op_MulVI:
    if ((UseSSE < 4) && (UseAVX < 1)) { // only with SSE4_1 or AVX
      return false;
    }
    break;
  case Op_MulVL:
    if (UseSSE < 4) { // only with SSE4_1 or AVX
      return false;
    }
    break;
  case Op_MulReductionVL:
    if (VM_Version::supports_avx512dq() == false) {
      return false;
    }
    break;
  case Op_AddReductionVL:
    if (UseSSE < 2) { // requires at least SSE2
      return false;
    }
    break;
  case Op_AbsVB:
  case Op_AbsVS:
  case Op_AbsVI:
  case Op_AddReductionVI:
  case Op_AndReductionV:
  case Op_OrReductionV:
  case Op_XorReductionV:
    if (UseSSE < 3) { // requires at least SSSE3
      return false;
    }
    break;
  case Op_VectorLoadShuffle:
  case Op_VectorRearrange:
  case Op_MulReductionVI:
    if (UseSSE < 4) { // requires at least SSE4
      return false;
    }
    break;
  case Op_SqrtVD:
  case Op_SqrtVF:
  case Op_VectorMaskCmp:
  case Op_VectorCastB2X:
  case Op_VectorCastS2X:
  case Op_VectorCastI2X:
  case Op_VectorCastL2X:
  case Op_VectorCastF2X:
  case Op_VectorCastD2X:
    if (UseAVX < 1) { // enabled for AVX only
      return false;
    }
    break;
  case Op_CompareAndSwapL:
1748#ifdef _LP641
  case Op_CompareAndSwapP:
1750#endif
    if (!VM_Version::supports_cx8()) {
      return false;
    }
    break;
  case Op_CMoveVF:
  case Op_CMoveVD:
    if (UseAVX < 1) { // enabled for AVX only
      return false;
    }
    break;
  case Op_StrIndexOf:
    if (!UseSSE42Intrinsics) {
      return false;
    }
    break;
  case Op_StrIndexOfChar:
    if (!UseSSE42Intrinsics) {
      return false;
    }
    break;
  case Op_OnSpinWait:
    if (VM_Version::supports_on_spin_wait() == false) {
      return false;
    }
    break;
  case Op_MulVB:
  case Op_LShiftVB:
  case Op_RShiftVB:
  case Op_URShiftVB:
  case Op_VectorInsert:
  case Op_VectorLoadMask:
  case Op_VectorStoreMask:
  case Op_VectorBlend:
    if (UseSSE < 4) {
      return false;
    }
    break;
1788#ifdef _LP641
  case Op_MaxD:
  case Op_MaxF:
  case Op_MinD:
  case Op_MinF:
    if (UseAVX < 1) { // enabled for AVX only
      return false;
    }
    break;
1797#endif
  case Op_CacheWB:
  case Op_CacheWBPreSync:
  case Op_CacheWBPostSync:
    if (!VM_Version::supports_data_cache_line_flush()) {
      return false;
    }
    break;
  case Op_ExtractB:
  case Op_ExtractL:
  case Op_ExtractI:
  case Op_RoundDoubleMode:
    if (UseSSE < 4) {
      return false;
    }
    break;
  case Op_RoundDoubleModeV:
    if (VM_Version::supports_avx() == false) {
      return false; // 128bit vroundpd is not available
    }
    break;
  case Op_LoadVectorGather:
    if (UseAVX < 2) {
      return false;
    }
    break;
  case Op_FmaVD:
  case Op_FmaVF:
    if (!UseFMA) {
      return false;
    }
    break;
  case Op_MacroLogicV:
    if (UseAVX < 3 || !UseVectorMacroLogic) {
      return false;
    }
    break;

  case Op_VectorCmpMasked:
  case Op_VectorMaskGen:
  case Op_LoadVectorMasked:
  case Op_StoreVectorMasked:
    if (!is_LP64  || UseAVX < 3 || !VM_Version::supports_bmi2()) {
      return false;
    }
    break;
  case Op_VectorMaskFirstTrue:
  case Op_VectorMaskLastTrue:
  case Op_VectorMaskTrueCount:
  case Op_VectorMaskToLong:
    if (!is_LP64 || UseAVX < 1) {
       return false;
    }
    break;
  case Op_CopySignD:
  case Op_CopySignF:
    if (UseAVX < 3 || !is_LP64)  {
      return false;
    }
    if (!VM_Version::supports_avx512vl()) {
      return false;
    }
    break;
1860#ifndef _LP641
  case Op_AddReductionVF:
  case Op_AddReductionVD:
  case Op_MulReductionVF:
  case Op_MulReductionVD:
    if (UseSSE < 1) { // requires at least SSE
      return false;
    }
    break;
  case Op_MulAddVS2VI:
  case Op_RShiftVL:
  case Op_AbsVD:
  case Op_NegVD:
    if (UseSSE < 2) {
      return false;
    }
    break;
1877#endif // !LP64
  case Op_SignumF:
    if (UseSSE < 1) {
      return false;
    }
    break;
  case Op_SignumD:
    if (UseSSE < 2) {
      return false;
    }
    break;
}
return true;  // Match rules are supported by default.
1890}

1892//------------------------------------------------------------------------

1894// Identify extra cases that we might want to provide match rules for vector nodes and
1895// other intrinsics guarded with vector length (vlen) and element type (bt).
1896const bool Matcher::match_rule_supported_vector(int opcode, int vlen, BasicType bt) {
const bool is_LP64 = LP64_ONLY(true)true NOT_LP64(false);
if (!match_rule_supported(opcode)) {
  return false;
}
// Matcher::vector_size_supported() restricts vector sizes in the following way (see Matcher::vector_width_in_bytes):
//   * SSE2 supports 128bit vectors for all types;
//   * AVX1 supports 256bit vectors only for FLOAT and DOUBLE types;
//   * AVX2 supports 256bit vectors for all types;
//   * AVX512F supports 512bit vectors only for INT, FLOAT, and DOUBLE types;
//   * AVX512BW supports 512bit vectors for BYTE, SHORT, and CHAR types.
// There's also a limit on minimum vector size supported: 2 elements (or 4 bytes for BYTE).
// And MaxVectorSize is taken into account as well.
if (!vector_size_supported(bt, vlen)) {
  return false;
}
// Special cases which require vector length follow:
//   * implementation limitations
//   * some 512bit vector operations on FLOAT and DOUBLE types require AVX512DQ
//   * 128bit vroundpd instruction is present only in AVX1
int size_in_bits = vlen * type2aelembytes(bt) * BitsPerByte;
switch (opcode) {
  case Op_AbsVF:
  case Op_NegVF:
    if ((vlen == 16) && (VM_Version::supports_avx512dq() == false)) {
      return false; // 512bit vandps and vxorps are not available
    }
    break;
  case Op_AbsVD:
  case Op_NegVD:
  case Op_MulVL:
    if ((vlen == 8) && (VM_Version::supports_avx512dq() == false)) {
      return false; // 512bit vpmullq, vandpd and vxorpd are not available
    }
    break;
  case Op_CMoveVF:
    if (vlen != 8) {
      return false; // implementation limitation (only vcmov8F_reg is present)
    }
    break;
  case Op_RotateRightV:
  case Op_RotateLeftV:
    if (bt != T_INT && bt != T_LONG) {
      return false;
    } // fallthrough
  case Op_MacroLogicV:
    if (!VM_Version::supports_evex() ||
        ((size_in_bits != 512) && !VM_Version::supports_avx512vl())) {
      return false;
    }
    break;
  case Op_ClearArray:
  case Op_VectorMaskGen:
  case Op_VectorCmpMasked:
  case Op_LoadVectorMasked:
  case Op_StoreVectorMasked:
    if (!is_LP64 || !VM_Version::supports_avx512bw()) {
      return false;
    }
    if ((size_in_bits != 512) && !VM_Version::supports_avx512vl()) {
      return false;
    }
    break;
  case Op_CMoveVD:
    if (vlen != 4) {
      return false; // implementation limitation (only vcmov4D_reg is present)
    }
    break;
  case Op_MaxV:
  case Op_MinV:
    if (UseSSE < 4 && is_integral_type(bt)) {
      return false;
    }
    if ((bt == T_FLOAT || bt == T_DOUBLE)) {
        // Float/Double intrinsics are enabled for AVX family currently.
        if (UseAVX == 0) {
          return false;
        }
        if (UseAVX > 2 && (!VM_Version::supports_avx512dq() && size_in_bits == 512)) { // 512 bit Float/Double intrinsics need AVX512DQ
          return false;
        }
    }
    break;
  case Op_CallLeafVector:
    if (size_in_bits == 512 && !VM_Version::supports_avx512vlbwdq()) {
      return false;
    }
    break;
  case Op_AddReductionVI:
    if (bt == T_INT && (UseSSE < 3 || !VM_Version::supports_ssse3())) {
      return false;
    }
    // fallthrough
  case Op_AndReductionV:
  case Op_OrReductionV:
  case Op_XorReductionV:
    if (is_subword_type(bt) && (UseSSE < 4)) {
      return false;
    }
1995#ifndef _LP641
    if (bt == T_BYTE || bt == T_LONG) {
      return false;
    }
1999#endif
    break;
2001#ifndef _LP641
  case Op_VectorInsert:
    if (bt == T_LONG || bt == T_DOUBLE) {
      return false;
    }
    break;
2007#endif
  case Op_MinReductionV:
  case Op_MaxReductionV:
    if ((bt == T_INT || is_subword_type(bt)) && UseSSE < 4) {
      return false;
    } else if (bt == T_LONG && (UseAVX < 3 || !VM_Version::supports_avx512vlbwdq())) {
      return false;
    }
    // Float/Double intrinsics enabled for AVX family.
    if (UseAVX == 0 && (bt == T_FLOAT || bt == T_DOUBLE)) {
      return false;
    }
    if (UseAVX > 2 && (!VM_Version::supports_avx512dq() && size_in_bits == 512)) {
      return false;
    }
2022#ifndef _LP641
    if (bt == T_BYTE || bt == T_LONG) {
      return false;
    }
2026#endif
    break;
  case Op_VectorTest:
    if (UseSSE < 4) {
      return false; // Implementation limitation
    } else if (size_in_bits < 32) {
      return false; // Implementation limitation
    } else if (size_in_bits == 512 && (VM_Version::supports_avx512bw() == false)) {
      return false; // Implementation limitation
    }
    break;
  case Op_VectorLoadShuffle:
  case Op_VectorRearrange:
    if(vlen == 2) {
      return false; // Implementation limitation due to how shuffle is loaded
    } else if (size_in_bits == 256 && UseAVX < 2) {
      return false; // Implementation limitation
    } else if (bt == T_BYTE && size_in_bits > 256 && !VM_Version::supports_avx512_vbmi())  {
      return false; // Implementation limitation
    } else if (bt == T_SHORT && size_in_bits > 256 && !VM_Version::supports_avx512bw())  {
      return false; // Implementation limitation
    }
    break;
  case Op_VectorLoadMask:
    if (size_in_bits == 256 && UseAVX < 2) {
      return false; // Implementation limitation
    }
    // fallthrough
  case Op_VectorStoreMask:
    if (vlen == 2) {
      return false; // Implementation limitation
    }
    break;
  case Op_VectorCastB2X:
    if (size_in_bits == 256 && UseAVX < 2) {
      return false; // Implementation limitation
    }
    break;
  case Op_VectorCastS2X:
    if (is_integral_type(bt) && size_in_bits == 256 && UseAVX < 2) {
      return false;
    }
    break;
  case Op_VectorCastI2X:
    if (is_integral_type(bt) && size_in_bits == 256 && UseAVX < 2) {
      return false;
    }
    break;
  case Op_VectorCastL2X:
    if (is_integral_type(bt) && size_in_bits == 256 && UseAVX < 2) {
      return false;
    } else if (!is_integral_type(bt) && !VM_Version::supports_avx512dq()) {
      return false;
    }
    break;
  case Op_VectorCastD2X:
    if (is_subword_type(bt) || bt == T_INT) {
      return false;
    }
    if (bt == T_LONG && !VM_Version::supports_avx512dq()) {
      return false;
    }
    break;
  case Op_VectorCastF2X:
    if (is_subword_type(bt) || bt == T_LONG) {
      return false;
    }
    break;
  case Op_MulReductionVI:
    if (bt == T_BYTE && size_in_bits == 512 && !VM_Version::supports_avx512bw()) {
      return false;
    }
    break;
  case Op_LoadVectorGatherMasked:
  case Op_StoreVectorScatterMasked:
  case Op_StoreVectorScatter:
    if(is_subword_type(bt)) {
      return false;
    } else if (size_in_bits < 512 && !VM_Version::supports_avx512vl()) {
      return false;
    }
    // fallthrough
  case Op_LoadVectorGather:
    if (size_in_bits == 64 ) {
      return false;
    }
    break;
  case Op_MaskAll:
    if (!is_LP64 || !VM_Version::supports_evex()) {
      return false;
    }
    if ((vlen > 16 || is_subword_type(bt)) && !VM_Version::supports_avx512bw()) {
      return false;
    }
    if (size_in_bits < 512 && !VM_Version::supports_avx512vl()) {
      return false;
    }
    break;
  case Op_VectorMaskCmp:
    if (vlen < 2 || size_in_bits < 32) {
      return false;
    }
    break;
  case Op_VectorLongToMask:
    if (UseAVX < 1 || !is_LP64) {
      return false;
    }
    if (UseAVX < 3 && !VM_Version::supports_bmi2()) {
      return false;
    }
    break;
}
return true;  // Per default match rules are supported.
2139}

2141const bool Matcher::match_rule_supported_vector_masked(int opcode, int vlen, BasicType bt) {
// ADLC based match_rule_supported routine checks for the existence of pattern based
// on IR opcode. Most of the unary/binary/ternary masked operation share the IR nodes
// of their non-masked counterpart with mask edge being the differentiator.
// This routine does a strict check on the existence of masked operation patterns
// by returning a default false value for all the other opcodes apart from the
// ones whose masked instruction patterns are defined in this file.
if (!match_rule_supported_vector(opcode, vlen, bt)) {
  return false;
}

const bool is_LP64 = LP64_ONLY(true)true NOT_LP64(false);
int size_in_bits = vlen * type2aelembytes(bt) * BitsPerByte;
if (size_in_bits != 512 && !VM_Version::supports_avx512vl()) {
  return false;
}
switch(opcode) {
  // Unary masked operations
  case Op_AbsVB:
  case Op_AbsVS:
    if(!VM_Version::supports_avx512bw()) {
      return false;  // Implementation limitation
    }
  case Op_AbsVI:
  case Op_AbsVL:
    return true;

  // Ternary masked operations
  case Op_FmaVF:
  case Op_FmaVD:
    return true;

  // Binary masked operations
  case Op_AddVB:
  case Op_AddVS:
  case Op_SubVB:
  case Op_SubVS:
  case Op_MulVS:
  case Op_LShiftVS:
  case Op_RShiftVS:
  case Op_URShiftVS:
    assert(size_in_bits == 512 || VM_Version::supports_avx512vl(), "")do { if (!(size_in_bits == 512 || VM_Version::supports_avx512vl
())) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 1898, "assert(" "size_in_bits == 512 || VM_Version::supports_avx512vl()"
 ") failed", ""); ::breakpoint(); } } while (0);
    if (!VM_Version::supports_avx512bw()) {
      return false;  // Implementation limitation
    }
    return true;

  case Op_MulVL:
    assert(size_in_bits == 512 || VM_Version::supports_avx512vl(), "")do { if (!(size_in_bits == 512 || VM_Version::supports_avx512vl
())) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 1905, "assert(" "size_in_bits == 512 || VM_Version::supports_avx512vl()"
 ") failed", ""); ::breakpoint(); } } while (0);
    if (!VM_Version::supports_avx512dq()) {
      return false;  // Implementation limitation
    }
    return true;

  case Op_AndV:
  case Op_OrV:
  case Op_XorV:
  case Op_RotateRightV:
  case Op_RotateLeftV:
    if (bt != T_INT && bt != T_LONG) {
      return false; // Implementation limitation
    }
    return true;

  case Op_VectorLoadMask:
    assert(size_in_bits == 512 || VM_Version::supports_avx512vl(), "")do { if (!(size_in_bits == 512 || VM_Version::supports_avx512vl
())) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 1922, "assert(" "size_in_bits == 512 || VM_Version::supports_avx512vl()"
 ") failed", ""); ::breakpoint(); } } while (0);
    if (is_subword_type(bt) && !VM_Version::supports_avx512bw()) {
      return false;
    }
    return true;

  case Op_AddVI:
  case Op_AddVL:
  case Op_AddVF:
  case Op_AddVD:
  case Op_SubVI:
  case Op_SubVL:
  case Op_SubVF:
  case Op_SubVD:
  case Op_MulVI:
  case Op_MulVF:
  case Op_MulVD:
  case Op_DivVF:
  case Op_DivVD:
  case Op_SqrtVF:
  case Op_SqrtVD:
  case Op_LShiftVI:
  case Op_LShiftVL:
  case Op_RShiftVI:
  case Op_RShiftVL:
  case Op_URShiftVI:
  case Op_URShiftVL:
  case Op_LoadVectorMasked:
  case Op_StoreVectorMasked:
  case Op_LoadVectorGatherMasked:
  case Op_StoreVectorScatterMasked:
    return true;

  case Op_MaxV:
  case Op_MinV:
    if (is_subword_type(bt) && !VM_Version::supports_avx512bw()) {
      return false; // Implementation limitation
    }
    if (is_floating_point_type(bt)) {
      return false; // Implementation limitation
    }
    return true;

  case Op_VectorMaskCmp:
    if (is_subword_type(bt) && !VM_Version::supports_avx512bw()) {
      return false; // Implementation limitation
    }
    return true;

  case Op_VectorRearrange:
    if (bt == T_SHORT && !VM_Version::supports_avx512bw()) {
      return false; // Implementation limitation
    }
    if (bt == T_BYTE && !VM_Version::supports_avx512_vbmi()) {
      return false; // Implementation limitation
    } else if ((bt == T_INT || bt == T_FLOAT) && size_in_bits < 256) {
      return false; // Implementation limitation
    }
    return true;

  // Binary Logical operations
  case Op_AndVMask:
  case Op_OrVMask:
  case Op_XorVMask:
    if (vlen > 16 && !VM_Version::supports_avx512bw()) {
      return false; // Implementation limitation
    }
    return true;

  case Op_MaskAll:
    return true;

  default:
    return false;
}
2281}

2283MachOper* Matcher::pd_specialize_generic_vector_operand(MachOper* generic_opnd, uint ideal_reg, bool is_temp) {
assert(Matcher::is_generic_vector(generic_opnd), "not generic")do { if (!(Matcher::is_generic_vector(generic_opnd))) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 2000, "assert(" "Matcher::is_generic_vector(generic_opnd)" ") failed"
, "not generic"); ::breakpoint(); } } while (0);
bool legacy = (generic_opnd->opcode() == LEGVEC);
if (!VM_Version::supports_avx512vlbwdq() && // KNL
    is_temp && !legacy && (ideal_reg == Op_VecZ)) {
  // Conservatively specialize 512bit vec TEMP operands to legVecZ (zmm0-15) on KNL.
  return new legVecZOper();
}
if (legacy) {
  switch (ideal_reg) {
    case Op_VecS: return new legVecSOper();
    case Op_VecD: return new legVecDOper();
    case Op_VecX: return new legVecXOper();
    case Op_VecY: return new legVecYOper();
    case Op_VecZ: return new legVecZOper();
  }
} else {
  switch (ideal_reg) {
    case Op_VecS: return new vecSOper();
    case Op_VecD: return new vecDOper();
    case Op_VecX: return new vecXOper();
    case Op_VecY: return new vecYOper();
    case Op_VecZ: return new vecZOper();
  }
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2024
); ::breakpoint(); } while (0);
return NULL__null;
2310}

2312bool Matcher::is_reg2reg_move(MachNode* m) {
switch (m->rule()) {
  case MoveVec2Leg_rule:
  case MoveLeg2Vec_rule:
  case MoveF2VL_rule:
  case MoveF2LEG_rule:
  case MoveVL2F_rule:
  case MoveLEG2F_rule:
  case MoveD2VL_rule:
  case MoveD2LEG_rule:
  case MoveVL2D_rule:
  case MoveLEG2D_rule:
    return true;
  default:
    return false;
}
2328}

2330bool Matcher::is_generic_vector(MachOper* opnd) {
switch (opnd->opcode()) {
  case VEC:
  case LEGVEC:
    return true;
  default:
    return false;
}
2338}

2340//------------------------------------------------------------------------

2342const RegMask* Matcher::predicate_reg_mask(void) {
return &_VECTMASK_REG_mask;
2344}

2346const TypeVectMask* Matcher::predicate_reg_type(const Type* elemTy, int length) {
return new TypeVectMask(elemTy, length);
2348}

2350// Max vector size in bytes. 0 if not supported.
2351const int Matcher::vector_width_in_bytes(BasicType bt) {
assert(is_java_primitive(bt), "only primitive type vectors")do { if (!(is_java_primitive(bt))) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 2068, "assert(" "is_java_primitive(bt)" ") failed", "only primitive type vectors"
); ::breakpoint(); } } while (0);
if (UseSSE < 2) return 0;
// SSE2 supports 128bit vectors for all types.
// AVX2 supports 256bit vectors for all types.
// AVX2/EVEX supports 512bit vectors for all types.
int size = (UseAVX > 1) ? (1 << UseAVX) * 8 : 16;
// AVX1 supports 256bit vectors only for FLOAT and DOUBLE.
if (UseAVX > 0 && (bt == T_FLOAT || bt == T_DOUBLE))
  size = (UseAVX > 2) ? 64 : 32;
if (UseAVX > 2 && (bt == T_BYTE || bt == T_SHORT || bt == T_CHAR))
  size = (VM_Version::supports_avx512bw()) ? 64 : 32;
// Use flag to limit vector size.
size = MIN2(size,(int)MaxVectorSize);
// Minimum 2 values in vector (or 4 for bytes).
switch (bt) {
case T_DOUBLE:
case T_LONG:
  if (size < 16) return 0;
  break;
case T_FLOAT:
case T_INT:
  if (size < 8) return 0;
  break;
case T_BOOLEAN:
  if (size < 4) return 0;
  break;
case T_CHAR:
  if (size < 4) return 0;
  break;
case T_BYTE:
  if (size < 4) return 0;
  break;
case T_SHORT:
  if (size < 4) return 0;
  break;
default:
  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2104
); ::breakpoint(); } while (0);
}
return size;
2391}

2393// Limits on vector size (number of elements) loaded into vector.
2394const int Matcher::max_vector_size(const BasicType bt) {
return vector_width_in_bytes(bt)/type2aelembytes(bt);
2396}
2397const int Matcher::min_vector_size(const BasicType bt) {
int max_size = max_vector_size(bt);
// Min size which can be loaded into vector is 4 bytes.
int size = (type2aelembytes(bt) == 1) ? 4 : 2;
// Support for calling svml double64 vectors
if (bt == T_DOUBLE) {
  size = 1;
}
return MIN2(size,max_size);
2406}

2408const int Matcher::scalable_vector_reg_size(const BasicType bt) {
return -1;
2410}

2412// Vector ideal reg corresponding to specified size in bytes
2413const uint Matcher::vector_ideal_reg(int size) {
assert(MaxVectorSize >= size, "")do { if (!(MaxVectorSize >= size)) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 2130, "assert(" "MaxVectorSize >= size" ") failed", "");
 ::breakpoint(); } } while (0);
switch(size) {
  case  4: return Op_VecS;
  case  8: return Op_VecD;
  case 16: return Op_VecX;
  case 32: return Op_VecY;
  case 64: return Op_VecZ;
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2138
); ::breakpoint(); } while (0);
return 0;
2424}

2426// Check for shift by small constant as well
2427static bool clone_shift(Node* shift, Matcher* matcher, Matcher::MStack& mstack, VectorSet& address_visited) {
if (shift->Opcode() == Op_LShiftXOp_LShiftL && shift->in(2)->is_Con() &&
    shift->in(2)->get_int() <= 3 &&
    // Are there other uses besides address expressions?
    !matcher->is_visited(shift)) {
  address_visited.set(shift->_idx); // Flag as address_visited
  mstack.push(shift->in(2), Matcher::Visit);
  Node *conv = shift->in(1);
2435#ifdef _LP641
  // Allow Matcher to match the rule which bypass
  // ConvI2L operation for an array index on LP64
  // if the index value is positive.
  if (conv->Opcode() == Op_ConvI2L &&
      conv->as_Type()->type()->is_long()->_lo >= 0 &&
      // Are there other uses besides address expressions?
      !matcher->is_visited(conv)) {
    address_visited.set(conv->_idx); // Flag as address_visited
    mstack.push(conv->in(1), Matcher::Pre_Visit);
  } else
2446#endif
    mstack.push(conv, Matcher::Pre_Visit);
  return true;
}
return false;
2451}

2453// This function identifies sub-graphs in which a 'load' node is
2454// input to two different nodes, and such that it can be matched
2455// with BMI instructions like blsi, blsr, etc.
2456// Example : for b = -a[i] & a[i] can be matched to blsi r32, m32.
2457// The graph is (AndL (SubL Con0 LoadL*) LoadL*), where LoadL*
2458// refers to the same node.
2459//
2460// Match the generic fused operations pattern (op1 (op2 Con{ConType} mop) mop)
2461// This is a temporary solution until we make DAGs expressible in ADL.
2462template<typename ConType>
2463class FusedPatternMatcher {
Node* _op1_node;
Node* _mop_node;
int _con_op;

static int match_next(Node* n, int next_op, int next_op_idx) {
  if (n->in(1) == NULL__null || n->in(2) == NULL__null) {
    return -1;
  }

  if (next_op_idx == -1) { // n is commutative, try rotations
    if (n->in(1)->Opcode() == next_op) {
      return 1;
    } else if (n->in(2)->Opcode() == next_op) {
      return 2;
    }
  } else {
    assert(next_op_idx > 0 && next_op_idx <= 2, "Bad argument index")do { if (!(next_op_idx > 0 && next_op_idx <= 2)
) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 2196, "assert(" "next_op_idx > 0 && next_op_idx <= 2"
 ") failed", "Bad argument index"); ::breakpoint(); } } while
 (0);
    if (n->in(next_op_idx)->Opcode() == next_op) {
      return next_op_idx;
    }
  }
  return -1;
}

public:
FusedPatternMatcher(Node* op1_node, Node* mop_node, int con_op) :
  _op1_node(op1_node), _mop_node(mop_node), _con_op(con_op) { }

bool match(int op1, int op1_op2_idx,  // op1 and the index of the op1->op2 edge, -1 if op1 is commutative
           int op2, int op2_con_idx,  // op2 and the index of the op2->con edge, -1 if op2 is commutative
           typename ConType::NativeType con_value) {
  if (_op1_node->Opcode() != op1) {
    return false;
  }
  if (_mop_node->outcnt() > 2) {
    return false;
  }
  op1_op2_idx = match_next(_op1_node, op2, op1_op2_idx);
  if (op1_op2_idx == -1) {
    return false;
  }
  // Memory operation must be the other edge
  int op1_mop_idx = (op1_op2_idx & 1) + 1;

  // Check that the mop node is really what we want
  if (_op1_node->in(op1_mop_idx) == _mop_node) {
    Node* op2_node = _op1_node->in(op1_op2_idx);
    if (op2_node->outcnt() > 1) {
      return false;
    }
    assert(op2_node->Opcode() == op2, "Should be")do { if (!(op2_node->Opcode() == op2)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 2230, "assert(" "op2_node->Opcode() == op2" ") failed", "Should be"
); ::breakpoint(); } } while (0);
    op2_con_idx = match_next(op2_node, _con_op, op2_con_idx);
    if (op2_con_idx == -1) {
      return false;
    }
    // Memory operation must be the other edge
    int op2_mop_idx = (op2_con_idx & 1) + 1;
    // Check that the memory operation is the same node
    if (op2_node->in(op2_mop_idx) == _mop_node) {
      // Now check the constant
      const Type* con_type = op2_node->in(op2_con_idx)->bottom_type();
      if (con_type != Type::TOP && ConType::as_self(con_type)->get_con() == con_value) {
        return true;
      }
    }
  }
  return false;
}
2532};

2534static bool is_bmi_pattern(Node* n, Node* m) {
assert(UseBMI1Instructions, "sanity")do { if (!(UseBMI1Instructions)) { (*g_assert_poison) = 'X';;
 report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 2251, "assert(" "UseBMI1Instructions" ") failed", "sanity")
; ::breakpoint(); } } while (0);
if (n != NULL__null && m != NULL__null) {
  if (m->Opcode() == Op_LoadI) {
    FusedPatternMatcher<TypeInt> bmii(n, m, Op_ConI);
    return bmii.match(Op_AndI, -1, Op_SubI,  1,  0)  ||
           bmii.match(Op_AndI, -1, Op_AddI, -1, -1)  ||
           bmii.match(Op_XorI, -1, Op_AddI, -1, -1);
  } else if (m->Opcode() == Op_LoadL) {
    FusedPatternMatcher<TypeLong> bmil(n, m, Op_ConL);
    return bmil.match(Op_AndL, -1, Op_SubL,  1,  0) ||
           bmil.match(Op_AndL, -1, Op_AddL, -1, -1) ||
           bmil.match(Op_XorL, -1, Op_AddL, -1, -1);
  }
}
return false;
2550}

2552// Should the matcher clone input 'm' of node 'n'?
2553bool Matcher::pd_clone_node(Node* n, Node* m, Matcher::MStack& mstack) {
// If 'n' and 'm' are part of a graph for BMI instruction, clone the input 'm'.
if (UseBMI1Instructions && is_bmi_pattern(n, m)) {
  mstack.push(m, Visit);
  return true;
}
if (is_vshift_con_pattern(n, m)) { // ShiftV src (ShiftCntV con)
  mstack.push(m, Visit);           // m = ShiftCntV
  return true;
}
return false;
2564}

2566// Should the Matcher clone shifts on addressing modes, expecting them
2567// to be subsumed into complex addressing expressions or compute them
2568// into registers?
2569bool Matcher::pd_clone_address_expressions(AddPNode* m, Matcher::MStack& mstack, VectorSet& address_visited) {
Node *off = m->in(AddPNode::Offset);
if (off->is_Con()) {
  address_visited.test_set(m->_idx); // Flag as address_visited
  Node *adr = m->in(AddPNode::Address);

  // Intel can handle 2 adds in addressing mode
  // AtomicAdd is not an addressing expression.
  // Cheap to find it by looking for screwy base.
  if (adr->is_AddP() &&
      !adr->in(AddPNode::Base)->is_top() &&
      LP64_ONLY( off->get_long() == (int) (off->get_long()) && )off->get_long() == (int) (off->get_long()) && // immL32
      // Are there other uses besides address expressions?
      !is_visited(adr)) {
    address_visited.set(adr->_idx); // Flag as address_visited
    Node *shift = adr->in(AddPNode::Offset);
    if (!clone_shift(shift, this, mstack, address_visited)) {
      mstack.push(shift, Pre_Visit);
    }
    mstack.push(adr->in(AddPNode::Address), Pre_Visit);
    mstack.push(adr->in(AddPNode::Base), Pre_Visit);
  } else {
    mstack.push(adr, Pre_Visit);
  }

  // Clone X+offset as it also folds into most addressing expressions
  mstack.push(off, Visit);
  mstack.push(m->in(AddPNode::Base), Pre_Visit);
  return true;
} else if (clone_shift(off, this, mstack, address_visited)) {
  address_visited.test_set(m->_idx); // Flag as address_visited
  mstack.push(m->in(AddPNode::Address), Pre_Visit);
  mstack.push(m->in(AddPNode::Base), Pre_Visit);
  return true;
}
return false;
2605}

2607static inline Assembler::ComparisonPredicate booltest_pred_to_comparison_pred(int bt) {
switch (bt) {
  case BoolTest::eq:
    return Assembler::eq;
  case BoolTest::ne:
    return Assembler::neq;
  case BoolTest::le:
  case BoolTest::ule:
    return Assembler::le;
  case BoolTest::ge:
  case BoolTest::uge:
    return Assembler::nlt;
  case BoolTest::lt:
  case BoolTest::ult:
    return Assembler::lt;
  case BoolTest::gt:
  case BoolTest::ugt:
    return Assembler::nle;
  default : ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2341
); ::breakpoint(); } while (0); return Assembler::_false;
}
2627}

2629static inline Assembler::ComparisonPredicateFP booltest_pred_to_comparison_pred_fp(int bt) {
switch (bt) {
case BoolTest::eq: return Assembler::EQ_OQ;  // ordered non-signaling
// As per JLS 15.21.1, != of NaNs is true. Thus use unordered compare.
case BoolTest::ne: return Assembler::NEQ_UQ; // unordered non-signaling
case BoolTest::le: return Assembler::LE_OQ;  // ordered non-signaling
case BoolTest::ge: return Assembler::GE_OQ;  // ordered non-signaling
case BoolTest::lt: return Assembler::LT_OQ;  // ordered non-signaling
case BoolTest::gt: return Assembler::GT_OQ;  // ordered non-signaling
default: ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2354
); ::breakpoint(); } while (0); return Assembler::FALSE_OS;
}
2640}

2642// Helper methods for MachSpillCopyNode::implementation().
2643static void vec_mov_helper(CodeBuffer *cbuf, int src_lo, int dst_lo,
                        int src_hi, int dst_hi, uint ireg, outputStream* st) {
assert(ireg == Op_VecS || // 32bit vectordo { if (!(ireg == Op_VecS || (src_lo & 1) == 0 &&
 (src_lo + 1) == src_hi && (dst_lo & 1) == 0 &&
 (dst_lo + 1) == dst_hi)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 2364, "assert(" "ireg == Op_VecS || (src_lo & 1) == 0 && (src_lo + 1) == src_hi && (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi"
 ") failed", "no non-adjacent vector moves"); ::breakpoint();
 } } while (0)
       (src_lo & 1) == 0 && (src_lo + 1) == src_hi &&do { if (!(ireg == Op_VecS || (src_lo & 1) == 0 &&
 (src_lo + 1) == src_hi && (dst_lo & 1) == 0 &&
 (dst_lo + 1) == dst_hi)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 2364, "assert(" "ireg == Op_VecS || (src_lo & 1) == 0 && (src_lo + 1) == src_hi && (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi"
 ") failed", "no non-adjacent vector moves"); ::breakpoint();
 } } while (0)
       (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi,do { if (!(ireg == Op_VecS || (src_lo & 1) == 0 &&
 (src_lo + 1) == src_hi && (dst_lo & 1) == 0 &&
 (dst_lo + 1) == dst_hi)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 2364, "assert(" "ireg == Op_VecS || (src_lo & 1) == 0 && (src_lo + 1) == src_hi && (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi"
 ") failed", "no non-adjacent vector moves"); ::breakpoint();
 } } while (0)
       "no non-adjacent vector moves" )do { if (!(ireg == Op_VecS || (src_lo & 1) == 0 &&
 (src_lo + 1) == src_hi && (dst_lo & 1) == 0 &&
 (dst_lo + 1) == dst_hi)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 2364, "assert(" "ireg == Op_VecS || (src_lo & 1) == 0 && (src_lo + 1) == src_hi && (dst_lo & 1) == 0 && (dst_lo + 1) == dst_hi"
 ") failed", "no non-adjacent vector moves"); ::breakpoint();
 } } while (0);
if (cbuf) {
  C2_MacroAssembler _masm(cbuf);
  switch (ireg) {
  case Op_VecS: // copy whole register
  case Op_VecD:
  case Op_VecX:
2655#ifndef _LP641
    ___masm. movdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
2657#else
    if ((UseAVX < 3) || VM_Version::supports_avx512vl()) {
      ___masm. movdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
    } else {
      ___masm. vextractf32x4(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]), 0x0);
   }
2663#endif
    break;
  case Op_VecY:
2666#ifndef _LP641
    ___masm. vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
2668#else
    if ((UseAVX < 3) || VM_Version::supports_avx512vl()) {
      ___masm. vmovdqu(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]));
    } else {
      ___masm. vextractf64x4(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]), 0x0);
   }
2674#endif
    break;
  case Op_VecZ:
    ___masm. evmovdquq(as_XMMRegister(Matcher::_regEncode[dst_lo]), as_XMMRegister(Matcher::_regEncode[src_lo]), 2);
    break;
  default:
    ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2396
); ::breakpoint(); } while (0);
  }
2682#ifndef PRODUCT
} else {
  switch (ireg) {
  case Op_VecS:
  case Op_VecD:
  case Op_VecX:
    st->print("movdqu  %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
    break;
  case Op_VecY:
  case Op_VecZ:
    st->print("vmovdqu %s,%s\t# spill",Matcher::regName[dst_lo],Matcher::regName[src_lo]);
    break;
  default:
    ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2411
); ::breakpoint(); } while (0);
  }
2697#endif
}
2699}

2701void vec_spill_helper(CodeBuffer *cbuf, bool is_load,
                   int stack_offset, int reg, uint ireg, outputStream* st) {
if (cbuf) {
  C2_MacroAssembler _masm(cbuf);
  if (is_load) {
    switch (ireg) {
    case Op_VecS:
      ___masm. movdl(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
      break;
    case Op_VecD:
      ___masm. movq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
      break;
    case Op_VecX:
2714#ifndef _LP641
      ___masm. movdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
2716#else
      if ((UseAVX < 3) || VM_Version::supports_avx512vl()) {
        ___masm. movdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
      } else {
        ___masm. vpxor(as_XMMRegister(Matcher::_regEncode[reg]), as_XMMRegister(Matcher::_regEncode[reg]), as_XMMRegister(Matcher::_regEncode[reg]), 2);
        ___masm. vinsertf32x4(as_XMMRegister(Matcher::_regEncode[reg]), as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset),0x0);
      }
2723#endif
      break;
    case Op_VecY:
2726#ifndef _LP641
      ___masm. vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
2728#else
      if ((UseAVX < 3) || VM_Version::supports_avx512vl()) {
        ___masm. vmovdqu(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset));
      } else {
        ___masm. vpxor(as_XMMRegister(Matcher::_regEncode[reg]), as_XMMRegister(Matcher::_regEncode[reg]), as_XMMRegister(Matcher::_regEncode[reg]), 2);
        ___masm. vinsertf64x4(as_XMMRegister(Matcher::_regEncode[reg]), as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset),0x0);
      }
2735#endif
      break;
    case Op_VecZ:
      ___masm. evmovdquq(as_XMMRegister(Matcher::_regEncode[reg]), Address(rsp, stack_offset), 2);
      break;
    default:
      ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2457
); ::breakpoint(); } while (0);
    }
  } else { // store
    switch (ireg) {
    case Op_VecS:
      ___masm. movdl(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
      break;
    case Op_VecD:
      ___masm. movq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
      break;
    case Op_VecX:
2752#ifndef _LP641
      ___masm. movdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
2754#else
      if ((UseAVX < 3) || VM_Version::supports_avx512vl()) {
        ___masm. movdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
      }
      else {
        ___masm. vextractf32x4(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]), 0x0);
      }
2761#endif
      break;
    case Op_VecY:
2764#ifndef _LP641
      ___masm. vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
2766#else
      if ((UseAVX < 3) || VM_Version::supports_avx512vl()) {
        ___masm. vmovdqu(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]));
      }
      else {
        ___masm. vextractf64x4(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]), 0x0);
      }
2773#endif
      break;
    case Op_VecZ:
      ___masm. evmovdquq(Address(rsp, stack_offset), as_XMMRegister(Matcher::_regEncode[reg]), 2);
      break;
    default:
      ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2495
); ::breakpoint(); } while (0);
    }
  }
2782#ifndef PRODUCT
} else {
  if (is_load) {
    switch (ireg) {
    case Op_VecS:
      st->print("movd    %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
      break;
    case Op_VecD:
      st->print("movq    %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
      break;
     case Op_VecX:
      st->print("movdqu  %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
      break;
    case Op_VecY:
    case Op_VecZ:
      st->print("vmovdqu %s,[rsp + %d]\t# spill", Matcher::regName[reg], stack_offset);
      break;
    default:
      ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2516
); ::breakpoint(); } while (0);
    }
  } else { // store
    switch (ireg) {
    case Op_VecS:
      st->print("movd    [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
      break;
    case Op_VecD:
      st->print("movq    [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
      break;
     case Op_VecX:
      st->print("movdqu  [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
      break;
    case Op_VecY:
    case Op_VecZ:
      st->print("vmovdqu [rsp + %d],%s\t# spill", stack_offset, Matcher::regName[reg]);
      break;
    default:
      ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 2534
); ::breakpoint(); } while (0);
    }
  }
2821#endif
}
2823}

2825static inline jlong replicate8_imm(int con, int width) {
// Load a constant of "width" (in bytes) and replicate it to fill 64bit.
assert(width == 1 || width == 2 || width == 4, "only byte, short or int types here")do { if (!(width == 1 || width == 2 || width == 4)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 2543, "assert(" "width == 1 || width == 2 || width == 4" ") failed"
, "only byte, short or int types here"); ::breakpoint(); } } while
 (0);
int bit_width = width * 8;
jlong val = con;
val &= (((jlong) 1) << bit_width) - 1;  // mask off sign bits
while(bit_width < 64) {
  val |= (val << bit_width);
  bit_width <<= 1;
}
return val;
2836}

2838#ifndef PRODUCT
void MachNopNode::format(PhaseRegAlloc*, outputStream* st) const {
  st->print("nop \t# %d bytes pad for loops and calls", _count);
}
2842#endif

void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc*) const {
  C2_MacroAssembler _masm(&cbuf);
  ___masm. nop(_count);
}

uint MachNopNode::size(PhaseRegAlloc*) const {
  return _count;
}

2853#ifndef PRODUCT
void MachBreakpointNode::format(PhaseRegAlloc*, outputStream* st) const {
  st->print("# breakpoint");
}
2857#endif

void MachBreakpointNode::emit(CodeBuffer &cbuf, PhaseRegAlloc* ra_) const {
  C2_MacroAssembler _masm(&cbuf);
  ___masm. int3();
}

uint MachBreakpointNode::size(PhaseRegAlloc* ra_) const {
  return MachNode::size(ra_);
}


2869#line 2869 "ad_x86.cpp"


2872//SourceForm

2874#line 32 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/z/z_x86_64.ad"


2877#include "c2_intelJccErratum_x86.hpp"

2879static void z_load_barrier(MacroAssembler& _masm, const MachNode* node, Address ref_addr, Register ref, Register tmp, uint8_t barrier_data) {
if (barrier_data == ZLoadBarrierElided) {
  return;			// Elided.
}
ZLoadBarrierStubC2* const stub = ZLoadBarrierStubC2::create(node, ref_addr, ref, tmp, barrier_data);
{
  IntelJccErratumAlignment intel_alignment(_masm, 10 /* jcc_size */);
  ___masm. testptr(ref, Address(r15_thread, ZThreadLocalData::address_bad_mask_offset()));
  ___masm. jcc(Assembler::notZero, *stub->entry());
}
___masm. bind(*stub->continuation());
2890}

2892static void z_load_barrier_cmpxchg(MacroAssembler& _masm, const MachNode* node, Address ref_addr, Register ref, Register tmp, Label& good) {
ZLoadBarrierStubC2* const stub = ZLoadBarrierStubC2::create(node, ref_addr, ref, tmp, ZLoadBarrierStrong);
{
  IntelJccErratumAlignment intel_alignment(_masm, 10 /* jcc_size */);
  ___masm. testptr(ref, Address(r15_thread, ZThreadLocalData::address_bad_mask_offset()));
  ___masm. jcc(Assembler::zero, good);
}
{
  IntelJccErratumAlignment intel_alignment(_masm, 5 /* jcc_size */);
  ___masm. jmp(*stub->entry());
}
___masm. bind(*stub->continuation());
2904}


2907#line 2907 "ad_x86.cpp"


2910#ifndef PRODUCT
2911void Compile::adlc_verification() {

// Following assertions generated from definition section
2914}
2915#endif

2917// Map from machine-independent register number to register_save_policy
2918const        char register_save_policy[] = {
'C', // R10
'C', // R10_H
'C', // R11
'C', // R11_H
'C', // R8
'C', // R8_H
'C', // R9
'C', // R9_H
'C', // R12
'C', // R12_H
'C', // RCX
'C', // RCX_H
'C', // RBX
'C', // RBX_H
'C', // RDI
'C', // RDI_H
'C', // RDX
'C', // RDX_H
'C', // RSI
'C', // RSI_H
'C', // RAX
'C', // RAX_H
'N', // RBP
'N', // RBP_H
'C', // R13
'C', // R13_H
'C', // R14
'C', // R14_H
'C', // R15
'C', // R15_H
'N', // RSP
'N', // RSP_H
'C', // XMM0
'C', // XMM0b
'C', // XMM0c
'C', // XMM0d
'C', // XMM0e
'C', // XMM0f
'C', // XMM0g
'C', // XMM0h
'C', // XMM0i
'C', // XMM0j
'C', // XMM0k
'C', // XMM0l
'C', // XMM0m
'C', // XMM0n
'C', // XMM0o
'C', // XMM0p
'C', // XMM1
'C', // XMM1b
'C', // XMM1c
'C', // XMM1d
'C', // XMM1e
'C', // XMM1f
'C', // XMM1g
'C', // XMM1h
'C', // XMM1i
'C', // XMM1j
'C', // XMM1k
'C', // XMM1l
'C', // XMM1m
'C', // XMM1n
'C', // XMM1o
'C', // XMM1p
'C', // XMM2
'C', // XMM2b
'C', // XMM2c
'C', // XMM2d
'C', // XMM2e
'C', // XMM2f
'C', // XMM2g
'C', // XMM2h
'C', // XMM2i
'C', // XMM2j
'C', // XMM2k
'C', // XMM2l
'C', // XMM2m
'C', // XMM2n
'C', // XMM2o
'C', // XMM2p
'C', // XMM3
'C', // XMM3b
'C', // XMM3c
'C', // XMM3d
'C', // XMM3e
'C', // XMM3f
'C', // XMM3g
'C', // XMM3h
'C', // XMM3i
'C', // XMM3j
'C', // XMM3k
'C', // XMM3l
'C', // XMM3m
'C', // XMM3n
'C', // XMM3o
'C', // XMM3p
'C', // XMM4
'C', // XMM4b
'C', // XMM4c
'C', // XMM4d
'C', // XMM4e
'C', // XMM4f
'C', // XMM4g
'C', // XMM4h
'C', // XMM4i
'C', // XMM4j
'C', // XMM4k
'C', // XMM4l
'C', // XMM4m
'C', // XMM4n
'C', // XMM4o
'C', // XMM4p
'C', // XMM5
'C', // XMM5b
'C', // XMM5c
'C', // XMM5d
'C', // XMM5e
'C', // XMM5f
'C', // XMM5g
'C', // XMM5h
'C', // XMM5i
'C', // XMM5j
'C', // XMM5k
'C', // XMM5l
'C', // XMM5m
'C', // XMM5n
'C', // XMM5o
'C', // XMM5p
'C', // XMM6
'C', // XMM6b
'C', // XMM6c
'C', // XMM6d
'C', // XMM6e
'C', // XMM6f
'C', // XMM6g
'C', // XMM6h
'C', // XMM6i
'C', // XMM6j
'C', // XMM6k
'C', // XMM6l
'C', // XMM6m
'C', // XMM6n
'C', // XMM6o
'C', // XMM6p
'C', // XMM7
'C', // XMM7b
'C', // XMM7c
'C', // XMM7d
'C', // XMM7e
'C', // XMM7f
'C', // XMM7g
'C', // XMM7h
'C', // XMM7i
'C', // XMM7j
'C', // XMM7k
'C', // XMM7l
'C', // XMM7m
'C', // XMM7n
'C', // XMM7o
'C', // XMM7p
'C', // XMM8
'C', // XMM8b
'C', // XMM8c
'C', // XMM8d
'C', // XMM8e
'C', // XMM8f
'C', // XMM8g
'C', // XMM8h
'C', // XMM8i
'C', // XMM8j
'C', // XMM8k
'C', // XMM8l
'C', // XMM8m
'C', // XMM8n
'C', // XMM8o
'C', // XMM8p
'C', // XMM9
'C', // XMM9b
'C', // XMM9c
'C', // XMM9d
'C', // XMM9e
'C', // XMM9f
'C', // XMM9g
'C', // XMM9h
'C', // XMM9i
'C', // XMM9j
'C', // XMM9k
'C', // XMM9l
'C', // XMM9m
'C', // XMM9n
'C', // XMM9o
'C', // XMM9p
'C', // XMM10
'C', // XMM10b
'C', // XMM10c
'C', // XMM10d
'C', // XMM10e
'C', // XMM10f
'C', // XMM10g
'C', // XMM10h
'C', // XMM10i
'C', // XMM10j
'C', // XMM10k
'C', // XMM10l
'C', // XMM10m
'C', // XMM10n
'C', // XMM10o
'C', // XMM10p
'C', // XMM11
'C', // XMM11b
'C', // XMM11c
'C', // XMM11d
'C', // XMM11e
'C', // XMM11f
'C', // XMM11g
'C', // XMM11h
'C', // XMM11i
'C', // XMM11j
'C', // XMM11k
'C', // XMM11l
'C', // XMM11m
'C', // XMM11n
'C', // XMM11o
'C', // XMM11p
'C', // XMM12
'C', // XMM12b
'C', // XMM12c
'C', // XMM12d
'C', // XMM12e
'C', // XMM12f
'C', // XMM12g
'C', // XMM12h
'C', // XMM12i
'C', // XMM12j
'C', // XMM12k
'C', // XMM12l
'C', // XMM12m
'C', // XMM12n
'C', // XMM12o
'C', // XMM12p
'C', // XMM13
'C', // XMM13b
'C', // XMM13c
'C', // XMM13d
'C', // XMM13e
'C', // XMM13f
'C', // XMM13g
'C', // XMM13h
'C', // XMM13i
'C', // XMM13j
'C', // XMM13k
'C', // XMM13l
'C', // XMM13m
'C', // XMM13n
'C', // XMM13o
'C', // XMM13p
'C', // XMM14
'C', // XMM14b
'C', // XMM14c
'C', // XMM14d
'C', // XMM14e
'C', // XMM14f
'C', // XMM14g
'C', // XMM14h
'C', // XMM14i
'C', // XMM14j
'C', // XMM14k
'C', // XMM14l
'C', // XMM14m
'C', // XMM14n
'C', // XMM14o
'C', // XMM14p
'C', // XMM15
'C', // XMM15b
'C', // XMM15c
'C', // XMM15d
'C', // XMM15e
'C', // XMM15f
'C', // XMM15g
'C', // XMM15h
'C', // XMM15i
'C', // XMM15j
'C', // XMM15k
'C', // XMM15l
'C', // XMM15m
'C', // XMM15n
'C', // XMM15o
'C', // XMM15p
'C', // XMM16
'C', // XMM16b
'C', // XMM16c
'C', // XMM16d
'C', // XMM16e
'C', // XMM16f
'C', // XMM16g
'C', // XMM16h
'C', // XMM16i
'C', // XMM16j
'C', // XMM16k
'C', // XMM16l
'C', // XMM16m
'C', // XMM16n
'C', // XMM16o
'C', // XMM16p
'C', // XMM17
'C', // XMM17b
'C', // XMM17c
'C', // XMM17d
'C', // XMM17e
'C', // XMM17f
'C', // XMM17g
'C', // XMM17h
'C', // XMM17i
'C', // XMM17j
'C', // XMM17k
'C', // XMM17l
'C', // XMM17m
'C', // XMM17n
'C', // XMM17o
'C', // XMM17p
'C', // XMM18
'C', // XMM18b
'C', // XMM18c
'C', // XMM18d
'C', // XMM18e
'C', // XMM18f
'C', // XMM18g
'C', // XMM18h
'C', // XMM18i
'C', // XMM18j
'C', // XMM18k
'C', // XMM18l
'C', // XMM18m
'C', // XMM18n
'C', // XMM18o
'C', // XMM18p
'C', // XMM19
'C', // XMM19b
'C', // XMM19c
'C', // XMM19d
'C', // XMM19e
'C', // XMM19f
'C', // XMM19g
'C', // XMM19h
'C', // XMM19i
'C', // XMM19j
'C', // XMM19k
'C', // XMM19l
'C', // XMM19m
'C', // XMM19n
'C', // XMM19o
'C', // XMM19p
'C', // XMM20
'C', // XMM20b
'C', // XMM20c
'C', // XMM20d
'C', // XMM20e
'C', // XMM20f
'C', // XMM20g
'C', // XMM20h
'C', // XMM20i
'C', // XMM20j
'C', // XMM20k
'C', // XMM20l
'C', // XMM20m
'C', // XMM20n
'C', // XMM20o
'C', // XMM20p
'C', // XMM21
'C', // XMM21b
'C', // XMM21c
'C', // XMM21d
'C', // XMM21e
'C', // XMM21f
'C', // XMM21g
'C', // XMM21h
'C', // XMM21i
'C', // XMM21j
'C', // XMM21k
'C', // XMM21l
'C', // XMM21m
'C', // XMM21n
'C', // XMM21o
'C', // XMM21p
'C', // XMM22
'C', // XMM22b
'C', // XMM22c
'C', // XMM22d
'C', // XMM22e
'C', // XMM22f
'C', // XMM22g
'C', // XMM22h
'C', // XMM22i
'C', // XMM22j
'C', // XMM22k
'C', // XMM22l
'C', // XMM22m
'C', // XMM22n
'C', // XMM22o
'C', // XMM22p
'C', // XMM23
'C', // XMM23b
'C', // XMM23c
'C', // XMM23d
'C', // XMM23e
'C', // XMM23f
'C', // XMM23g
'C', // XMM23h
'C', // XMM23i
'C', // XMM23j
'C', // XMM23k
'C', // XMM23l
'C', // XMM23m
'C', // XMM23n
'C', // XMM23o
'C', // XMM23p
'C', // XMM24
'C', // XMM24b
'C', // XMM24c
'C', // XMM24d
'C', // XMM24e
'C', // XMM24f
'C', // XMM24g
'C', // XMM24h
'C', // XMM24i
'C', // XMM24j
'C', // XMM24k
'C', // XMM24l
'C', // XMM24m
'C', // XMM24n
'C', // XMM24o
'C', // XMM24p
'C', // XMM25
'C', // XMM25b
'C', // XMM25c
'C', // XMM25d
'C', // XMM25e
'C', // XMM25f
'C', // XMM25g
'C', // XMM25h
'C', // XMM25i
'C', // XMM25j
'C', // XMM25k
'C', // XMM25l
'C', // XMM25m
'C', // XMM25n
'C', // XMM25o
'C', // XMM25p
'C', // XMM26
'C', // XMM26b
'C', // XMM26c
'C', // XMM26d
'C', // XMM26e
'C', // XMM26f
'C', // XMM26g
'C', // XMM26h
'C', // XMM26i
'C', // XMM26j
'C', // XMM26k
'C', // XMM26l
'C', // XMM26m
'C', // XMM26n
'C', // XMM26o
'C', // XMM26p
'C', // XMM27
'C', // XMM27b
'C', // XMM27c
'C', // XMM27d
'C', // XMM27e
'C', // XMM27f
'C', // XMM27g
'C', // XMM27h
'C', // XMM27i
'C', // XMM27j
'C', // XMM27k
'C', // XMM27l
'C', // XMM27m
'C', // XMM27n
'C', // XMM27o
'C', // XMM27p
'C', // XMM28
'C', // XMM28b
'C', // XMM28c
'C', // XMM28d
'C', // XMM28e
'C', // XMM28f
'C', // XMM28g
'C', // XMM28h
'C', // XMM28i
'C', // XMM28j
'C', // XMM28k
'C', // XMM28l
'C', // XMM28m
'C', // XMM28n
'C', // XMM28o
'C', // XMM28p
'C', // XMM29
'C', // XMM29b
'C', // XMM29c
'C', // XMM29d
'C', // XMM29e
'C', // XMM29f
'C', // XMM29g
'C', // XMM29h
'C', // XMM29i
'C', // XMM29j
'C', // XMM29k
'C', // XMM29l
'C', // XMM29m
'C', // XMM29n
'C', // XMM29o
'C', // XMM29p
'C', // XMM30
'C', // XMM30b
'C', // XMM30c
'C', // XMM30d
'C', // XMM30e
'C', // XMM30f
'C', // XMM30g
'C', // XMM30h
'C', // XMM30i
'C', // XMM30j
'C', // XMM30k
'C', // XMM30l
'C', // XMM30m
'C', // XMM30n
'C', // XMM30o
'C', // XMM30p
'C', // XMM31
'C', // XMM31b
'C', // XMM31c
'C', // XMM31d
'C', // XMM31e
'C', // XMM31f
'C', // XMM31g
'C', // XMM31h
'C', // XMM31i
'C', // XMM31j
'C', // XMM31k
'C', // XMM31l
'C', // XMM31m
'C', // XMM31n
'C', // XMM31o
'C', // XMM31p
'C', // K7
'C', // K7_H
'C', // K6
'C', // K6_H
'C', // K5
'C', // K5_H
'C', // K4
'C', // K4_H
'C', // K3
'C', // K3_H
'C', // K2
'C', // K2_H
'C', // K1
'C', // K1_H
'C' // no trailing comma // RFLAGS
3478};

3480// Map from machine-independent register number to c_reg_save_policy
3481const        char c_reg_save_policy[] = {
'C', // R10
'C', // R10_H
'C', // R11
'C', // R11_H
'C', // R8
'C', // R8_H
'C', // R9
'C', // R9_H
'E', // R12
'E', // R12_H
'C', // RCX
'C', // RCX_H
'E', // RBX
'E', // RBX_H
'C', // RDI
'C', // RDI_H
'C', // RDX
'C', // RDX_H
'C', // RSI
'C', // RSI_H
'C', // RAX
'C', // RAX_H
'E', // RBP
'E', // RBP_H
'E', // R13
'E', // R13_H
'E', // R14
'E', // R14_H
'E', // R15
'E', // R15_H
'N', // RSP
'N', // RSP_H
'C', // XMM0
'C', // XMM0b
'C', // XMM0c
'C', // XMM0d
'C', // XMM0e
'C', // XMM0f
'C', // XMM0g
'C', // XMM0h
'C', // XMM0i
'C', // XMM0j
'C', // XMM0k
'C', // XMM0l
'C', // XMM0m
'C', // XMM0n
'C', // XMM0o
'C', // XMM0p
'C', // XMM1
'C', // XMM1b
'C', // XMM1c
'C', // XMM1d
'C', // XMM1e
'C', // XMM1f
'C', // XMM1g
'C', // XMM1h
'C', // XMM1i
'C', // XMM1j
'C', // XMM1k
'C', // XMM1l
'C', // XMM1m
'C', // XMM1n
'C', // XMM1o
'C', // XMM1p
'C', // XMM2
'C', // XMM2b
'C', // XMM2c
'C', // XMM2d
'C', // XMM2e
'C', // XMM2f
'C', // XMM2g
'C', // XMM2h
'C', // XMM2i
'C', // XMM2j
'C', // XMM2k
'C', // XMM2l
'C', // XMM2m
'C', // XMM2n
'C', // XMM2o
'C', // XMM2p
'C', // XMM3
'C', // XMM3b
'C', // XMM3c
'C', // XMM3d
'C', // XMM3e
'C', // XMM3f
'C', // XMM3g
'C', // XMM3h
'C', // XMM3i
'C', // XMM3j
'C', // XMM3k
'C', // XMM3l
'C', // XMM3m
'C', // XMM3n
'C', // XMM3o
'C', // XMM3p
'C', // XMM4
'C', // XMM4b
'C', // XMM4c
'C', // XMM4d
'C', // XMM4e
'C', // XMM4f
'C', // XMM4g
'C', // XMM4h
'C', // XMM4i
'C', // XMM4j
'C', // XMM4k
'C', // XMM4l
'C', // XMM4m
'C', // XMM4n
'C', // XMM4o
'C', // XMM4p
'C', // XMM5
'C', // XMM5b
'C', // XMM5c
'C', // XMM5d
'C', // XMM5e
'C', // XMM5f
'C', // XMM5g
'C', // XMM5h
'C', // XMM5i
'C', // XMM5j
'C', // XMM5k
'C', // XMM5l
'C', // XMM5m
'C', // XMM5n
'C', // XMM5o
'C', // XMM5p
'C', // XMM6
'C', // XMM6b
'C', // XMM6c
'C', // XMM6d
'C', // XMM6e
'C', // XMM6f
'C', // XMM6g
'C', // XMM6h
'C', // XMM6i
'C', // XMM6j
'C', // XMM6k
'C', // XMM6l
'C', // XMM6m
'C', // XMM6n
'C', // XMM6o
'C', // XMM6p
'C', // XMM7
'C', // XMM7b
'C', // XMM7c
'C', // XMM7d
'C', // XMM7e
'C', // XMM7f
'C', // XMM7g
'C', // XMM7h
'C', // XMM7i
'C', // XMM7j
'C', // XMM7k
'C', // XMM7l
'C', // XMM7m
'C', // XMM7n
'C', // XMM7o
'C', // XMM7p
'C', // XMM8
'C', // XMM8b
'C', // XMM8c
'C', // XMM8d
'C', // XMM8e
'C', // XMM8f
'C', // XMM8g
'C', // XMM8h
'C', // XMM8i
'C', // XMM8j
'C', // XMM8k
'C', // XMM8l
'C', // XMM8m
'C', // XMM8n
'C', // XMM8o
'C', // XMM8p
'C', // XMM9
'C', // XMM9b
'C', // XMM9c
'C', // XMM9d
'C', // XMM9e
'C', // XMM9f
'C', // XMM9g
'C', // XMM9h
'C', // XMM9i
'C', // XMM9j
'C', // XMM9k
'C', // XMM9l
'C', // XMM9m
'C', // XMM9n
'C', // XMM9o
'C', // XMM9p
'C', // XMM10
'C', // XMM10b
'C', // XMM10c
'C', // XMM10d
'C', // XMM10e
'C', // XMM10f
'C', // XMM10g
'C', // XMM10h
'C', // XMM10i
'C', // XMM10j
'C', // XMM10k
'C', // XMM10l
'C', // XMM10m
'C', // XMM10n
'C', // XMM10o
'C', // XMM10p
'C', // XMM11
'C', // XMM11b
'C', // XMM11c
'C', // XMM11d
'C', // XMM11e
'C', // XMM11f
'C', // XMM11g
'C', // XMM11h
'C', // XMM11i
'C', // XMM11j
'C', // XMM11k
'C', // XMM11l
'C', // XMM11m
'C', // XMM11n
'C', // XMM11o
'C', // XMM11p
'C', // XMM12
'C', // XMM12b
'C', // XMM12c
'C', // XMM12d
'C', // XMM12e
'C', // XMM12f
'C', // XMM12g
'C', // XMM12h
'C', // XMM12i
'C', // XMM12j
'C', // XMM12k
'C', // XMM12l
'C', // XMM12m
'C', // XMM12n
'C', // XMM12o
'C', // XMM12p
'C', // XMM13
'C', // XMM13b
'C', // XMM13c
'C', // XMM13d
'C', // XMM13e
'C', // XMM13f
'C', // XMM13g
'C', // XMM13h
'C', // XMM13i
'C', // XMM13j
'C', // XMM13k
'C', // XMM13l
'C', // XMM13m
'C', // XMM13n
'C', // XMM13o
'C', // XMM13p
'C', // XMM14
'C', // XMM14b
'C', // XMM14c
'C', // XMM14d
'C', // XMM14e
'C', // XMM14f
'C', // XMM14g
'C', // XMM14h
'C', // XMM14i
'C', // XMM14j
'C', // XMM14k
'C', // XMM14l
'C', // XMM14m
'C', // XMM14n
'C', // XMM14o
'C', // XMM14p
'C', // XMM15
'C', // XMM15b
'C', // XMM15c
'C', // XMM15d
'C', // XMM15e
'C', // XMM15f
'C', // XMM15g
'C', // XMM15h
'C', // XMM15i
'C', // XMM15j
'C', // XMM15k
'C', // XMM15l
'C', // XMM15m
'C', // XMM15n
'C', // XMM15o
'C', // XMM15p
'C', // XMM16
'C', // XMM16b
'C', // XMM16c
'C', // XMM16d
'C', // XMM16e
'C', // XMM16f
'C', // XMM16g
'C', // XMM16h
'C', // XMM16i
'C', // XMM16j
'C', // XMM16k
'C', // XMM16l
'C', // XMM16m
'C', // XMM16n
'C', // XMM16o
'C', // XMM16p
'C', // XMM17
'C', // XMM17b
'C', // XMM17c
'C', // XMM17d
'C', // XMM17e
'C', // XMM17f
'C', // XMM17g
'C', // XMM17h
'C', // XMM17i
'C', // XMM17j
'C', // XMM17k
'C', // XMM17l
'C', // XMM17m
'C', // XMM17n
'C', // XMM17o
'C', // XMM17p
'C', // XMM18
'C', // XMM18b
'C', // XMM18c
'C', // XMM18d
'C', // XMM18e
'C', // XMM18f
'C', // XMM18g
'C', // XMM18h
'C', // XMM18i
'C', // XMM18j
'C', // XMM18k
'C', // XMM18l
'C', // XMM18m
'C', // XMM18n
'C', // XMM18o
'C', // XMM18p
'C', // XMM19
'C', // XMM19b
'C', // XMM19c
'C', // XMM19d
'C', // XMM19e
'C', // XMM19f
'C', // XMM19g
'C', // XMM19h
'C', // XMM19i
'C', // XMM19j
'C', // XMM19k
'C', // XMM19l
'C', // XMM19m
'C', // XMM19n
'C', // XMM19o
'C', // XMM19p
'C', // XMM20
'C', // XMM20b
'C', // XMM20c
'C', // XMM20d
'C', // XMM20e
'C', // XMM20f
'C', // XMM20g
'C', // XMM20h
'C', // XMM20i
'C', // XMM20j
'C', // XMM20k
'C', // XMM20l
'C', // XMM20m
'C', // XMM20n
'C', // XMM20o
'C', // XMM20p
'C', // XMM21
'C', // XMM21b
'C', // XMM21c
'C', // XMM21d
'C', // XMM21e
'C', // XMM21f
'C', // XMM21g
'C', // XMM21h
'C', // XMM21i
'C', // XMM21j
'C', // XMM21k
'C', // XMM21l
'C', // XMM21m
'C', // XMM21n
'C', // XMM21o
'C', // XMM21p
'C', // XMM22
'C', // XMM22b
'C', // XMM22c
'C', // XMM22d
'C', // XMM22e
'C', // XMM22f
'C', // XMM22g
'C', // XMM22h
'C', // XMM22i
'C', // XMM22j
'C', // XMM22k
'C', // XMM22l
'C', // XMM22m
'C', // XMM22n
'C', // XMM22o
'C', // XMM22p
'C', // XMM23
'C', // XMM23b
'C', // XMM23c
'C', // XMM23d
'C', // XMM23e
'C', // XMM23f
'C', // XMM23g
'C', // XMM23h
'C', // XMM23i
'C', // XMM23j
'C', // XMM23k
'C', // XMM23l
'C', // XMM23m
'C', // XMM23n
'C', // XMM23o
'C', // XMM23p
'C', // XMM24
'C', // XMM24b
'C', // XMM24c
'C', // XMM24d
'C', // XMM24e
'C', // XMM24f
'C', // XMM24g
'C', // XMM24h
'C', // XMM24i
'C', // XMM24j
'C', // XMM24k
'C', // XMM24l
'C', // XMM24m
'C', // XMM24n
'C', // XMM24o
'C', // XMM24p
'C', // XMM25
'C', // XMM25b
'C', // XMM25c
'C', // XMM25d
'C', // XMM25e
'C', // XMM25f
'C', // XMM25g
'C', // XMM25h
'C', // XMM25i
'C', // XMM25j
'C', // XMM25k
'C', // XMM25l
'C', // XMM25m
'C', // XMM25n
'C', // XMM25o
'C', // XMM25p
'C', // XMM26
'C', // XMM26b
'C', // XMM26c
'C', // XMM26d
'C', // XMM26e
'C', // XMM26f
'C', // XMM26g
'C', // XMM26h
'C', // XMM26i
'C', // XMM26j
'C', // XMM26k
'C', // XMM26l
'C', // XMM26m
'C', // XMM26n
'C', // XMM26o
'C', // XMM26p
'C', // XMM27
'C', // XMM27b
'C', // XMM27c
'C', // XMM27d
'C', // XMM27e
'C', // XMM27f
'C', // XMM27g
'C', // XMM27h
'C', // XMM27i
'C', // XMM27j
'C', // XMM27k
'C', // XMM27l
'C', // XMM27m
'C', // XMM27n
'C', // XMM27o
'C', // XMM27p
'C', // XMM28
'C', // XMM28b
'C', // XMM28c
'C', // XMM28d
'C', // XMM28e
'C', // XMM28f
'C', // XMM28g
'C', // XMM28h
'C', // XMM28i
'C', // XMM28j
'C', // XMM28k
'C', // XMM28l
'C', // XMM28m
'C', // XMM28n
'C', // XMM28o
'C', // XMM28p
'C', // XMM29
'C', // XMM29b
'C', // XMM29c
'C', // XMM29d
'C', // XMM29e
'C', // XMM29f
'C', // XMM29g
'C', // XMM29h
'C', // XMM29i
'C', // XMM29j
'C', // XMM29k
'C', // XMM29l
'C', // XMM29m
'C', // XMM29n
'C', // XMM29o
'C', // XMM29p
'C', // XMM30
'C', // XMM30b
'C', // XMM30c
'C', // XMM30d
'C', // XMM30e
'C', // XMM30f
'C', // XMM30g
'C', // XMM30h
'C', // XMM30i
'C', // XMM30j
'C', // XMM30k
'C', // XMM30l
'C', // XMM30m
'C', // XMM30n
'C', // XMM30o
'C', // XMM30p
'C', // XMM31
'C', // XMM31b
'C', // XMM31c
'C', // XMM31d
'C', // XMM31e
'C', // XMM31f
'C', // XMM31g
'C', // XMM31h
'C', // XMM31i
'C', // XMM31j
'C', // XMM31k
'C', // XMM31l
'C', // XMM31m
'C', // XMM31n
'C', // XMM31o
'C', // XMM31p
'C', // K7
'C', // K7_H
'C', // K6
'C', // K6_H
'C', // K5
'C', // K5_H
'C', // K4
'C', // K4_H
'C', // K3
'C', // K3_H
'C', // K2
'C', // K2_H
'C', // K1
'C', // K1_H
'C' // no trailing comma // RFLAGS
4041};

4043// Map from machine-independent register number to register_save_type
4044const        int register_save_type[] = {
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegF,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
Op_RegI,
0 // no trailing comma
4604};


4607const        int   reduceOp[] = {
/*    0 */  0,
/*    1 */  0,
/*    2 */  0,
/*    3 */  0,
/*    4 */  0,
/*    5 */  0,
/*    6 */  0,
/*    7 */  0,
/*    8 */  immI_rule,
/*    9 */  immI_0_rule,
/*   10 */  immI_1_rule,
/*   11 */  immI_M1_rule,
/*   12 */  immI_2_rule,
/*   13 */  immI_4_rule,
/*   14 */  immI_8_rule,
/*   15 */  immI2_rule,
/*   16 */  immU7_rule,
/*   17 */  immI8_rule,
/*   18 */  immU8_rule,
/*   19 */  immI16_rule,
/*   20 */  immU31_rule,
/*   21 */  immI_32_rule,
/*   22 */  immI_64_rule,
/*   23 */  immP_rule,
/*   24 */  immP0_rule,
/*   25 */  immN_rule,
/*   26 */  immNKlass_rule,
/*   27 */  immN0_rule,
/*   28 */  immP31_rule,
/*   29 */  immL_rule,
/*   30 */  immL8_rule,
/*   31 */  immUL32_rule,
/*   32 */  immL32_rule,
/*   33 */  immL_Pow2_rule,
/*   34 */  immL_NotPow2_rule,
/*   35 */  immL0_rule,
/*   36 */  immL1_rule,
/*   37 */  immL_M1_rule,
/*   38 */  immL10_rule,
/*   39 */  immL_127_rule,
/*   40 */  immL_32bits_rule,
/*   41 */  immI_Pow2M1_rule,
/*   42 */  immF0_rule,
/*   43 */  immF_rule,
/*   44 */  immD0_rule,
/*   45 */  immD_rule,
/*   46 */  immI_16_rule,
/*   47 */  immI_24_rule,
/*   48 */  immI_255_rule,
/*   49 */  immI_65535_rule,
/*   50 */  immL_255_rule,
/*   51 */  immL_65535_rule,
/*   52 */  kReg_rule,
/*   53 */  kReg_K1_rule,
/*   54 */  kReg_K2_rule,
/*   55 */  kReg_K3_rule,
/*   56 */  kReg_K4_rule,
/*   57 */  kReg_K5_rule,
/*   58 */  kReg_K6_rule,
/*   59 */  kReg_K7_rule,
/*   60 */  rRegI_rule,
/*   61 */  rax_RegI_rule,
/*   62 */  rbx_RegI_rule,
/*   63 */  rcx_RegI_rule,
/*   64 */  rdx_RegI_rule,
/*   65 */  rdi_RegI_rule,
/*   66 */  no_rax_rdx_RegI_rule,
/*   67 */  any_RegP_rule,
/*   68 */  rRegP_rule,
/*   69 */  rRegN_rule,
/*   70 */  no_rax_RegP_rule,
/*   71 */  no_rbp_RegP_rule,
/*   72 */  no_rax_rbx_RegP_rule,
/*   73 */  rax_RegP_rule,
/*   74 */  rax_RegN_rule,
/*   75 */  rbx_RegP_rule,
/*   76 */  rsi_RegP_rule,
/*   77 */  rbp_RegP_rule,
/*   78 */  rdi_RegP_rule,
/*   79 */  r15_RegP_rule,
/*   80 */  rRegL_rule,
/*   81 */  no_rax_rdx_RegL_rule,
/*   82 */  no_rax_RegL_rule,
/*   83 */  rax_RegL_rule,
/*   84 */  rcx_RegL_rule,
/*   85 */  rdx_RegL_rule,
/*   86 */  rFlagsReg_rule,
/*   87 */  rFlagsRegU_rule,
/*   88 */  rFlagsRegUCF_rule,
/*   89 */  regF_rule,
/*   90 */  legRegF_rule,
/*   91 */  vlRegF_rule,
/*   92 */  regD_rule,
/*   93 */  legRegD_rule,
/*   94 */  vlRegD_rule,
/*   95 */  indirect_rule,
/*   96 */  indOffset8_rule,
/*   97 */  indOffset32_rule,
/*   98 */  indIndexOffset_rule,
/*   99 */  indIndex_rule,
/*  100 */  indIndexScale_rule,
/*  101 */  indPosIndexScale_rule,
/*  102 */  indIndexScaleOffset_rule,
/*  103 */  indPosIndexOffset_rule,
/*  104 */  indPosIndexScaleOffset_rule,
/*  105 */  indCompressedOopOffset_rule,
/*  106 */  indirectNarrow_rule,
/*  107 */  indOffset8Narrow_rule,
/*  108 */  indOffset32Narrow_rule,
/*  109 */  indIndexOffsetNarrow_rule,
/*  110 */  indIndexNarrow_rule,
/*  111 */  indIndexScaleNarrow_rule,
/*  112 */  indIndexScaleOffsetNarrow_rule,
/*  113 */  indPosIndexOffsetNarrow_rule,
/*  114 */  indPosIndexScaleOffsetNarrow_rule,
/*  115 */  stackSlotP_rule,
/*  116 */  stackSlotI_rule,
/*  117 */  stackSlotF_rule,
/*  118 */  stackSlotD_rule,
/*  119 */  stackSlotL_rule,
/*  120 */  cmpOp_rule,
/*  121 */  cmpOpU_rule,
/*  122 */  cmpOpUCF_rule,
/*  123 */  cmpOpUCF2_rule,
/*  124 */  rxmm0_rule,
/*  125 */  vec_rule,
/*  126 */  legVec_rule,
/*  127 */  vecS_rule,
/*  128 */  legVecS_rule,
/*  129 */  vecD_rule,
/*  130 */  legVecD_rule,
/*  131 */  vecX_rule,
/*  132 */  legVecX_rule,
/*  133 */  vecY_rule,
/*  134 */  legVecY_rule,
/*  135 */  vecZ_rule,
/*  136 */  legVecZ_rule,
/*  137 */  cmpOp_vcmppd_rule,
// last operand
/*  138 */  memory_rule,
// last operand class
/*  139 */  _AddP_any_RegP_rRegL_rule,
/*  140 */  _LShiftL_rRegL_immI2_rule,
/*  141 */  _ConvI2L_rRegI__rule,
/*  142 */  _LShiftL__ConvI2L_rRegI__immI2_rule,
/*  143 */  _AddP_any_RegP__LShiftL_rRegL_immI2_rule,
/*  144 */  _AddP_any_RegP__ConvI2L_rRegI__rule,
/*  145 */  _AddP_any_RegP__LShiftL__ConvI2L_rRegI__immI2_rule,
/*  146 */  _DecodeN_rRegN__rule,
/*  147 */  _AddP__DecodeN_rRegN__rRegL_rule,
/*  148 */  _AddP__DecodeN_rRegN___LShiftL_rRegL_immI2_rule,
/*  149 */  _AddP__DecodeN_rRegN___ConvI2L_rRegI__rule,
/*  150 */  _AddP__DecodeN_rRegN___LShiftL__ConvI2L_rRegI__immI2_rule,
/*  151 */  _LoadB_memory__rule,
/*  152 */  _LoadUB_memory__rule,
/*  153 */  _AndI__LoadUB_memory__immI_rule,
/*  154 */  _LoadS_memory__rule,
/*  155 */  _LShiftI__LoadS_memory__immI_24_rule,
/*  156 */  _LoadUS_memory__rule,
/*  157 */  _LShiftI__LoadUS_memory__immI_24_rule,
/*  158 */  _AndI__LoadUS_memory__immI_255_rule,
/*  159 */  _AndI__LoadUS_memory__immI_rule,
/*  160 */  _LoadI_memory__rule,
/*  161 */  _LShiftI__LoadI_memory__immI_24_rule,
/*  162 */  _LShiftI__LoadI_memory__immI_16_rule,
/*  163 */  _AndI__LoadI_memory__immI_255_rule,
/*  164 */  _AndI__LoadI_memory__immI_65535_rule,
/*  165 */  _AndI__LoadI_memory__immU31_rule,
/*  166 */  _ConvI2L__LoadI_memory___rule,
/*  167 */  _LoadL_memory__rule,
/*  168 */  _CastP2X_rRegP__rule,
/*  169 */  _CastP2X__DecodeN_rRegN___rule,
/*  170 */  _AddL__LShiftL_rRegL_immI2_immL32_rule,
/*  171 */  _Binary_cmpOp_rFlagsReg_rule,
/*  172 */  _Binary_rRegI_rRegI_rule,
/*  173 */  _Binary_cmpOpU_rFlagsRegU_rule,
/*  174 */  _Binary_cmpOpUCF_rFlagsRegUCF_rule,
/*  175 */  _Binary_rRegI__LoadI_memory__rule,
/*  176 */  _Binary_rRegN_rRegN_rule,
/*  177 */  _Binary_rRegP_rRegP_rule,
/*  178 */  _Binary_rRegL_rRegL_rule,
/*  179 */  _Binary_rRegL__LoadL_memory__rule,
/*  180 */  _Binary_regF_regF_rule,
/*  181 */  _Binary_regD_regD_rule,
/*  182 */  _AddI__LoadI_memory__rRegI_rule,
/*  183 */  _AddI_rRegI__LoadI_memory__rule,
/*  184 */  _AddI__LoadI_memory__immI_rule,
/*  185 */  _AddI__LoadI_memory__immI_1_rule,
/*  186 */  _AddI__LoadI_memory__immI_M1_rule,
/*  187 */  _AddL__LoadL_memory__rRegL_rule,
/*  188 */  _AddL_rRegL__LoadL_memory__rule,
/*  189 */  _AddL__LoadL_memory__immL32_rule,
/*  190 */  _AddL__LoadL_memory__immL1_rule,
/*  191 */  _AddL__LoadL_memory__immL_M1_rule,
/*  192 */  _Binary_rax_RegP_rRegP_rule,
/*  193 */  _Binary_rax_RegI_rRegI_rule,
/*  194 */  _Binary_rax_RegL_rRegL_rule,
/*  195 */  _Binary_rax_RegN_rRegN_rule,
/*  196 */  _SubI__LoadI_memory__rRegI_rule,
/*  197 */  _SubI__LoadI_memory__immI_rule,
/*  198 */  _SubL__LoadL_memory__rRegL_rule,
/*  199 */  _SubL__LoadL_memory__immL32_rule,
/*  200 */  _SubI_immI_0_rRegI_rule,
/*  201 */  _SubI_immI_0__LoadI_memory__rule,
/*  202 */  _SubL_immL0__LoadL_memory__rule,
/*  203 */  _LShiftI__LoadI_memory__immI_1_rule,
/*  204 */  _LShiftI__LoadI_memory__immI8_rule,
/*  205 */  _LShiftI__LoadI_memory__rcx_RegI_rule,
/*  206 */  _RShiftI__LoadI_memory__immI_1_rule,
/*  207 */  _RShiftI__LoadI_memory__immI8_rule,
/*  208 */  _RShiftI__LoadI_memory__rcx_RegI_rule,
/*  209 */  _URShiftI__LoadI_memory__immI_1_rule,
/*  210 */  _URShiftI__LoadI_memory__immI8_rule,
/*  211 */  _URShiftI__LoadI_memory__rcx_RegI_rule,
/*  212 */  _LShiftL__LoadL_memory__immI_1_rule,
/*  213 */  _LShiftL__LoadL_memory__immI8_rule,
/*  214 */  _LShiftL__LoadL_memory__rcx_RegI_rule,
/*  215 */  _RShiftL__LoadL_memory__immI_1_rule,
/*  216 */  _RShiftL__LoadL_memory__immI8_rule,
/*  217 */  _RShiftL__LoadL_memory__rcx_RegI_rule,
/*  218 */  _URShiftL__LoadL_memory__immI_1_rule,
/*  219 */  _URShiftL__LoadL_memory__immI8_rule,
/*  220 */  _URShiftL__LoadL_memory__rcx_RegI_rule,
/*  221 */  _LShiftI_rRegI_immI_24_rule,
/*  222 */  _LShiftI_rRegI_immI_16_rule,
/*  223 */  _AndI_rRegI_immI_255_rule,
/*  224 */  _AndI_rRegI_immI_65535_rule,
/*  225 */  _AndI_rRegI_immI_Pow2M1_rule,
/*  226 */  _AndI__LoadB_memory__rRegI_rule,
/*  227 */  _AndI_rRegI__LoadB_memory__rule,
/*  228 */  _AndI__LoadI_memory__rRegI_rule,
/*  229 */  _AndI_rRegI__LoadI_memory__rule,
/*  230 */  _AndI__LoadI_memory__immI_rule,
/*  231 */  _XorI_rRegI_immI_M1_rule,
/*  232 */  _AddI_rRegI_immI_M1_rule,
/*  233 */  _OrI__LoadB_memory__rRegI_rule,
/*  234 */  _OrI_rRegI__LoadB_memory__rule,
/*  235 */  _OrI__LoadI_memory__rRegI_rule,
/*  236 */  _OrI_rRegI__LoadI_memory__rule,
/*  237 */  _OrI__LoadI_memory__immI_rule,
/*  238 */  _XorI__LoadB_memory__rRegI_rule,
/*  239 */  _XorI_rRegI__LoadB_memory__rule,
/*  240 */  _XorI__LoadI_memory__rRegI_rule,
/*  241 */  _XorI_rRegI__LoadI_memory__rule,
/*  242 */  _XorI__LoadI_memory__immI_rule,
/*  243 */  _AndL__LoadL_memory__rRegL_rule,
/*  244 */  _AndL_rRegL__LoadL_memory__rule,
/*  245 */  _AndL__LoadL_memory__immL32_rule,
/*  246 */  _AndL__LoadL_memory__immL_NotPow2_rule,
/*  247 */  _XorL_rRegL_immL_M1_rule,
/*  248 */  _SubL_immL0_rRegL_rule,
/*  249 */  _AddL_rRegL_immL_M1_rule,
/*  250 */  _CastP2X_any_RegP__rule,
/*  251 */  _OrL__LoadL_memory__rRegL_rule,
/*  252 */  _OrL_rRegL__LoadL_memory__rule,
/*  253 */  _OrL__LoadL_memory__immL32_rule,
/*  254 */  _OrL__LoadL_memory__immL_Pow2_rule,
/*  255 */  _XorL__LoadL_memory__rRegL_rule,
/*  256 */  _XorL_rRegL__LoadL_memory__rule,
/*  257 */  _XorL__LoadL_memory__immL32_rule,
/*  258 */  _CmpLTMask_rRegI_rRegI_rule,
/*  259 */  _AndI__CmpLTMask_rRegI_rRegI_rRegI_rule,
/*  260 */  _SubI_rRegI_rRegI_rule,
/*  261 */  _AndI_rRegI__CmpLTMask_rRegI_rRegI_rule,
/*  262 */  _LoadF_memory__rule,
/*  263 */  _LoadD_memory__rule,
/*  264 */  _Binary_rdi_RegP_rcx_RegI_rule,
/*  265 */  _Binary_rsi_RegP_rdx_RegI_rule,
/*  266 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  267 */  _Binary_rsi_RegP_immI_rule,
/*  268 */  _Binary_rsi_RegP_rax_RegI_rule,
/*  269 */  _Binary_rdi_RegP_rsi_RegP_rule,
/*  270 */  _AndI_rRegI_immI_rule,
/*  271 */  _LoadP_memory__rule,
/*  272 */  _LoadN_memory__rule,
/*  273 */  _LoadNKlass_memory__rule,
/*  274 */  _AndL_rRegL_immL32_rule,
/*  275 */  _AndL__CastP2X_rRegP___LoadL_memory__rule,
/*  276 */  _AndL__LoadL_memory___CastP2X_rRegP__rule,
/*  277 */  _AndI__LoadUB_memory__immU7_rule,
/*  278 */  _AndI__LoadB_memory__immI8_rule,
/*  279 */  _PartialSubtypeCheck_rsi_RegP_rax_RegP_rule,
/*  280 */  _LoadVector_memory__rule,
/*  281 */  _Binary_vec_kReg_rule,
/*  282 */  _Binary_vec_vec_rule,
/*  283 */  _Binary_vec__Binary_vec_kReg_rule,
/*  284 */  _Binary_vec_rRegI_rule,
/*  285 */  _Binary_vec_rRegL_rule,
/*  286 */  _Binary_vec_regF_rule,
/*  287 */  _Binary_vec_regD_rule,
/*  288 */  _Binary_cmpOp_vcmppd_immI8_rule,
/*  289 */  _Binary_legVec_legVec_rule,
/*  290 */  _Binary_regD_immD_rule,
/*  291 */  _LShiftCntV_immI8__rule,
/*  292 */  _RShiftCntV_immI8__rule,
/*  293 */  _VectorTest_legVec_legVec_rule,
/*  294 */  _VectorTest_kReg_kReg_rule,
/*  295 */  _Binary_vec__LoadVector_memory__rule,
/*  296 */  _MulAddVS2VI_vec_vec_rule,
/*  297 */  _Binary_vec_immU8_rule,
/*  298 */  _Binary__LoadVector_memory__immU8_rule,
/*  299 */  _VectorStoreMask_vec_immI_rule,
/*  300 */  _Binary_vec_immI8_rule,
/*  301 */  _Binary_vec__LShiftCntV_immI8__rule,
/*  302 */  _Binary_vec__RShiftCntV_immI8__rule,
/*  303 */  _Binary__LoadVector_memory__kReg_rule,
/*  304 */  _Binary_immI8_kReg_rule,
/*  305 */  _MaskAll_immI_M1__rule,
// last internally defined operand
/*  306 */  stackSlotI_rule,
/*  307 */  stackSlotL_rule,
/*  308 */  stackSlotP_rule,
/*  309 */  stackSlotF_rule,
/*  310 */  stackSlotD_rule,
/*  311 */  vlRegF_rule,
/*  312 */  legRegF_rule,
/*  313 */  regF_rule,
/*  314 */  regF_rule,
/*  315 */  vlRegD_rule,
/*  316 */  legRegD_rule,
/*  317 */  regD_rule,
/*  318 */  regD_rule,
/*  319 */  rRegP_rule,
/*  320 */  rRegP_rule,
/*  321 */  rRegP_rule,
/*  322 */  rRegP_rule,
/*  323 */  rRegP_rule,
/*  324 */  rRegP_rule,
/*  325 */  rRegP_rule,
/*  326 */  rRegP_rule,
/*  327 */  rRegP_rule,
/*  328 */  rRegP_rule,
/*  329 */  rRegP_rule,
/*  330 */  rRegP_rule,
/*  331 */  rRegP_rule,
/*  332 */  rRegP_rule,
/*  333 */  rRegP_rule,
/*  334 */  rRegP_rule,
/*  335 */  rRegI_rule,
/*  336 */  rRegI_rule,
/*  337 */  rRegL_rule,
/*  338 */  rRegL_rule,
/*  339 */  rRegL_rule,
/*  340 */  rRegL_rule,
/*  341 */  rRegP_rule,
/*  342 */  rRegP_rule,
/*  343 */  rRegP_rule,
/*  344 */  regF_rule,
/*  345 */  rRegN_rule,
/*  346 */  rRegN_rule,
/*  347 */  rRegN_rule,
/*  348 */  regF_rule,
/*  349 */  regD_rule,
/*  350 */  regD_rule,
/*  351 */  rRegI_rule,
/*  352 */  rRegL_rule,
/*  353 */  rRegP_rule,
/*  354 */  regF_rule,
/*  355 */  regD_rule,
/*  356 */  legVec_rule,
/*  357 */  vec_rule,
/*  358 */  Universe_rule,
/*  359 */  rRegP_rule,
/*  360 */  rRegL_rule,
/*  361 */  rRegP_rule,
/*  362 */  rRegP_rule,
/*  363 */  rRegI_rule,
/*  364 */  rRegL_rule,
/*  365 */  regF_rule,
/*  366 */  regD_rule,
/*  367 */  rFlagsReg_rule,
/*  368 */  rFlagsReg_rule,
/*  369 */  rFlagsReg_rule,
/*  370 */  rFlagsRegU_rule,
/*  371 */  rFlagsRegUCF_rule,
/*  372 */  rFlagsRegU_rule,
/*  373 */  rFlagsRegUCF_rule,
/*  374 */  rFlagsRegU_rule,
/*  375 */  rFlagsRegUCF_rule,
/*  376 */  rFlagsRegU_rule,
/*  377 */  rFlagsRegUCF_rule,
/*  378 */  rFlagsRegU_rule,
/*  379 */  rFlagsRegUCF_rule,
/*  380 */  rFlagsRegU_rule,
/*  381 */  rFlagsRegUCF_rule,
/*  382 */  rRegI_rule,
/*  383 */  regF_rule,
/*  384 */  rRegL_rule,
/*  385 */  regD_rule,
/*  386 */  regD_rule,
/*  387 */  rRegI_rule,
/*  388 */  rRegL_rule,
/*  389 */  regF_rule,
/*  390 */  regD_rule,
/*  391 */  rFlagsReg_rule,
/*  392 */  rFlagsReg_rule,
/*  393 */  rFlagsReg_rule,
/*  394 */  rFlagsReg_rule,
/*  395 */  rFlagsReg_rule,
/*  396 */  rFlagsReg_rule,
/*  397 */  rFlagsReg_rule,
/*  398 */  rFlagsReg_rule,
/*  399 */  rFlagsReg_rule,
/*  400 */  rFlagsReg_rule,
/*  401 */  rFlagsReg_rule,
/*  402 */  rFlagsReg_rule,
/*  403 */  rFlagsReg_rule,
/*  404 */  rFlagsReg_rule,
/*  405 */  rFlagsReg_rule,
/*  406 */  rFlagsReg_rule,
/*  407 */  rFlagsReg_rule,
/*  408 */  rFlagsReg_rule,
/*  409 */  rFlagsReg_rule,
/*  410 */  rFlagsReg_rule,
/*  411 */  rFlagsReg_rule,
/*  412 */  rFlagsRegU_rule,
/*  413 */  rFlagsRegU_rule,
/*  414 */  rFlagsRegU_rule,
/*  415 */  rFlagsRegU_rule,
/*  416 */  rFlagsRegU_rule,
/*  417 */  rFlagsRegU_rule,
/*  418 */  rFlagsRegU_rule,
/*  419 */  rFlagsReg_rule,
/*  420 */  rFlagsReg_rule,
/*  421 */  rFlagsReg_rule,
/*  422 */  rFlagsRegU_rule,
/*  423 */  rFlagsRegU_rule,
/*  424 */  rFlagsRegU_rule,
/*  425 */  rFlagsRegU_rule,
/*  426 */  rFlagsRegU_rule,
/*  427 */  rFlagsRegU_rule,
/*  428 */  rFlagsReg_rule,
/*  429 */  rFlagsReg_rule,
/*  430 */  rFlagsReg_rule,
/*  431 */  rFlagsReg_rule,
/*  432 */  rFlagsReg_rule,
/*  433 */  rFlagsReg_rule,
/*  434 */  rFlagsReg_rule,
/*  435 */  rFlagsReg_rule,
/*  436 */  rFlagsReg_rule,
/*  437 */  rFlagsReg_rule,
/*  438 */  rFlagsReg_rule,
/*  439 */  rFlagsReg_rule,
/*  440 */  rFlagsRegU_rule,
/*  441 */  rFlagsRegU_rule,
/*  442 */  rFlagsRegU_rule,
/*  443 */  rFlagsRegU_rule,
/*  444 */  rFlagsReg_rule,
/*  445 */  rFlagsReg_rule,
/*  446 */  rFlagsReg_rule,
/*  447 */  rFlagsReg_rule,
/*  448 */  rFlagsReg_rule,
/*  449 */  rFlagsReg_rule,
/*  450 */  rFlagsReg_rule,
/*  451 */  r15_RegP_rule,
/*  452 */  regF_rule,
/*  453 */  vlRegF_rule,
/*  454 */  regD_rule,
/*  455 */  vlRegD_rule,
/*  456 */  regF_rule,
/*  457 */  vlRegF_rule,
/*  458 */  regD_rule,
/*  459 */  vlRegD_rule,
/*  460 */  kReg_rule,
/*  461 */  vec_rule,
/*  462 */  legVec_rule,
/*  463 */  vec_rule,
/*  464 */  vec_rule,
/*  465 */  vec_rule,
/*  466 */  vec_rule,
/*  467 */  vec_rule,
/*  468 */  vec_rule,
/*  469 */  vec_rule,
/*  470 */  vec_rule,
/*  471 */  vec_rule,
/*  472 */  vec_rule,
/*  473 */  vec_rule,
/*  474 */  vec_rule,
/*  475 */  vec_rule,
/*  476 */  vec_rule,
/*  477 */  vec_rule,
/*  478 */  vec_rule,
/*  479 */  vec_rule,
/*  480 */  rFlagsReg_rule,
/*  481 */  rFlagsReg_rule,
/*  482 */  rFlagsReg_rule,
/*  483 */  kReg_rule,
/*  484 */  vec_rule,
/*  485 */  vec_rule,
/*  486 */  vec_rule,
/*  487 */  vec_rule,
/*  488 */  vec_rule,
/*  489 */  vec_rule,
/*  490 */  kReg_rule,
/*  491 */  kReg_rule,
/*  492 */  vec_rule,
/*  493 */  legVec_rule,
/*  494 */  rRegI_rule,
/*  495 */  rRegL_rule,
/*  496 */  rRegI_rule,
/*  497 */  rRegL_rule,
/*  498 */  rRegL_rule,
/*  499 */  rRegI_rule,
/*  500 */  rRegI_rule,
/*  501 */  rRegL_rule,
/*  502 */  rRegI_rule,
/*  503 */  rRegI_rule,
/*  504 */  rRegL_rule,
/*  505 */  rRegL_rule,
/*  506 */  rRegL_rule,
/*  507 */  rRegI_rule,
/*  508 */  rRegI_rule,
/*  509 */  rRegI_rule,
/*  510 */  rRegI_rule,
/*  511 */  rRegI_rule,
/*  512 */  rRegL_rule,
/*  513 */  rRegL_rule,
/*  514 */  rRegL_rule,
/*  515 */  rRegL_rule,
/*  516 */  rRegL_rule,
/*  517 */  rRegL_rule,
/*  518 */  rRegI_rule,
/*  519 */  rRegP_rule,
/*  520 */  rRegN_rule,
/*  521 */  rRegP_rule,
/*  522 */  rRegN_rule,
/*  523 */  regF_rule,
/*  524 */  regD_rule,
/*  525 */  regD_rule,
/*  526 */  legRegF_rule,
/*  527 */  legRegF_rule,
/*  528 */  legRegD_rule,
/*  529 */  legRegD_rule,
/*  530 */  legRegF_rule,
/*  531 */  legRegF_rule,
/*  532 */  legRegD_rule,
/*  533 */  legRegD_rule,
/*  534 */  Universe_rule,
/*  535 */  Universe_rule,
/*  536 */  Universe_rule,
/*  537 */  Universe_rule,
/*  538 */  Universe_rule,
/*  539 */  Universe_rule,
/*  540 */  Universe_rule,
/*  541 */  Universe_rule,
/*  542 */  Universe_rule,
/*  543 */  Universe_rule,
/*  544 */  Universe_rule,
/*  545 */  Universe_rule,
/*  546 */  Universe_rule,
/*  547 */  Universe_rule,
/*  548 */  Universe_rule,
/*  549 */  Universe_rule,
/*  550 */  Universe_rule,
/*  551 */  Universe_rule,
/*  552 */  Universe_rule,
/*  553 */  Universe_rule,
/*  554 */  Universe_rule,
/*  555 */  Universe_rule,
/*  556 */  Universe_rule,
/*  557 */  Universe_rule,
/*  558 */  Universe_rule,
/*  559 */  Universe_rule,
/*  560 */  Universe_rule,
/*  561 */  Universe_rule,
/*  562 */  Universe_rule,
/*  563 */  Universe_rule,
/*  564 */  Universe_rule,
/*  565 */  Universe_rule,
/*  566 */  Universe_rule,
/*  567 */  Universe_rule,
/*  568 */  Universe_rule,
/*  569 */  rRegI_rule,
/*  570 */  rRegL_rule,
/*  571 */  rRegI_rule,
/*  572 */  rRegI_rule,
/*  573 */  rRegI_rule,
/*  574 */  rRegI_rule,
/*  575 */  rRegI_rule,
/*  576 */  rRegI_rule,
/*  577 */  rRegI_rule,
/*  578 */  rRegI_rule,
/*  579 */  rRegI_rule,
/*  580 */  rRegI_rule,
/*  581 */  rRegI_rule,
/*  582 */  rRegI_rule,
/*  583 */  rRegI_rule,
/*  584 */  rRegI_rule,
/*  585 */  Universe_rule,
/*  586 */  Universe_rule,
/*  587 */  Universe_rule,
/*  588 */  Universe_rule,
/*  589 */  Universe_rule,
/*  590 */  Universe_rule,
/*  591 */  Universe_rule,
/*  592 */  Universe_rule,
/*  593 */  Universe_rule,
/*  594 */  rRegI_rule,
/*  595 */  rRegI_rule,
/*  596 */  rRegN_rule,
/*  597 */  rRegN_rule,
/*  598 */  rRegP_rule,
/*  599 */  rRegP_rule,
/*  600 */  rRegN_rule,
/*  601 */  rRegP_rule,
/*  602 */  Universe_rule,
/*  603 */  Universe_rule,
/*  604 */  Universe_rule,
/*  605 */  rRegI_rule,
/*  606 */  rRegI_rule,
/*  607 */  rRegI_rule,
/*  608 */  rRegI_rule,
/*  609 */  rRegI_rule,
/*  610 */  rRegI_rule,
/*  611 */  rRegN_rule,
/*  612 */  rRegN_rule,
/*  613 */  rRegN_rule,
/*  614 */  rRegP_rule,
/*  615 */  rRegP_rule,
/*  616 */  rRegP_rule,
/*  617 */  rRegL_rule,
/*  618 */  rRegL_rule,
/*  619 */  rRegL_rule,
/*  620 */  rRegL_rule,
/*  621 */  rRegL_rule,
/*  622 */  rRegL_rule,
/*  623 */  regF_rule,
/*  624 */  regF_rule,
/*  625 */  regF_rule,
/*  626 */  regD_rule,
/*  627 */  regD_rule,
/*  628 */  regD_rule,
/*  629 */  rRegI_rule,
/*  630 */  rRegI_rule,
/*  631 */  rRegI_rule,
/*  632 */  rRegI_rule,
/*  633 */  Universe_rule,
/*  634 */  Universe_rule,
/*  635 */  Universe_rule,
/*  636 */  rRegI_rule,
/*  637 */  Universe_rule,
/*  638 */  rRegI_rule,
/*  639 */  Universe_rule,
/*  640 */  rRegI_rule,
/*  641 */  rRegL_rule,
/*  642 */  rRegL_rule,
/*  643 */  rRegL_rule,
/*  644 */  rRegL_rule,
/*  645 */  Universe_rule,
/*  646 */  Universe_rule,
/*  647 */  Universe_rule,
/*  648 */  rRegI_rule,
/*  649 */  Universe_rule,
/*  650 */  rRegL_rule,
/*  651 */  Universe_rule,
/*  652 */  rRegL_rule,
/*  653 */  rRegP_rule,
/*  654 */  rRegP_rule,
/*  655 */  rRegP_rule,
/*  656 */  rRegP_rule,
/*  657 */  rRegI_rule,
/*  658 */  rRegI_rule,
/*  659 */  rRegI_rule,
/*  660 */  rRegI_rule,
/*  661 */  rRegI_rule,
/*  662 */  rRegI_rule,
/*  663 */  rRegI_rule,
/*  664 */  rRegI_rule,
/*  665 */  rRegI_rule,
/*  666 */  rRegI_rule,
/*  667 */  rRegI_rule,
/*  668 */  rRegI_rule,
/*  669 */  rax_RegI_rule,
/*  670 */  rax_RegI_rule,
/*  671 */  rax_RegI_rule,
/*  672 */  rax_RegL_rule,
/*  673 */  rax_RegN_rule,
/*  674 */  rax_RegP_rule,
/*  675 */  Universe_rule,
/*  676 */  rRegI_rule,
/*  677 */  Universe_rule,
/*  678 */  rRegI_rule,
/*  679 */  Universe_rule,
/*  680 */  rRegI_rule,
/*  681 */  Universe_rule,
/*  682 */  rRegL_rule,
/*  683 */  rRegI_rule,
/*  684 */  rRegI_rule,
/*  685 */  rRegI_rule,
/*  686 */  rRegL_rule,
/*  687 */  rRegP_rule,
/*  688 */  rRegN_rule,
/*  689 */  rRegI_rule,
/*  690 */  rRegL_rule,
/*  691 */  rRegI_rule,
/*  692 */  rRegI_rule,
/*  693 */  rRegI_rule,
/*  694 */  Universe_rule,
/*  695 */  Universe_rule,
/*  696 */  rRegL_rule,
/*  697 */  rRegI_rule,
/*  698 */  rRegL_rule,
/*  699 */  Universe_rule,
/*  700 */  Universe_rule,
/*  701 */  rRegP_rule,
/*  702 */  rRegI_rule,
/*  703 */  rRegI_rule,
/*  704 */  Universe_rule,
/*  705 */  rRegL_rule,
/*  706 */  rRegL_rule,
/*  707 */  Universe_rule,
/*  708 */  rRegI_rule,
/*  709 */  rRegI_rule,
/*  710 */  rRegI_rule,
/*  711 */  rRegI_rule,
/*  712 */  rRegI_rule,
/*  713 */  rRegI_rule,
/*  714 */  rRegL_rule,
/*  715 */  rRegL_rule,
/*  716 */  rRegL_rule,
/*  717 */  rRegL_rule,
/*  718 */  rRegL_rule,
/*  719 */  rdx_RegL_rule,
/*  720 */  rdx_RegL_rule,
/*  721 */  rax_RegI_rule,
/*  722 */  rax_RegL_rule,
/*  723 */  Universe_rule,
/*  724 */  Universe_rule,
/*  725 */  0,
/*  726 */  0,
/*  727 */  0,
/*  728 */  0,
/*  729 */  rdx_RegL_rule,
/*  730 */  rdx_RegI_rule,
/*  731 */  rdx_RegL_rule,
/*  732 */  rRegI_rule,
/*  733 */  Universe_rule,
/*  734 */  rRegI_rule,
/*  735 */  Universe_rule,
/*  736 */  rRegI_rule,
/*  737 */  Universe_rule,
/*  738 */  rRegI_rule,
/*  739 */  Universe_rule,
/*  740 */  rRegI_rule,
/*  741 */  Universe_rule,
/*  742 */  rRegI_rule,
/*  743 */  Universe_rule,
/*  744 */  rRegI_rule,
/*  745 */  Universe_rule,
/*  746 */  rRegI_rule,
/*  747 */  Universe_rule,
/*  748 */  rRegI_rule,
/*  749 */  Universe_rule,
/*  750 */  rRegL_rule,
/*  751 */  Universe_rule,
/*  752 */  rRegL_rule,
/*  753 */  Universe_rule,
/*  754 */  rRegL_rule,
/*  755 */  Universe_rule,
/*  756 */  rRegL_rule,
/*  757 */  Universe_rule,
/*  758 */  rRegL_rule,
/*  759 */  Universe_rule,
/*  760 */  rRegL_rule,
/*  761 */  Universe_rule,
/*  762 */  rRegL_rule,
/*  763 */  Universe_rule,
/*  764 */  rRegL_rule,
/*  765 */  Universe_rule,
/*  766 */  rRegL_rule,
/*  767 */  Universe_rule,
/*  768 */  rRegI_rule,
/*  769 */  rRegI_rule,
/*  770 */  rRegI_rule,
/*  771 */  rRegI_rule,
/*  772 */  rRegI_rule,
/*  773 */  rRegI_rule,
/*  774 */  rRegI_rule,
/*  775 */  rRegL_rule,
/*  776 */  rRegL_rule,
/*  777 */  rRegL_rule,
/*  778 */  rRegL_rule,
/*  779 */  rRegL_rule,
/*  780 */  rRegI_rule,
/*  781 */  rRegI_rule,
/*  782 */  rRegL_rule,
/*  783 */  rRegI_rule,
/*  784 */  rRegL_rule,
/*  785 */  rRegL_rule,
/*  786 */  rRegI_rule,
/*  787 */  rRegI_rule,
/*  788 */  rRegI_rule,
/*  789 */  Universe_rule,
/*  790 */  Universe_rule,
/*  791 */  Universe_rule,
/*  792 */  Universe_rule,
/*  793 */  Universe_rule,
/*  794 */  rRegI_rule,
/*  795 */  rRegI_rule,
/*  796 */  rRegI_rule,
/*  797 */  rRegI_rule,
/*  798 */  rRegI_rule,
/*  799 */  rRegI_rule,
/*  800 */  rRegI_rule,
/*  801 */  rRegI_rule,
/*  802 */  rRegI_rule,
/*  803 */  rRegI_rule,
/*  804 */  rRegI_rule,
/*  805 */  rRegI_rule,
/*  806 */  rRegI_rule,
/*  807 */  rRegI_rule,
/*  808 */  rRegI_rule,
/*  809 */  rRegI_rule,
/*  810 */  rRegI_rule,
/*  811 */  rRegI_rule,
/*  812 */  rRegI_rule,
/*  813 */  rRegI_rule,
/*  814 */  Universe_rule,
/*  815 */  Universe_rule,
/*  816 */  Universe_rule,
/*  817 */  Universe_rule,
/*  818 */  Universe_rule,
/*  819 */  rRegI_rule,
/*  820 */  rRegI_rule,
/*  821 */  rRegI_rule,
/*  822 */  rRegI_rule,
/*  823 */  rRegI_rule,
/*  824 */  Universe_rule,
/*  825 */  Universe_rule,
/*  826 */  Universe_rule,
/*  827 */  Universe_rule,
/*  828 */  Universe_rule,
/*  829 */  rRegL_rule,
/*  830 */  rRegL_rule,
/*  831 */  rRegL_rule,
/*  832 */  rRegL_rule,
/*  833 */  rRegL_rule,
/*  834 */  rRegL_rule,
/*  835 */  Universe_rule,
/*  836 */  Universe_rule,
/*  837 */  Universe_rule,
/*  838 */  Universe_rule,
/*  839 */  rRegL_rule,
/*  840 */  rRegL_rule,
/*  841 */  rRegL_rule,
/*  842 */  rRegL_rule,
/*  843 */  rRegL_rule,
/*  844 */  rRegL_rule,
/*  845 */  rRegL_rule,
/*  846 */  rRegL_rule,
/*  847 */  rRegL_rule,
/*  848 */  rRegL_rule,
/*  849 */  rRegL_rule,
/*  850 */  rRegL_rule,
/*  851 */  rRegL_rule,
/*  852 */  rRegL_rule,
/*  853 */  rRegL_rule,
/*  854 */  rRegL_rule,
/*  855 */  rRegL_rule,
/*  856 */  rRegL_rule,
/*  857 */  rRegL_rule,
/*  858 */  rRegL_rule,
/*  859 */  rRegL_rule,
/*  860 */  rRegL_rule,
/*  861 */  Universe_rule,
/*  862 */  Universe_rule,
/*  863 */  Universe_rule,
/*  864 */  Universe_rule,
/*  865 */  rRegL_rule,
/*  866 */  rRegL_rule,
/*  867 */  rRegL_rule,
/*  868 */  rRegL_rule,
/*  869 */  rRegL_rule,
/*  870 */  Universe_rule,
/*  871 */  Universe_rule,
/*  872 */  Universe_rule,
/*  873 */  rRegI_rule,
/*  874 */  rRegI_rule,
/*  875 */  rRegI_rule,
/*  876 */  rRegI_rule,
/*  877 */  rRegI_rule,
/*  878 */  rRegI_rule,
/*  879 */  rRegI_rule,
/*  880 */  rRegI_rule,
/*  881 */  rRegI_rule,
/*  882 */  rRegI_rule,
/*  883 */  rRegI_rule,
/*  884 */  rRegI_rule,
/*  885 */  rRegI_rule,
/*  886 */  rRegI_rule,
/*  887 */  rRegI_rule,
/*  888 */  rRegI_rule,
/*  889 */  regD_rule,
/*  890 */  regD_rule,
/*  891 */  regF_rule,
/*  892 */  regF_rule,
/*  893 */  rRegI_rule,
/*  894 */  rRegL_rule,
/*  895 */  rRegI_rule,
/*  896 */  rRegL_rule,
/*  897 */  regF_rule,
/*  898 */  regF_rule,
/*  899 */  regD_rule,
/*  900 */  regD_rule,
/*  901 */  regF_rule,
/*  902 */  regD_rule,
/*  903 */  regF_rule,
/*  904 */  regF_rule,
/*  905 */  regD_rule,
/*  906 */  regD_rule,
/*  907 */  rRegL_rule,
/*  908 */  rRegL_rule,
/*  909 */  rRegL_rule,
/*  910 */  rRegL_rule,
/*  911 */  rRegI_rule,
/*  912 */  stackSlotI_rule,
/*  913 */  stackSlotF_rule,
/*  914 */  stackSlotL_rule,
/*  915 */  stackSlotD_rule,
/*  916 */  Universe_rule,
/*  917 */  Universe_rule,
/*  918 */  Universe_rule,
/*  919 */  Universe_rule,
/*  920 */  Universe_rule,
/*  921 */  rax_RegI_rule,
/*  922 */  rax_RegI_rule,
/*  923 */  rax_RegI_rule,
/*  924 */  rax_RegI_rule,
/*  925 */  rax_RegI_rule,
/*  926 */  rax_RegI_rule,
/*  927 */  rax_RegI_rule,
/*  928 */  rax_RegI_rule,
/*  929 */  rbx_RegI_rule,
/*  930 */  rbx_RegI_rule,
/*  931 */  rbx_RegI_rule,
/*  932 */  rbx_RegI_rule,
/*  933 */  rbx_RegI_rule,
/*  934 */  rbx_RegI_rule,
/*  935 */  rbx_RegI_rule,
/*  936 */  rbx_RegI_rule,
/*  937 */  rax_RegI_rule,
/*  938 */  rax_RegI_rule,
/*  939 */  rax_RegI_rule,
/*  940 */  rax_RegI_rule,
/*  941 */  rax_RegI_rule,
/*  942 */  rax_RegI_rule,
/*  943 */  rax_RegI_rule,
/*  944 */  rax_RegI_rule,
/*  945 */  rax_RegI_rule,
/*  946 */  rax_RegI_rule,
/*  947 */  Universe_rule,
/*  948 */  Universe_rule,
/*  949 */  rax_RegI_rule,
/*  950 */  rax_RegI_rule,
/*  951 */  rRegI_rule,
/*  952 */  0,
/*  953 */  rRegI_rule,
/*  954 */  0,
/*  955 */  rRegI_rule,
/*  956 */  Universe_rule,
/*  957 */  Universe_rule,
/*  958 */  Universe_rule,
/*  959 */  Universe_rule,
/*  960 */  Universe_rule,
/*  961 */  Universe_rule,
/*  962 */  Universe_rule,
/*  963 */  Universe_rule,
/*  964 */  Universe_rule,
/*  965 */  Universe_rule,
/*  966 */  Universe_rule,
/*  967 */  rdi_RegP_rule,
/*  968 */  Universe_rule,
/*  969 */  Universe_rule,
/*  970 */  Universe_rule,
/*  971 */  Universe_rule,
/*  972 */  Universe_rule,
/*  973 */  Universe_rule,
/*  974 */  Universe_rule,
/*  975 */  Universe_rule,
/*  976 */  Universe_rule,
/*  977 */  Universe_rule,
/*  978 */  Universe_rule,
/*  979 */  Universe_rule,
/*  980 */  Universe_rule,
/*  981 */  Universe_rule,
/*  982 */  Universe_rule,
/*  983 */  Universe_rule,
/*  984 */  Universe_rule,
/*  985 */  Universe_rule,
/*  986 */  Universe_rule,
/*  987 */  rax_RegP_rule,
/*  988 */  Universe_rule,
/*  989 */  Universe_rule,
/*  990 */  rRegI_rule,
/*  991 */  regF_rule,
/*  992 */  regF_rule,
/*  993 */  regF_rule,
/*  994 */  regF_rule,
/*  995 */  regF_rule,
/*  996 */  regF_rule,
/*  997 */  regF_rule,
/*  998 */  regF_rule,
/*  999 */  regD_rule,
/* 1000 */  regD_rule,
/* 1001 */  regD_rule,
/* 1002 */  regD_rule,
/* 1003 */  regD_rule,
/* 1004 */  regD_rule,
/* 1005 */  regD_rule,
/* 1006 */  regD_rule,
/* 1007 */  regF_rule,
/* 1008 */  regF_rule,
/* 1009 */  regF_rule,
/* 1010 */  regF_rule,
/* 1011 */  regF_rule,
/* 1012 */  regF_rule,
/* 1013 */  regD_rule,
/* 1014 */  regD_rule,
/* 1015 */  regD_rule,
/* 1016 */  regD_rule,
/* 1017 */  regD_rule,
/* 1018 */  regD_rule,
/* 1019 */  regF_rule,
/* 1020 */  regF_rule,
/* 1021 */  regF_rule,
/* 1022 */  regF_rule,
/* 1023 */  regF_rule,
/* 1024 */  regF_rule,
/* 1025 */  regF_rule,
/* 1026 */  regF_rule,
/* 1027 */  regD_rule,
/* 1028 */  regD_rule,
/* 1029 */  regD_rule,
/* 1030 */  regD_rule,
/* 1031 */  regD_rule,
/* 1032 */  regD_rule,
/* 1033 */  regD_rule,
/* 1034 */  regD_rule,
/* 1035 */  regF_rule,
/* 1036 */  regF_rule,
/* 1037 */  regF_rule,
/* 1038 */  regF_rule,
/* 1039 */  regF_rule,
/* 1040 */  regF_rule,
/* 1041 */  regD_rule,
/* 1042 */  regD_rule,
/* 1043 */  regD_rule,
/* 1044 */  regD_rule,
/* 1045 */  regD_rule,
/* 1046 */  regD_rule,
/* 1047 */  regF_rule,
/* 1048 */  regD_rule,
/* 1049 */  kReg_rule,
/* 1050 */  kReg_rule,
/* 1051 */  kReg_rule,
/* 1052 */  vec_rule,
/* 1053 */  legVec_rule,
/* 1054 */  legRegD_rule,
/* 1055 */  legRegD_rule,
/* 1056 */  legRegD_rule,
/* 1057 */  legVec_rule,
/* 1058 */  vec_rule,
/* 1059 */  legVec_rule,
/* 1060 */  vec_rule,
/* 1061 */  Universe_rule,
/* 1062 */  regD_rule,
/* 1063 */  regF_rule,
/* 1064 */  vec_rule,
/* 1065 */  Universe_rule,
/* 1066 */  legVec_rule,
/* 1067 */  vec_rule,
/* 1068 */  vec_rule,
/* 1069 */  Universe_rule,
/* 1070 */  Universe_rule,
/* 1071 */  vec_rule,
/* 1072 */  vec_rule,
/* 1073 */  vec_rule,
/* 1074 */  vec_rule,
/* 1075 */  vec_rule,
/* 1076 */  vec_rule,
/* 1077 */  vec_rule,
/* 1078 */  vec_rule,
/* 1079 */  vec_rule,
/* 1080 */  vec_rule,
/* 1081 */  vec_rule,
/* 1082 */  vec_rule,
/* 1083 */  vec_rule,
/* 1084 */  vec_rule,
/* 1085 */  vec_rule,
/* 1086 */  vec_rule,
/* 1087 */  vec_rule,
/* 1088 */  vec_rule,
/* 1089 */  vec_rule,
/* 1090 */  vec_rule,
/* 1091 */  vec_rule,
/* 1092 */  vec_rule,
/* 1093 */  vec_rule,
/* 1094 */  vec_rule,
/* 1095 */  vec_rule,
/* 1096 */  vec_rule,
/* 1097 */  vec_rule,
/* 1098 */  vec_rule,
/* 1099 */  vec_rule,
/* 1100 */  vec_rule,
/* 1101 */  vec_rule,
/* 1102 */  vec_rule,
/* 1103 */  vec_rule,
/* 1104 */  vec_rule,
/* 1105 */  vec_rule,
/* 1106 */  vec_rule,
/* 1107 */  vec_rule,
/* 1108 */  rRegI_rule,
/* 1109 */  rRegI_rule,
/* 1110 */  rRegI_rule,
/* 1111 */  rRegI_rule,
/* 1112 */  rRegI_rule,
/* 1113 */  rRegI_rule,
/* 1114 */  rRegI_rule,
/* 1115 */  rRegL_rule,
/* 1116 */  rRegL_rule,
/* 1117 */  rRegL_rule,
/* 1118 */  rRegL_rule,
/* 1119 */  rRegL_rule,
/* 1120 */  rRegL_rule,
/* 1121 */  rRegL_rule,
/* 1122 */  rRegL_rule,
/* 1123 */  rRegL_rule,
/* 1124 */  rRegL_rule,
/* 1125 */  rRegL_rule,
/* 1126 */  rRegL_rule,
/* 1127 */  rRegL_rule,
/* 1128 */  rRegL_rule,
/* 1129 */  regF_rule,
/* 1130 */  regF_rule,
/* 1131 */  regF_rule,
/* 1132 */  regF_rule,
/* 1133 */  regF_rule,
/* 1134 */  regF_rule,
/* 1135 */  regD_rule,
/* 1136 */  regD_rule,
/* 1137 */  regD_rule,
/* 1138 */  regD_rule,
/* 1139 */  regD_rule,
/* 1140 */  regD_rule,
/* 1141 */  rRegI_rule,
/* 1142 */  rRegI_rule,
/* 1143 */  rRegI_rule,
/* 1144 */  rRegI_rule,
/* 1145 */  rRegI_rule,
/* 1146 */  rRegI_rule,
/* 1147 */  rRegI_rule,
/* 1148 */  rRegI_rule,
/* 1149 */  rRegI_rule,
/* 1150 */  rRegI_rule,
/* 1151 */  rRegI_rule,
/* 1152 */  rRegI_rule,
/* 1153 */  rRegI_rule,
/* 1154 */  rRegI_rule,
/* 1155 */  rRegI_rule,
/* 1156 */  rRegI_rule,
/* 1157 */  rRegI_rule,
/* 1158 */  rRegI_rule,
/* 1159 */  rRegI_rule,
/* 1160 */  rRegI_rule,
/* 1161 */  rRegI_rule,
/* 1162 */  legRegF_rule,
/* 1163 */  legRegF_rule,
/* 1164 */  legRegF_rule,
/* 1165 */  legRegF_rule,
/* 1166 */  legRegF_rule,
/* 1167 */  legRegF_rule,
/* 1168 */  legRegF_rule,
/* 1169 */  legRegF_rule,
/* 1170 */  legRegD_rule,
/* 1171 */  legRegD_rule,
/* 1172 */  legRegD_rule,
/* 1173 */  legRegD_rule,
/* 1174 */  legRegD_rule,
/* 1175 */  legRegD_rule,
/* 1176 */  legRegD_rule,
/* 1177 */  legRegD_rule,
/* 1178 */  vec_rule,
/* 1179 */  vec_rule,
/* 1180 */  vec_rule,
/* 1181 */  vec_rule,
/* 1182 */  vec_rule,
/* 1183 */  vec_rule,
/* 1184 */  vec_rule,
/* 1185 */  vec_rule,
/* 1186 */  vec_rule,
/* 1187 */  vec_rule,
/* 1188 */  vec_rule,
/* 1189 */  vec_rule,
/* 1190 */  vec_rule,
/* 1191 */  vec_rule,
/* 1192 */  vec_rule,
/* 1193 */  vec_rule,
/* 1194 */  vec_rule,
/* 1195 */  vec_rule,
/* 1196 */  vec_rule,
/* 1197 */  vec_rule,
/* 1198 */  vec_rule,
/* 1199 */  vec_rule,
/* 1200 */  vec_rule,
/* 1201 */  vec_rule,
/* 1202 */  vec_rule,
/* 1203 */  vec_rule,
/* 1204 */  vec_rule,
/* 1205 */  vec_rule,
/* 1206 */  vec_rule,
/* 1207 */  vec_rule,
/* 1208 */  vec_rule,
/* 1209 */  vec_rule,
/* 1210 */  vec_rule,
/* 1211 */  vec_rule,
/* 1212 */  vec_rule,
/* 1213 */  vec_rule,
/* 1214 */  vec_rule,
/* 1215 */  vec_rule,
/* 1216 */  vec_rule,
/* 1217 */  vec_rule,
/* 1218 */  vec_rule,
/* 1219 */  vec_rule,
/* 1220 */  vec_rule,
/* 1221 */  vec_rule,
/* 1222 */  vec_rule,
/* 1223 */  vec_rule,
/* 1224 */  vec_rule,
/* 1225 */  vec_rule,
/* 1226 */  vec_rule,
/* 1227 */  vec_rule,
/* 1228 */  vec_rule,
/* 1229 */  vec_rule,
/* 1230 */  vec_rule,
/* 1231 */  vec_rule,
/* 1232 */  vec_rule,
/* 1233 */  vec_rule,
/* 1234 */  vec_rule,
/* 1235 */  vec_rule,
/* 1236 */  vec_rule,
/* 1237 */  vec_rule,
/* 1238 */  vec_rule,
/* 1239 */  vec_rule,
/* 1240 */  vec_rule,
/* 1241 */  vec_rule,
/* 1242 */  vec_rule,
/* 1243 */  vec_rule,
/* 1244 */  vec_rule,
/* 1245 */  vec_rule,
/* 1246 */  legVec_rule,
/* 1247 */  legVec_rule,
/* 1248 */  vec_rule,
/* 1249 */  vec_rule,
/* 1250 */  vec_rule,
/* 1251 */  vec_rule,
/* 1252 */  vec_rule,
/* 1253 */  vec_rule,
/* 1254 */  vec_rule,
/* 1255 */  vec_rule,
/* 1256 */  vec_rule,
/* 1257 */  vec_rule,
/* 1258 */  vec_rule,
/* 1259 */  vec_rule,
/* 1260 */  legVec_rule,
/* 1261 */  legVec_rule,
/* 1262 */  vec_rule,
/* 1263 */  vec_rule,
/* 1264 */  legVec_rule,
/* 1265 */  legVec_rule,
/* 1266 */  vec_rule,
/* 1267 */  vec_rule,
/* 1268 */  regF_rule,
/* 1269 */  regD_rule,
/* 1270 */  regF_rule,
/* 1271 */  regD_rule,
/* 1272 */  vec_rule,
/* 1273 */  vec_rule,
/* 1274 */  vec_rule,
/* 1275 */  vec_rule,
/* 1276 */  vec_rule,
/* 1277 */  vec_rule,
/* 1278 */  vec_rule,
/* 1279 */  vec_rule,
/* 1280 */  vec_rule,
/* 1281 */  vec_rule,
/* 1282 */  vec_rule,
/* 1283 */  vec_rule,
/* 1284 */  vec_rule,
/* 1285 */  vec_rule,
/* 1286 */  vec_rule,
/* 1287 */  vec_rule,
/* 1288 */  vec_rule,
/* 1289 */  vec_rule,
/* 1290 */  vec_rule,
/* 1291 */  vec_rule,
/* 1292 */  vec_rule,
/* 1293 */  vec_rule,
/* 1294 */  vec_rule,
/* 1295 */  vec_rule,
/* 1296 */  vec_rule,
/* 1297 */  vec_rule,
/* 1298 */  vec_rule,
/* 1299 */  vec_rule,
/* 1300 */  vec_rule,
/* 1301 */  vec_rule,
/* 1302 */  vec_rule,
/* 1303 */  vec_rule,
/* 1304 */  vec_rule,
/* 1305 */  vec_rule,
/* 1306 */  vec_rule,
/* 1307 */  vec_rule,
/* 1308 */  vec_rule,
/* 1309 */  vec_rule,
/* 1310 */  vec_rule,
/* 1311 */  vec_rule,
/* 1312 */  vec_rule,
/* 1313 */  vec_rule,
/* 1314 */  vec_rule,
/* 1315 */  vec_rule,
/* 1316 */  vec_rule,
/* 1317 */  vec_rule,
/* 1318 */  vec_rule,
/* 1319 */  vec_rule,
/* 1320 */  vec_rule,
/* 1321 */  vec_rule,
/* 1322 */  vec_rule,
/* 1323 */  vec_rule,
/* 1324 */  vec_rule,
/* 1325 */  vec_rule,
/* 1326 */  vec_rule,
/* 1327 */  vec_rule,
/* 1328 */  vec_rule,
/* 1329 */  vec_rule,
/* 1330 */  vec_rule,
/* 1331 */  vec_rule,
/* 1332 */  vec_rule,
/* 1333 */  vec_rule,
/* 1334 */  vec_rule,
/* 1335 */  vec_rule,
/* 1336 */  vec_rule,
/* 1337 */  vec_rule,
/* 1338 */  vec_rule,
/* 1339 */  vec_rule,
/* 1340 */  vec_rule,
/* 1341 */  vec_rule,
/* 1342 */  vec_rule,
/* 1343 */  vec_rule,
/* 1344 */  vec_rule,
/* 1345 */  vec_rule,
/* 1346 */  vec_rule,
/* 1347 */  vec_rule,
/* 1348 */  vec_rule,
/* 1349 */  vec_rule,
/* 1350 */  vec_rule,
/* 1351 */  vec_rule,
/* 1352 */  vec_rule,
/* 1353 */  legVec_rule,
/* 1354 */  vec_rule,
/* 1355 */  kReg_rule,
/* 1356 */  legVec_rule,
/* 1357 */  legVec_rule,
/* 1358 */  legVec_rule,
/* 1359 */  vec_rule,
/* 1360 */  kReg_rule,
/* 1361 */  rRegI_rule,
/* 1362 */  rRegI_rule,
/* 1363 */  rRegI_rule,
/* 1364 */  rRegI_rule,
/* 1365 */  rRegI_rule,
/* 1366 */  rRegI_rule,
/* 1367 */  rRegL_rule,
/* 1368 */  rRegL_rule,
/* 1369 */  legRegF_rule,
/* 1370 */  legRegF_rule,
/* 1371 */  legRegD_rule,
/* 1372 */  legRegD_rule,
/* 1373 */  vec_rule,
/* 1374 */  legVec_rule,
/* 1375 */  legVec_rule,
/* 1376 */  vec_rule,
/* 1377 */  vec_rule,
/* 1378 */  vec_rule,
/* 1379 */  vec_rule,
/* 1380 */  vec_rule,
/* 1381 */  vec_rule,
/* 1382 */  vec_rule,
/* 1383 */  vec_rule,
/* 1384 */  rRegI_rule,
/* 1385 */  rRegI_rule,
/* 1386 */  rRegI_rule,
/* 1387 */  rRegI_rule,
/* 1388 */  rRegI_rule,
/* 1389 */  rRegI_rule,
/* 1390 */  rRegI_rule,
/* 1391 */  legVec_rule,
/* 1392 */  kReg_rule,
/* 1393 */  kReg_rule,
/* 1394 */  vec_rule,
/* 1395 */  vec_rule,
/* 1396 */  vec_rule,
/* 1397 */  vec_rule,
/* 1398 */  vec_rule,
/* 1399 */  vec_rule,
/* 1400 */  vec_rule,
/* 1401 */  vec_rule,
/* 1402 */  vec_rule,
/* 1403 */  vec_rule,
/* 1404 */  vec_rule,
/* 1405 */  legVec_rule,
/* 1406 */  vec_rule,
/* 1407 */  vec_rule,
/* 1408 */  vec_rule,
/* 1409 */  legVec_rule,
/* 1410 */  vec_rule,
/* 1411 */  vec_rule,
/* 1412 */  vec_rule,
/* 1413 */  vec_rule,
/* 1414 */  vec_rule,
/* 1415 */  vec_rule,
/* 1416 */  vec_rule,
/* 1417 */  vec_rule,
/* 1418 */  vec_rule,
/* 1419 */  vec_rule,
/* 1420 */  vec_rule,
/* 1421 */  vec_rule,
/* 1422 */  vec_rule,
/* 1423 */  vec_rule,
/* 1424 */  vec_rule,
/* 1425 */  vec_rule,
/* 1426 */  vec_rule,
/* 1427 */  vec_rule,
/* 1428 */  vec_rule,
/* 1429 */  vec_rule,
/* 1430 */  vec_rule,
/* 1431 */  rRegI_rule,
/* 1432 */  vec_rule,
/* 1433 */  kReg_rule,
/* 1434 */  kReg_rule,
/* 1435 */  Universe_rule,
/* 1436 */  rRegL_rule,
/* 1437 */  rRegL_rule,
/* 1438 */  rRegL_rule,
/* 1439 */  rRegI_rule,
/* 1440 */  rRegI_rule,
/* 1441 */  rRegI_rule,
/* 1442 */  rRegI_rule,
/* 1443 */  rRegI_rule,
/* 1444 */  rRegI_rule,
/* 1445 */  rRegI_rule,
/* 1446 */  rRegI_rule,
/* 1447 */  rRegI_rule,
/* 1448 */  vec_rule,
/* 1449 */  vec_rule,
/* 1450 */  vec_rule,
/* 1451 */  vec_rule,
/* 1452 */  vec_rule,
/* 1453 */  vec_rule,
/* 1454 */  vec_rule,
/* 1455 */  vec_rule,
/* 1456 */  vec_rule,
/* 1457 */  vec_rule,
/* 1458 */  vec_rule,
/* 1459 */  vec_rule,
/* 1460 */  vec_rule,
/* 1461 */  vec_rule,
/* 1462 */  vec_rule,
/* 1463 */  vec_rule,
/* 1464 */  vec_rule,
/* 1465 */  vec_rule,
/* 1466 */  vec_rule,
/* 1467 */  vec_rule,
/* 1468 */  vec_rule,
/* 1469 */  vec_rule,
/* 1470 */  vec_rule,
/* 1471 */  vec_rule,
/* 1472 */  vec_rule,
/* 1473 */  vec_rule,
/* 1474 */  vec_rule,
/* 1475 */  vec_rule,
/* 1476 */  vec_rule,
/* 1477 */  vec_rule,
/* 1478 */  vec_rule,
/* 1479 */  vec_rule,
/* 1480 */  vec_rule,
/* 1481 */  vec_rule,
/* 1482 */  vec_rule,
/* 1483 */  vec_rule,
/* 1484 */  vec_rule,
/* 1485 */  vec_rule,
/* 1486 */  vec_rule,
/* 1487 */  vec_rule,
/* 1488 */  vec_rule,
/* 1489 */  vec_rule,
/* 1490 */  vec_rule,
/* 1491 */  vec_rule,
/* 1492 */  vec_rule,
/* 1493 */  vec_rule,
/* 1494 */  vec_rule,
/* 1495 */  vec_rule,
/* 1496 */  vec_rule,
/* 1497 */  vec_rule,
/* 1498 */  vec_rule,
/* 1499 */  vec_rule,
/* 1500 */  vec_rule,
/* 1501 */  vec_rule,
/* 1502 */  vec_rule,
/* 1503 */  vec_rule,
/* 1504 */  vec_rule,
/* 1505 */  vec_rule,
/* 1506 */  vec_rule,
/* 1507 */  vec_rule,
/* 1508 */  vec_rule,
/* 1509 */  vec_rule,
/* 1510 */  vec_rule,
/* 1511 */  vec_rule,
/* 1512 */  vec_rule,
/* 1513 */  vec_rule,
/* 1514 */  vec_rule,
/* 1515 */  vec_rule,
/* 1516 */  vec_rule,
/* 1517 */  vec_rule,
/* 1518 */  vec_rule,
/* 1519 */  vec_rule,
/* 1520 */  vec_rule,
/* 1521 */  vec_rule,
/* 1522 */  vec_rule,
/* 1523 */  vec_rule,
/* 1524 */  vec_rule,
/* 1525 */  vec_rule,
/* 1526 */  vec_rule,
/* 1527 */  vec_rule,
/* 1528 */  vec_rule,
/* 1529 */  vec_rule,
/* 1530 */  vec_rule,
/* 1531 */  vec_rule,
/* 1532 */  vec_rule,
/* 1533 */  vec_rule,
/* 1534 */  vec_rule,
/* 1535 */  vec_rule,
/* 1536 */  vec_rule,
/* 1537 */  vec_rule,
/* 1538 */  vec_rule,
/* 1539 */  vec_rule,
/* 1540 */  vec_rule,
/* 1541 */  vec_rule,
/* 1542 */  vec_rule,
/* 1543 */  vec_rule,
/* 1544 */  vec_rule,
/* 1545 */  vec_rule,
/* 1546 */  vec_rule,
/* 1547 */  kReg_rule,
/* 1548 */  kReg_rule,
/* 1549 */  kReg_rule,
/* 1550 */  kReg_rule,
/* 1551 */  kReg_rule,
/* 1552 */  kReg_rule,
/* 1553 */  vec_rule,
/* 1554 */  vec_rule,
/* 1555 */  kReg_rule,
/* 1556 */  kReg_rule,
/* 1557 */  kReg_rule,
/* 1558 */  rRegI_rule,
/* 1559 */  rRegI_rule,
/* 1560 */  rRegI_rule,
/* 1561 */  rRegI_rule,
/* 1562 */  rax_RegN_rule,
/* 1563 */  rax_RegP_rule,
/* 1564 */  rRegP_rule,
/* 1565 */  rax_RegP_rule,
/* 1566 */  rRegI_rule,
/* 1567 */  rRegI_rule,
/* 1568 */  rRegP_rule,
// last instruction
0 // no trailing comma
6182};

6184const        int   leftOp[] = {
/*    0 */  0,
/*    1 */  0,
/*    2 */  0,
/*    3 */  0,
/*    4 */  0,
/*    5 */  0,
/*    6 */  0,
/*    7 */  0,
/*    8 */  0,
/*    9 */  0,
/*   10 */  0,
/*   11 */  0,
/*   12 */  0,
/*   13 */  0,
/*   14 */  0,
/*   15 */  0,
/*   16 */  0,
/*   17 */  0,
/*   18 */  0,
/*   19 */  0,
/*   20 */  0,
/*   21 */  0,
/*   22 */  0,
/*   23 */  0,
/*   24 */  0,
/*   25 */  0,
/*   26 */  0,
/*   27 */  0,
/*   28 */  0,
/*   29 */  0,
/*   30 */  0,
/*   31 */  0,
/*   32 */  0,
/*   33 */  0,
/*   34 */  0,
/*   35 */  0,
/*   36 */  0,
/*   37 */  0,
/*   38 */  0,
/*   39 */  0,
/*   40 */  0,
/*   41 */  0,
/*   42 */  0,
/*   43 */  0,
/*   44 */  0,
/*   45 */  0,
/*   46 */  0,
/*   47 */  0,
/*   48 */  0,
/*   49 */  0,
/*   50 */  0,
/*   51 */  0,
/*   52 */  0,
/*   53 */  0,
/*   54 */  0,
/*   55 */  0,
/*   56 */  0,
/*   57 */  0,
/*   58 */  0,
/*   59 */  0,
/*   60 */  0,
/*   61 */  0,
/*   62 */  0,
/*   63 */  0,
/*   64 */  0,
/*   65 */  0,
/*   66 */  0,
/*   67 */  0,
/*   68 */  0,
/*   69 */  0,
/*   70 */  0,
/*   71 */  0,
/*   72 */  0,
/*   73 */  0,
/*   74 */  0,
/*   75 */  0,
/*   76 */  0,
/*   77 */  0,
/*   78 */  0,
/*   79 */  0,
/*   80 */  0,
/*   81 */  0,
/*   82 */  0,
/*   83 */  0,
/*   84 */  0,
/*   85 */  0,
/*   86 */  0,
/*   87 */  0,
/*   88 */  0,
/*   89 */  0,
/*   90 */  0,
/*   91 */  0,
/*   92 */  0,
/*   93 */  0,
/*   94 */  0,
/*   95 */  0,
/*   96 */  any_RegP_rule,
/*   97 */  any_RegP_rule,
/*   98 */  _AddP_any_RegP_rRegL_rule,
/*   99 */  any_RegP_rule,
/*  100 */  any_RegP_rule,
/*  101 */  any_RegP_rule,
/*  102 */  _AddP_any_RegP__LShiftL_rRegL_immI2_rule,
/*  103 */  _AddP_any_RegP__ConvI2L_rRegI__rule,
/*  104 */  _AddP_any_RegP__LShiftL__ConvI2L_rRegI__immI2_rule,
/*  105 */  _DecodeN_rRegN__rule,
/*  106 */  rRegN_rule,
/*  107 */  _DecodeN_rRegN__rule,
/*  108 */  _DecodeN_rRegN__rule,
/*  109 */  _AddP__DecodeN_rRegN__rRegL_rule,
/*  110 */  _DecodeN_rRegN__rule,
/*  111 */  _DecodeN_rRegN__rule,
/*  112 */  _AddP__DecodeN_rRegN___LShiftL_rRegL_immI2_rule,
/*  113 */  _AddP__DecodeN_rRegN___ConvI2L_rRegI__rule,
/*  114 */  _AddP__DecodeN_rRegN___LShiftL__ConvI2L_rRegI__immI2_rule,
/*  115 */  0,
/*  116 */  0,
/*  117 */  0,
/*  118 */  0,
/*  119 */  0,
/*  120 */  0,
/*  121 */  0,
/*  122 */  0,
/*  123 */  0,
/*  124 */  0,
/*  125 */  0,
/*  126 */  0,
/*  127 */  0,
/*  128 */  0,
/*  129 */  0,
/*  130 */  0,
/*  131 */  0,
/*  132 */  0,
/*  133 */  0,
/*  134 */  0,
/*  135 */  0,
/*  136 */  0,
/*  137 */  0,
// last operand
/*  138 */  0,
// last operand class
/*  139 */  any_RegP_rule,
/*  140 */  rRegL_rule,
/*  141 */  rRegI_rule,
/*  142 */  _ConvI2L_rRegI__rule,
/*  143 */  any_RegP_rule,
/*  144 */  any_RegP_rule,
/*  145 */  any_RegP_rule,
/*  146 */  rRegN_rule,
/*  147 */  _DecodeN_rRegN__rule,
/*  148 */  _DecodeN_rRegN__rule,
/*  149 */  _DecodeN_rRegN__rule,
/*  150 */  _DecodeN_rRegN__rule,
/*  151 */  memory_rule,
/*  152 */  memory_rule,
/*  153 */  _LoadUB_memory__rule,
/*  154 */  memory_rule,
/*  155 */  _LoadS_memory__rule,
/*  156 */  memory_rule,
/*  157 */  _LoadUS_memory__rule,
/*  158 */  _LoadUS_memory__rule,
/*  159 */  _LoadUS_memory__rule,
/*  160 */  memory_rule,
/*  161 */  _LoadI_memory__rule,
/*  162 */  _LoadI_memory__rule,
/*  163 */  _LoadI_memory__rule,
/*  164 */  _LoadI_memory__rule,
/*  165 */  _LoadI_memory__rule,
/*  166 */  _LoadI_memory__rule,
/*  167 */  memory_rule,
/*  168 */  rRegP_rule,
/*  169 */  _DecodeN_rRegN__rule,
/*  170 */  _LShiftL_rRegL_immI2_rule,
/*  171 */  cmpOp_rule,
/*  172 */  rRegI_rule,
/*  173 */  cmpOpU_rule,
/*  174 */  cmpOpUCF_rule,
/*  175 */  rRegI_rule,
/*  176 */  rRegN_rule,
/*  177 */  rRegP_rule,
/*  178 */  rRegL_rule,
/*  179 */  rRegL_rule,
/*  180 */  regF_rule,
/*  181 */  regD_rule,
/*  182 */  _LoadI_memory__rule,
/*  183 */  rRegI_rule,
/*  184 */  _LoadI_memory__rule,
/*  185 */  _LoadI_memory__rule,
/*  186 */  _LoadI_memory__rule,
/*  187 */  _LoadL_memory__rule,
/*  188 */  rRegL_rule,
/*  189 */  _LoadL_memory__rule,
/*  190 */  _LoadL_memory__rule,
/*  191 */  _LoadL_memory__rule,
/*  192 */  rax_RegP_rule,
/*  193 */  rax_RegI_rule,
/*  194 */  rax_RegL_rule,
/*  195 */  rax_RegN_rule,
/*  196 */  _LoadI_memory__rule,
/*  197 */  _LoadI_memory__rule,
/*  198 */  _LoadL_memory__rule,
/*  199 */  _LoadL_memory__rule,
/*  200 */  immI_0_rule,
/*  201 */  immI_0_rule,
/*  202 */  immL0_rule,
/*  203 */  _LoadI_memory__rule,
/*  204 */  _LoadI_memory__rule,
/*  205 */  _LoadI_memory__rule,
/*  206 */  _LoadI_memory__rule,
/*  207 */  _LoadI_memory__rule,
/*  208 */  _LoadI_memory__rule,
/*  209 */  _LoadI_memory__rule,
/*  210 */  _LoadI_memory__rule,
/*  211 */  _LoadI_memory__rule,
/*  212 */  _LoadL_memory__rule,
/*  213 */  _LoadL_memory__rule,
/*  214 */  _LoadL_memory__rule,
/*  215 */  _LoadL_memory__rule,
/*  216 */  _LoadL_memory__rule,
/*  217 */  _LoadL_memory__rule,
/*  218 */  _LoadL_memory__rule,
/*  219 */  _LoadL_memory__rule,
/*  220 */  _LoadL_memory__rule,
/*  221 */  rRegI_rule,
/*  222 */  rRegI_rule,
/*  223 */  rRegI_rule,
/*  224 */  rRegI_rule,
/*  225 */  rRegI_rule,
/*  226 */  _LoadB_memory__rule,
/*  227 */  rRegI_rule,
/*  228 */  _LoadI_memory__rule,
/*  229 */  rRegI_rule,
/*  230 */  _LoadI_memory__rule,
/*  231 */  rRegI_rule,
/*  232 */  rRegI_rule,
/*  233 */  _LoadB_memory__rule,
/*  234 */  rRegI_rule,
/*  235 */  _LoadI_memory__rule,
/*  236 */  rRegI_rule,
/*  237 */  _LoadI_memory__rule,
/*  238 */  _LoadB_memory__rule,
/*  239 */  rRegI_rule,
/*  240 */  _LoadI_memory__rule,
/*  241 */  rRegI_rule,
/*  242 */  _LoadI_memory__rule,
/*  243 */  _LoadL_memory__rule,
/*  244 */  rRegL_rule,
/*  245 */  _LoadL_memory__rule,
/*  246 */  _LoadL_memory__rule,
/*  247 */  rRegL_rule,
/*  248 */  immL0_rule,
/*  249 */  rRegL_rule,
/*  250 */  any_RegP_rule,
/*  251 */  _LoadL_memory__rule,
/*  252 */  rRegL_rule,
/*  253 */  _LoadL_memory__rule,
/*  254 */  _LoadL_memory__rule,
/*  255 */  _LoadL_memory__rule,
/*  256 */  rRegL_rule,
/*  257 */  _LoadL_memory__rule,
/*  258 */  rRegI_rule,
/*  259 */  _CmpLTMask_rRegI_rRegI_rule,
/*  260 */  rRegI_rule,
/*  261 */  rRegI_rule,
/*  262 */  memory_rule,
/*  263 */  memory_rule,
/*  264 */  rdi_RegP_rule,
/*  265 */  rsi_RegP_rule,
/*  266 */  rdi_RegP_rule,
/*  267 */  rsi_RegP_rule,
/*  268 */  rsi_RegP_rule,
/*  269 */  rdi_RegP_rule,
/*  270 */  rRegI_rule,
/*  271 */  memory_rule,
/*  272 */  memory_rule,
/*  273 */  memory_rule,
/*  274 */  rRegL_rule,
/*  275 */  _CastP2X_rRegP__rule,
/*  276 */  _LoadL_memory__rule,
/*  277 */  _LoadUB_memory__rule,
/*  278 */  _LoadB_memory__rule,
/*  279 */  rsi_RegP_rule,
/*  280 */  memory_rule,
/*  281 */  vec_rule,
/*  282 */  vec_rule,
/*  283 */  vec_rule,
/*  284 */  vec_rule,
/*  285 */  vec_rule,
/*  286 */  vec_rule,
/*  287 */  vec_rule,
/*  288 */  cmpOp_vcmppd_rule,
/*  289 */  legVec_rule,
/*  290 */  regD_rule,
/*  291 */  immI8_rule,
/*  292 */  immI8_rule,
/*  293 */  legVec_rule,
/*  294 */  kReg_rule,
/*  295 */  vec_rule,
/*  296 */  vec_rule,
/*  297 */  vec_rule,
/*  298 */  _LoadVector_memory__rule,
/*  299 */  vec_rule,
/*  300 */  vec_rule,
/*  301 */  vec_rule,
/*  302 */  vec_rule,
/*  303 */  _LoadVector_memory__rule,
/*  304 */  immI8_rule,
/*  305 */  immI_M1_rule,
// last internally defined operand
/*  306 */  rRegI_rule,
/*  307 */  rRegL_rule,
/*  308 */  rRegP_rule,
/*  309 */  regF_rule,
/*  310 */  regD_rule,
/*  311 */  regF_rule,
/*  312 */  regF_rule,
/*  313 */  vlRegF_rule,
/*  314 */  legRegF_rule,
/*  315 */  regD_rule,
/*  316 */  regD_rule,
/*  317 */  vlRegD_rule,
/*  318 */  legRegD_rule,
/*  319 */  indOffset8_rule,
/*  320 */  indOffset32_rule,
/*  321 */  indIndexOffset_rule,
/*  322 */  indIndexScale_rule,
/*  323 */  indPosIndexScale_rule,
/*  324 */  indIndexScaleOffset_rule,
/*  325 */  indPosIndexOffset_rule,
/*  326 */  indPosIndexScaleOffset_rule,
/*  327 */  indCompressedOopOffset_rule,
/*  328 */  indOffset8Narrow_rule,
/*  329 */  indOffset32Narrow_rule,
/*  330 */  indIndexOffsetNarrow_rule,
/*  331 */  indIndexScaleNarrow_rule,
/*  332 */  indIndexScaleOffsetNarrow_rule,
/*  333 */  indPosIndexOffsetNarrow_rule,
/*  334 */  indPosIndexScaleOffsetNarrow_rule,
/*  335 */  immI_rule,
/*  336 */  immI_0_rule,
/*  337 */  immL_rule,
/*  338 */  immL0_rule,
/*  339 */  immUL32_rule,
/*  340 */  immL32_rule,
/*  341 */  immP_rule,
/*  342 */  immP0_rule,
/*  343 */  immP31_rule,
/*  344 */  immF_rule,
/*  345 */  immN0_rule,
/*  346 */  immN_rule,
/*  347 */  immNKlass_rule,
/*  348 */  immF0_rule,
/*  349 */  immD_rule,
/*  350 */  immD0_rule,
/*  351 */  stackSlotI_rule,
/*  352 */  stackSlotL_rule,
/*  353 */  stackSlotP_rule,
/*  354 */  stackSlotF_rule,
/*  355 */  stackSlotD_rule,
/*  356 */  vec_rule,
/*  357 */  legVec_rule,
/*  358 */  0,
/*  359 */  rRegL_rule,
/*  360 */  rRegP_rule,
/*  361 */  rRegP_rule,
/*  362 */  rRegP_rule,
/*  363 */  rRegI_rule,
/*  364 */  rRegL_rule,
/*  365 */  regF_rule,
/*  366 */  regD_rule,
/*  367 */  memory_rule,
/*  368 */  memory_rule,
/*  369 */  memory_rule,
/*  370 */  regF_rule,
/*  371 */  regF_rule,
/*  372 */  regF_rule,
/*  373 */  regF_rule,
/*  374 */  regF_rule,
/*  375 */  regF_rule,
/*  376 */  regD_rule,
/*  377 */  regD_rule,
/*  378 */  regD_rule,
/*  379 */  regD_rule,
/*  380 */  regD_rule,
/*  381 */  regD_rule,
/*  382 */  stackSlotF_rule,
/*  383 */  stackSlotI_rule,
/*  384 */  stackSlotD_rule,
/*  385 */  stackSlotL_rule,
/*  386 */  stackSlotL_rule,
/*  387 */  regF_rule,
/*  388 */  regD_rule,
/*  389 */  rRegI_rule,
/*  390 */  rRegL_rule,
/*  391 */  rax_RegI_rule,
/*  392 */  rax_RegI_rule,
/*  393 */  rax_RegL_rule,
/*  394 */  rax_RegL_rule,
/*  395 */  rRegI_rule,
/*  396 */  rRegI_rule,
/*  397 */  rRegL_rule,
/*  398 */  rRegL_rule,
/*  399 */  immI_0_rule,
/*  400 */  immL0_rule,
/*  401 */  rax_RegI_rule,
/*  402 */  rRegI_rule,
/*  403 */  rax_RegL_rule,
/*  404 */  rRegL_rule,
/*  405 */  rRegI_rule,
/*  406 */  rRegI_rule,
/*  407 */  rRegI_rule,
/*  408 */  rRegI_rule,
/*  409 */  _AndI_rRegI_immI_rule,
/*  410 */  _AndI_rRegI__LoadI_memory__rule,
/*  411 */  _AndI__LoadI_memory__rRegI_rule,
/*  412 */  rRegI_rule,
/*  413 */  rRegI_rule,
/*  414 */  rRegI_rule,
/*  415 */  rRegI_rule,
/*  416 */  rRegP_rule,
/*  417 */  rRegP_rule,
/*  418 */  rRegP_rule,
/*  419 */  rRegP_rule,
/*  420 */  _LoadP_memory__rule,
/*  421 */  _LoadP_memory__rule,
/*  422 */  rRegN_rule,
/*  423 */  rRegN_rule,
/*  424 */  rRegN_rule,
/*  425 */  immN_rule,
/*  426 */  rRegN_rule,
/*  427 */  immNKlass_rule,
/*  428 */  rRegN_rule,
/*  429 */  _LoadN_memory__rule,
/*  430 */  _LoadN_memory__rule,
/*  431 */  rRegL_rule,
/*  432 */  rRegL_rule,
/*  433 */  rRegL_rule,
/*  434 */  rRegL_rule,
/*  435 */  _AndL_rRegL_immL32_rule,
/*  436 */  _AndL_rRegL__LoadL_memory__rule,
/*  437 */  _AndL__LoadL_memory__rRegL_rule,
/*  438 */  _AndL__CastP2X_rRegP___LoadL_memory__rule,
/*  439 */  _AndL__LoadL_memory___CastP2X_rRegP__rule,
/*  440 */  rRegL_rule,
/*  441 */  rRegL_rule,
/*  442 */  rRegL_rule,
/*  443 */  rRegL_rule,
/*  444 */  _LoadB_memory__rule,
/*  445 */  _AndI__LoadUB_memory__immU7_rule,
/*  446 */  _AndI__LoadB_memory__immI8_rule,
/*  447 */  _PartialSubtypeCheck_rsi_RegP_rax_RegP_rule,
/*  448 */  rRegP_rule,
/*  449 */  rRegP_rule,
/*  450 */  rRegP_rule,
/*  451 */  0,
/*  452 */  regF_rule,
/*  453 */  vlRegF_rule,
/*  454 */  regD_rule,
/*  455 */  vlRegD_rule,
/*  456 */  regF_rule,
/*  457 */  vlRegF_rule,
/*  458 */  regD_rule,
/*  459 */  vlRegD_rule,
/*  460 */  kReg_rule,
/*  461 */  vec_rule,
/*  462 */  vec_rule,
/*  463 */  legVec_rule,
/*  464 */  vec_rule,
/*  465 */  _LoadVector_memory__rule,
/*  466 */  vec_rule,
/*  467 */  _LoadVector_memory__rule,
/*  468 */  rRegI_rule,
/*  469 */  rRegI_rule,
/*  470 */  vec_rule,
/*  471 */  vec_rule,
/*  472 */  vec_rule,
/*  473 */  vec_rule,
/*  474 */  vec_rule,
/*  475 */  vec_rule,
/*  476 */  vec_rule,
/*  477 */  vec_rule,
/*  478 */  vec_rule,
/*  479 */  vec_rule,
/*  480 */  _VectorTest_legVec_legVec_rule,
/*  481 */  _VectorTest_legVec_legVec_rule,
/*  482 */  _VectorTest_kReg_kReg_rule,
/*  483 */  kReg_rule,
/*  484 */  vec_rule,
/*  485 */  vec_rule,
/*  486 */  vec_rule,
/*  487 */  vec_rule,
/*  488 */  vec_rule,
/*  489 */  vec_rule,
/*  490 */  rRegL_rule,
/*  491 */  kReg_rule,
/*  492 */  vec_rule,
/*  493 */  legVec_rule,
/*  494 */  memory_rule,
/*  495 */  _LoadB_memory__rule,
/*  496 */  memory_rule,
/*  497 */  _LoadUB_memory__rule,
/*  498 */  _AndI__LoadUB_memory__immI_rule,
/*  499 */  memory_rule,
/*  500 */  _LShiftI__LoadS_memory__immI_24_rule,
/*  501 */  _LoadS_memory__rule,
/*  502 */  memory_rule,
/*  503 */  _LShiftI__LoadUS_memory__immI_24_rule,
/*  504 */  _LoadUS_memory__rule,
/*  505 */  _AndI__LoadUS_memory__immI_255_rule,
/*  506 */  _AndI__LoadUS_memory__immI_rule,
/*  507 */  memory_rule,
/*  508 */  _LShiftI__LoadI_memory__immI_24_rule,
/*  509 */  _LoadI_memory__rule,
/*  510 */  _LShiftI__LoadI_memory__immI_16_rule,
/*  511 */  _LoadI_memory__rule,
/*  512 */  _LoadI_memory__rule,
/*  513 */  _AndI__LoadI_memory__immI_255_rule,
/*  514 */  _AndI__LoadI_memory__immI_65535_rule,
/*  515 */  _AndI__LoadI_memory__immU31_rule,
/*  516 */  _ConvI2L__LoadI_memory___rule,
/*  517 */  memory_rule,
/*  518 */  memory_rule,
/*  519 */  memory_rule,
/*  520 */  memory_rule,
/*  521 */  memory_rule,
/*  522 */  memory_rule,
/*  523 */  memory_rule,
/*  524 */  memory_rule,
/*  525 */  memory_rule,
/*  526 */  legRegF_rule,
/*  527 */  legRegF_rule,
/*  528 */  legRegD_rule,
/*  529 */  legRegD_rule,
/*  530 */  legRegF_rule,
/*  531 */  legRegF_rule,
/*  532 */  legRegD_rule,
/*  533 */  legRegD_rule,
/*  534 */  memory_rule,
/*  535 */  memory_rule,
/*  536 */  memory_rule,
/*  537 */  memory_rule,
/*  538 */  memory_rule,
/*  539 */  memory_rule,
/*  540 */  memory_rule,
/*  541 */  memory_rule,
/*  542 */  memory_rule,
/*  543 */  memory_rule,
/*  544 */  memory_rule,
/*  545 */  memory_rule,
/*  546 */  memory_rule,
/*  547 */  memory_rule,
/*  548 */  memory_rule,
/*  549 */  memory_rule,
/*  550 */  memory_rule,
/*  551 */  memory_rule,
/*  552 */  memory_rule,
/*  553 */  memory_rule,
/*  554 */  memory_rule,
/*  555 */  memory_rule,
/*  556 */  memory_rule,
/*  557 */  memory_rule,
/*  558 */  memory_rule,
/*  559 */  memory_rule,
/*  560 */  memory_rule,
/*  561 */  memory_rule,
/*  562 */  memory_rule,
/*  563 */  memory_rule,
/*  564 */  memory_rule,
/*  565 */  memory_rule,
/*  566 */  indirect_rule,
/*  567 */  0,
/*  568 */  0,
/*  569 */  rRegI_rule,
/*  570 */  rRegL_rule,
/*  571 */  rRegI_rule,
/*  572 */  rRegI_rule,
/*  573 */  rRegI_rule,
/*  574 */  rRegI_rule,
/*  575 */  rRegL_rule,
/*  576 */  rRegL_rule,
/*  577 */  rRegI_rule,
/*  578 */  rRegI_rule,
/*  579 */  rRegL_rule,
/*  580 */  rRegL_rule,
/*  581 */  rRegI_rule,
/*  582 */  _LoadI_memory__rule,
/*  583 */  rRegL_rule,
/*  584 */  _LoadL_memory__rule,
/*  585 */  0,
/*  586 */  0,
/*  587 */  0,
/*  588 */  0,
/*  589 */  0,
/*  590 */  0,
/*  591 */  0,
/*  592 */  0,
/*  593 */  0,
/*  594 */  _CastP2X_rRegP__rule,
/*  595 */  _CastP2X__DecodeN_rRegN___rule,
/*  596 */  rRegP_rule,
/*  597 */  rRegP_rule,
/*  598 */  rRegN_rule,
/*  599 */  rRegN_rule,
/*  600 */  rRegP_rule,
/*  601 */  rRegN_rule,
/*  602 */  _LShiftL_rRegL_immI2_rule,
/*  603 */  _AddL__LShiftL_rRegL_immI2_immL32_rule,
/*  604 */  rRegL_rule,
/*  605 */  _Binary_cmpOp_rFlagsReg_rule,
/*  606 */  _Binary_cmpOpU_rFlagsRegU_rule,
/*  607 */  _Binary_cmpOpUCF_rFlagsRegUCF_rule,
/*  608 */  _Binary_cmpOp_rFlagsReg_rule,
/*  609 */  _Binary_cmpOpU_rFlagsRegU_rule,
/*  610 */  _Binary_cmpOpUCF_rFlagsRegUCF_rule,
/*  611 */  _Binary_cmpOp_rFlagsReg_rule,
/*  612 */  _Binary_cmpOpU_rFlagsRegU_rule,
/*  613 */  _Binary_cmpOpUCF_rFlagsRegUCF_rule,
/*  614 */  _Binary_cmpOp_rFlagsReg_rule,
/*  615 */  _Binary_cmpOpU_rFlagsRegU_rule,
/*  616 */  _Binary_cmpOpUCF_rFlagsRegUCF_rule,
/*  617 */  _Binary_cmpOp_rFlagsReg_rule,
/*  618 */  _Binary_cmpOp_rFlagsReg_rule,
/*  619 */  _Binary_cmpOpU_rFlagsRegU_rule,
/*  620 */  _Binary_cmpOpUCF_rFlagsRegUCF_rule,
/*  621 */  _Binary_cmpOpU_rFlagsRegU_rule,
/*  622 */  _Binary_cmpOpUCF_rFlagsRegUCF_rule,
/*  623 */  _Binary_cmpOp_rFlagsReg_rule,
/*  624 */  _Binary_cmpOpU_rFlagsRegU_rule,
/*  625 */  _Binary_cmpOpUCF_rFlagsRegUCF_rule,
/*  626 */  _Binary_cmpOp_rFlagsReg_rule,
/*  627 */  _Binary_cmpOpU_rFlagsRegU_rule,
/*  628 */  _Binary_cmpOpUCF_rFlagsRegUCF_rule,
/*  629 */  rRegI_rule,
/*  630 */  rRegI_rule,
/*  631 */  rRegI_rule,
/*  632 */  _LoadI_memory__rule,
/*  633 */  memory_rule,
/*  634 */  memory_rule,
/*  635 */  memory_rule,
/*  636 */  rRegI_rule,
/*  637 */  memory_rule,
/*  638 */  rRegI_rule,
/*  639 */  memory_rule,
/*  640 */  rRegI_rule,
/*  641 */  rRegL_rule,
/*  642 */  rRegL_rule,
/*  643 */  rRegL_rule,
/*  644 */  _LoadL_memory__rule,
/*  645 */  memory_rule,
/*  646 */  memory_rule,
/*  647 */  memory_rule,
/*  648 */  rRegI_rule,
/*  649 */  memory_rule,
/*  650 */  rRegL_rule,
/*  651 */  memory_rule,
/*  652 */  rRegL_rule,
/*  653 */  rRegP_rule,
/*  654 */  rRegP_rule,
/*  655 */  rRegP_rule,
/*  656 */  memory_rule,
/*  657 */  memory_rule,
/*  658 */  memory_rule,
/*  659 */  memory_rule,
/*  660 */  memory_rule,
/*  661 */  memory_rule,
/*  662 */  memory_rule,
/*  663 */  memory_rule,
/*  664 */  memory_rule,
/*  665 */  memory_rule,
/*  666 */  memory_rule,
/*  667 */  memory_rule,
/*  668 */  memory_rule,
/*  669 */  memory_rule,
/*  670 */  memory_rule,
/*  671 */  memory_rule,
/*  672 */  memory_rule,
/*  673 */  memory_rule,
/*  674 */  memory_rule,
/*  675 */  memory_rule,
/*  676 */  memory_rule,
/*  677 */  memory_rule,
/*  678 */  memory_rule,
/*  679 */  memory_rule,
/*  680 */  memory_rule,
/*  681 */  memory_rule,
/*  682 */  memory_rule,
/*  683 */  memory_rule,
/*  684 */  memory_rule,
/*  685 */  memory_rule,
/*  686 */  memory_rule,
/*  687 */  memory_rule,
/*  688 */  memory_rule,
/*  689 */  rRegI_rule,
/*  690 */  rRegL_rule,
/*  691 */  rRegI_rule,
/*  692 */  rRegI_rule,
/*  693 */  rRegI_rule,
/*  694 */  memory_rule,
/*  695 */  memory_rule,
/*  696 */  rRegL_rule,
/*  697 */  rRegI_rule,
/*  698 */  rRegL_rule,
/*  699 */  memory_rule,
/*  700 */  memory_rule,
/*  701 */  rRegP_rule,
/*  702 */  immI_0_rule,
/*  703 */  rRegI_rule,
/*  704 */  memory_rule,
/*  705 */  immL0_rule,
/*  706 */  rRegL_rule,
/*  707 */  memory_rule,
/*  708 */  rRegI_rule,
/*  709 */  rRegI_rule,
/*  710 */  rRegI_rule,
/*  711 */  _LoadI_memory__rule,
/*  712 */  _LoadI_memory__rule,
/*  713 */  _Binary_rRegI_rRegI_rule,
/*  714 */  rRegL_rule,
/*  715 */  rRegL_rule,
/*  716 */  rRegL_rule,
/*  717 */  _LoadL_memory__rule,
/*  718 */  _LoadL_memory__rule,
/*  719 */  no_rax_RegL_rule,
/*  720 */  no_rax_RegL_rule,
/*  721 */  rax_RegI_rule,
/*  722 */  rax_RegL_rule,
/*  723 */  rax_RegI_rule,
/*  724 */  rax_RegL_rule,
/*  725 */  0,
/*  726 */  0,
/*  727 */  0,
/*  728 */  0,
/*  729 */  no_rax_RegL_rule,
/*  730 */  rax_RegI_rule,
/*  731 */  rax_RegL_rule,
/*  732 */  rRegI_rule,
/*  733 */  memory_rule,
/*  734 */  rRegI_rule,
/*  735 */  memory_rule,
/*  736 */  rRegI_rule,
/*  737 */  memory_rule,
/*  738 */  rRegI_rule,
/*  739 */  memory_rule,
/*  740 */  rRegI_rule,
/*  741 */  memory_rule,
/*  742 */  rRegI_rule,
/*  743 */  memory_rule,
/*  744 */  rRegI_rule,
/*  745 */  memory_rule,
/*  746 */  rRegI_rule,
/*  747 */  memory_rule,
/*  748 */  rRegI_rule,
/*  749 */  memory_rule,
/*  750 */  rRegL_rule,
/*  751 */  memory_rule,
/*  752 */  rRegL_rule,
/*  753 */  memory_rule,
/*  754 */  rRegL_rule,
/*  755 */  memory_rule,
/*  756 */  rRegL_rule,
/*  757 */  memory_rule,
/*  758 */  rRegL_rule,
/*  759 */  memory_rule,
/*  760 */  rRegL_rule,
/*  761 */  memory_rule,
/*  762 */  rRegL_rule,
/*  763 */  memory_rule,
/*  764 */  rRegL_rule,
/*  765 */  memory_rule,
/*  766 */  rRegL_rule,
/*  767 */  memory_rule,
/*  768 */  _LShiftI_rRegI_immI_24_rule,
/*  769 */  _LShiftI_rRegI_immI_16_rule,
/*  770 */  rRegI_rule,
/*  771 */  rRegI_rule,
/*  772 */  rRegI_rule,
/*  773 */  rRegI_rule,
/*  774 */  rRegI_rule,
/*  775 */  rRegL_rule,
/*  776 */  rRegL_rule,
/*  777 */  rRegL_rule,
/*  778 */  rRegL_rule,
/*  779 */  rRegL_rule,
/*  780 */  rRegI_rule,
/*  781 */  rRegI_rule,
/*  782 */  _AndI_rRegI_immI_255_rule,
/*  783 */  rRegI_rule,
/*  784 */  _AndI_rRegI_immI_65535_rule,
/*  785 */  _AndI_rRegI_immI_Pow2M1_rule,
/*  786 */  rRegI_rule,
/*  787 */  rRegI_rule,
/*  788 */  _LoadI_memory__rule,
/*  789 */  memory_rule,
/*  790 */  memory_rule,
/*  791 */  memory_rule,
/*  792 */  memory_rule,
/*  793 */  memory_rule,
/*  794 */  _XorI_rRegI_immI_M1_rule,
/*  795 */  _LoadI_memory__rule,
/*  796 */  _XorI_rRegI_immI_M1_rule,
/*  797 */  rRegI_rule,
/*  798 */  _SubI_immI_0_rRegI_rule,
/*  799 */  rRegI_rule,
/*  800 */  _SubI_immI_0__LoadI_memory__rule,
/*  801 */  _LoadI_memory__rule,
/*  802 */  _AddI__LoadI_memory__immI_M1_rule,
/*  803 */  _LoadI_memory__rule,
/*  804 */  _AddI_rRegI_immI_M1_rule,
/*  805 */  rRegI_rule,
/*  806 */  _AddI_rRegI_immI_M1_rule,
/*  807 */  rRegI_rule,
/*  808 */  _AddI__LoadI_memory__immI_M1_rule,
/*  809 */  _LoadI_memory__rule,
/*  810 */  rRegI_rule,
/*  811 */  rRegI_rule,
/*  812 */  rRegI_rule,
/*  813 */  _LoadI_memory__rule,
/*  814 */  memory_rule,
/*  815 */  memory_rule,
/*  816 */  memory_rule,
/*  817 */  memory_rule,
/*  818 */  memory_rule,
/*  819 */  rRegI_rule,
/*  820 */  rRegI_rule,
/*  821 */  rRegI_rule,
/*  822 */  rRegI_rule,
/*  823 */  _LoadI_memory__rule,
/*  824 */  memory_rule,
/*  825 */  memory_rule,
/*  826 */  memory_rule,
/*  827 */  memory_rule,
/*  828 */  memory_rule,
/*  829 */  rRegL_rule,
/*  830 */  rRegL_rule,
/*  831 */  rRegL_rule,
/*  832 */  rRegL_rule,
/*  833 */  rRegL_rule,
/*  834 */  _LoadL_memory__rule,
/*  835 */  memory_rule,
/*  836 */  memory_rule,
/*  837 */  memory_rule,
/*  838 */  memory_rule,
/*  839 */  _XorL_rRegL_immL_M1_rule,
/*  840 */  _LoadL_memory__rule,
/*  841 */  _XorL_rRegL_immL_M1_rule,
/*  842 */  rRegL_rule,
/*  843 */  _SubL_immL0_rRegL_rule,
/*  844 */  rRegL_rule,
/*  845 */  _SubL_immL0__LoadL_memory__rule,
/*  846 */  _LoadL_memory__rule,
/*  847 */  _AddL__LoadL_memory__immL_M1_rule,
/*  848 */  _LoadL_memory__rule,
/*  849 */  _AddL_rRegL_immL_M1_rule,
/*  850 */  rRegL_rule,
/*  851 */  _AddL_rRegL_immL_M1_rule,
/*  852 */  rRegL_rule,
/*  853 */  _AddL__LoadL_memory__immL_M1_rule,
/*  854 */  _LoadL_memory__rule,
/*  855 */  rRegL_rule,
/*  856 */  rRegL_rule,
/*  857 */  _CastP2X_any_RegP__rule,
/*  858 */  rRegL_rule,
/*  859 */  rRegL_rule,
/*  860 */  _LoadL_memory__rule,
/*  861 */  memory_rule,
/*  862 */  memory_rule,
/*  863 */  memory_rule,
/*  864 */  memory_rule,
/*  865 */  rRegL_rule,
/*  866 */  rRegL_rule,
/*  867 */  rRegL_rule,
/*  868 */  rRegL_rule,
/*  869 */  _LoadL_memory__rule,
/*  870 */  memory_rule,
/*  871 */  memory_rule,
/*  872 */  memory_rule,
/*  873 */  rRegI_rule,
/*  874 */  rRegP_rule,
/*  875 */  rRegI_rule,
/*  876 */  rRegI_rule,
/*  877 */  _AndI__CmpLTMask_rRegI_rRegI_rRegI_rule,
/*  878 */  _SubI_rRegI_rRegI_rule,
/*  879 */  _AndI_rRegI__CmpLTMask_rRegI_rRegI_rule,
/*  880 */  _SubI_rRegI_rRegI_rule,
/*  881 */  _CmpLTMask_rRegI_rRegI_rule,
/*  882 */  rRegI_rule,
/*  883 */  regF_rule,
/*  884 */  regF_rule,
/*  885 */  regF_rule,
/*  886 */  regD_rule,
/*  887 */  regD_rule,
/*  888 */  regD_rule,
/*  889 */  regF_rule,
/*  890 */  _LoadF_memory__rule,
/*  891 */  regD_rule,
/*  892 */  _LoadD_memory__rule,
/*  893 */  regF_rule,
/*  894 */  regF_rule,
/*  895 */  regD_rule,
/*  896 */  regD_rule,
/*  897 */  rRegI_rule,
/*  898 */  _LoadI_memory__rule,
/*  899 */  rRegI_rule,
/*  900 */  _LoadI_memory__rule,
/*  901 */  rRegI_rule,
/*  902 */  rRegI_rule,
/*  903 */  rRegL_rule,
/*  904 */  _LoadL_memory__rule,
/*  905 */  rRegL_rule,
/*  906 */  _LoadL_memory__rule,
/*  907 */  rRegI_rule,
/*  908 */  _ConvI2L_rRegI__rule,
/*  909 */  _ConvI2L__LoadI_memory___rule,
/*  910 */  rRegL_rule,
/*  911 */  rRegL_rule,
/*  912 */  regF_rule,
/*  913 */  rRegI_rule,
/*  914 */  regD_rule,
/*  915 */  rRegL_rule,
/*  916 */  rcx_RegL_rule,
/*  917 */  rcx_RegL_rule,
/*  918 */  rcx_RegL_rule,
/*  919 */  rcx_RegL_rule,
/*  920 */  immL_rule,
/*  921 */  _Binary_rdi_RegP_rcx_RegI_rule,
/*  922 */  _Binary_rdi_RegP_rcx_RegI_rule,
/*  923 */  _Binary_rdi_RegP_rcx_RegI_rule,
/*  924 */  _Binary_rdi_RegP_rcx_RegI_rule,
/*  925 */  _Binary_rdi_RegP_rcx_RegI_rule,
/*  926 */  _Binary_rdi_RegP_rcx_RegI_rule,
/*  927 */  _Binary_rsi_RegP_rdx_RegI_rule,
/*  928 */  _Binary_rsi_RegP_rdx_RegI_rule,
/*  929 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  930 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  931 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  932 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  933 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  934 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  935 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  936 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  937 */  _Binary_rdi_RegP_rsi_RegP_rule,
/*  938 */  _Binary_rdi_RegP_rsi_RegP_rule,
/*  939 */  rdi_RegP_rule,
/*  940 */  rdi_RegP_rule,
/*  941 */  rdi_RegP_rule,
/*  942 */  rdi_RegP_rule,
/*  943 */  rsi_RegP_rule,
/*  944 */  rsi_RegP_rule,
/*  945 */  rsi_RegP_rule,
/*  946 */  rsi_RegP_rule,
/*  947 */  rsi_RegP_rule,
/*  948 */  rsi_RegP_rule,
/*  949 */  rsi_RegP_rule,
/*  950 */  rsi_RegP_rule,
/*  951 */  rRegL_rule,
/*  952 */  0,
/*  953 */  rRegI_rule,
/*  954 */  0,
/*  955 */  rRegI_rule,
/*  956 */  0,
/*  957 */  cmpOp_rule,
/*  958 */  cmpOp_rule,
/*  959 */  cmpOpU_rule,
/*  960 */  cmpOpUCF_rule,
/*  961 */  cmpOp_rule,
/*  962 */  cmpOpU_rule,
/*  963 */  cmpOpUCF_rule,
/*  964 */  cmpOpU_rule,
/*  965 */  cmpOpUCF_rule,
/*  966 */  cmpOpUCF2_rule,
/*  967 */  rsi_RegP_rule,
/*  968 */  0,
/*  969 */  cmpOp_rule,
/*  970 */  cmpOp_rule,
/*  971 */  cmpOpU_rule,
/*  972 */  cmpOpUCF_rule,
/*  973 */  cmpOpU_rule,
/*  974 */  cmpOpUCF_rule,
/*  975 */  cmpOpUCF2_rule,
/*  976 */  rRegP_rule,
/*  977 */  0,
/*  978 */  0,
/*  979 */  0,
/*  980 */  0,
/*  981 */  0,
/*  982 */  0,
/*  983 */  0,
/*  984 */  0,
/*  985 */  no_rbp_RegP_rule,
/*  986 */  no_rbp_RegP_rule,
/*  987 */  0,
/*  988 */  0,
/*  989 */  0,
/*  990 */  rRegI_rule,
/*  991 */  regF_rule,
/*  992 */  regF_rule,
/*  993 */  _LoadF_memory__rule,
/*  994 */  regF_rule,
/*  995 */  regF_rule,
/*  996 */  regF_rule,
/*  997 */  _LoadF_memory__rule,
/*  998 */  regF_rule,
/*  999 */  regD_rule,
/* 1000 */  regD_rule,
/* 1001 */  _LoadD_memory__rule,
/* 1002 */  regD_rule,
/* 1003 */  regD_rule,
/* 1004 */  regD_rule,
/* 1005 */  _LoadD_memory__rule,
/* 1006 */  regD_rule,
/* 1007 */  regF_rule,
/* 1008 */  regF_rule,
/* 1009 */  regF_rule,
/* 1010 */  regF_rule,
/* 1011 */  regF_rule,
/* 1012 */  regF_rule,
/* 1013 */  regD_rule,
/* 1014 */  regD_rule,
/* 1015 */  regD_rule,
/* 1016 */  regD_rule,
/* 1017 */  regD_rule,
/* 1018 */  regD_rule,
/* 1019 */  regF_rule,
/* 1020 */  regF_rule,
/* 1021 */  _LoadF_memory__rule,
/* 1022 */  regF_rule,
/* 1023 */  regF_rule,
/* 1024 */  regF_rule,
/* 1025 */  _LoadF_memory__rule,
/* 1026 */  regF_rule,
/* 1027 */  regD_rule,
/* 1028 */  regD_rule,
/* 1029 */  _LoadD_memory__rule,
/* 1030 */  regD_rule,
/* 1031 */  regD_rule,
/* 1032 */  regD_rule,
/* 1033 */  _LoadD_memory__rule,
/* 1034 */  regD_rule,
/* 1035 */  regF_rule,
/* 1036 */  regF_rule,
/* 1037 */  regF_rule,
/* 1038 */  regF_rule,
/* 1039 */  regF_rule,
/* 1040 */  regF_rule,
/* 1041 */  regD_rule,
/* 1042 */  regD_rule,
/* 1043 */  regD_rule,
/* 1044 */  regD_rule,
/* 1045 */  regD_rule,
/* 1046 */  regD_rule,
/* 1047 */  regF_rule,
/* 1048 */  regD_rule,
/* 1049 */  kReg_rule,
/* 1050 */  kReg_rule,
/* 1051 */  kReg_rule,
/* 1052 */  vec_rule,
/* 1053 */  vec_rule,
/* 1054 */  legRegD_rule,
/* 1055 */  _LoadD_memory__rule,
/* 1056 */  immD_rule,
/* 1057 */  legVec_rule,
/* 1058 */  vec_rule,
/* 1059 */  _LoadVector_memory__rule,
/* 1060 */  _LoadVector_memory__rule,
/* 1061 */  0,
/* 1062 */  regD_rule,
/* 1063 */  regF_rule,
/* 1064 */  memory_rule,
/* 1065 */  memory_rule,
/* 1066 */  memory_rule,
/* 1067 */  memory_rule,
/* 1068 */  memory_rule,
/* 1069 */  memory_rule,
/* 1070 */  memory_rule,
/* 1071 */  rRegI_rule,
/* 1072 */  _LoadB_memory__rule,
/* 1073 */  immI_rule,
/* 1074 */  immI_0_rule,
/* 1075 */  rRegI_rule,
/* 1076 */  _LoadS_memory__rule,
/* 1077 */  immI_rule,
/* 1078 */  immI_0_rule,
/* 1079 */  rRegI_rule,
/* 1080 */  _LoadI_memory__rule,
/* 1081 */  immI_rule,
/* 1082 */  immI_0_rule,
/* 1083 */  immI_M1_rule,
/* 1084 */  immI_M1_rule,
/* 1085 */  immI_M1_rule,
/* 1086 */  rRegL_rule,
/* 1087 */  _LoadL_memory__rule,
/* 1088 */  immL_rule,
/* 1089 */  immL0_rule,
/* 1090 */  immL_M1_rule,
/* 1091 */  vlRegF_rule,
/* 1092 */  _LoadF_memory__rule,
/* 1093 */  immF0_rule,
/* 1094 */  vlRegD_rule,
/* 1095 */  _LoadD_memory__rule,
/* 1096 */  immD0_rule,
/* 1097 */  _Binary_vec_rRegI_rule,
/* 1098 */  _Binary_vec_rRegI_rule,
/* 1099 */  _Binary_vec_rRegI_rule,
/* 1100 */  _Binary_vec_rRegL_rule,
/* 1101 */  _Binary_vec_rRegL_rule,
/* 1102 */  _Binary_vec_rRegL_rule,
/* 1103 */  _Binary_vec_regF_rule,
/* 1104 */  _Binary_vec_regF_rule,
/* 1105 */  _Binary_vec_regD_rule,
/* 1106 */  _Binary_vec_regD_rule,
/* 1107 */  _Binary_vec_regD_rule,
/* 1108 */  rRegI_rule,
/* 1109 */  rRegI_rule,
/* 1110 */  rRegI_rule,
/* 1111 */  rRegI_rule,
/* 1112 */  rRegI_rule,
/* 1113 */  rRegI_rule,
/* 1114 */  rRegI_rule,
/* 1115 */  rRegL_rule,
/* 1116 */  rRegL_rule,
/* 1117 */  rRegL_rule,
/* 1118 */  rRegL_rule,
/* 1119 */  rRegL_rule,
/* 1120 */  rRegL_rule,
/* 1121 */  rRegL_rule,
/* 1122 */  rRegL_rule,
/* 1123 */  rRegL_rule,
/* 1124 */  rRegL_rule,
/* 1125 */  rRegL_rule,
/* 1126 */  rRegL_rule,
/* 1127 */  rRegL_rule,
/* 1128 */  rRegL_rule,
/* 1129 */  regF_rule,
/* 1130 */  regF_rule,
/* 1131 */  regF_rule,
/* 1132 */  regF_rule,
/* 1133 */  regF_rule,
/* 1134 */  regF_rule,
/* 1135 */  regD_rule,
/* 1136 */  regD_rule,
/* 1137 */  regD_rule,
/* 1138 */  regD_rule,
/* 1139 */  regD_rule,
/* 1140 */  regD_rule,
/* 1141 */  rRegI_rule,
/* 1142 */  rRegI_rule,
/* 1143 */  rRegI_rule,
/* 1144 */  rRegI_rule,
/* 1145 */  rRegI_rule,
/* 1146 */  rRegI_rule,
/* 1147 */  rRegI_rule,
/* 1148 */  rRegI_rule,
/* 1149 */  rRegI_rule,
/* 1150 */  rRegI_rule,
/* 1151 */  rRegI_rule,
/* 1152 */  rRegI_rule,
/* 1153 */  rRegI_rule,
/* 1154 */  rRegI_rule,
/* 1155 */  rRegI_rule,
/* 1156 */  rRegI_rule,
/* 1157 */  rRegI_rule,
/* 1158 */  rRegI_rule,
/* 1159 */  rRegI_rule,
/* 1160 */  rRegI_rule,
/* 1161 */  rRegI_rule,
/* 1162 */  immF_rule,
/* 1163 */  immF_rule,
/* 1164 */  immF_rule,
/* 1165 */  immF_rule,
/* 1166 */  legRegF_rule,
/* 1167 */  legRegF_rule,
/* 1168 */  legRegF_rule,
/* 1169 */  legRegF_rule,
/* 1170 */  immD_rule,
/* 1171 */  immD_rule,
/* 1172 */  immD_rule,
/* 1173 */  immD_rule,
/* 1174 */  legRegD_rule,
/* 1175 */  legRegD_rule,
/* 1176 */  legRegD_rule,
/* 1177 */  legRegD_rule,
/* 1178 */  vec_rule,
/* 1179 */  vec_rule,
/* 1180 */  vec_rule,
/* 1181 */  _LoadVector_memory__rule,
/* 1182 */  vec_rule,
/* 1183 */  vec_rule,
/* 1184 */  vec_rule,
/* 1185 */  _LoadVector_memory__rule,
/* 1186 */  vec_rule,
/* 1187 */  vec_rule,
/* 1188 */  vec_rule,
/* 1189 */  _LoadVector_memory__rule,
/* 1190 */  vec_rule,
/* 1191 */  vec_rule,
/* 1192 */  vec_rule,
/* 1193 */  _LoadVector_memory__rule,
/* 1194 */  vec_rule,
/* 1195 */  vec_rule,
/* 1196 */  vec_rule,
/* 1197 */  _LoadVector_memory__rule,
/* 1198 */  vec_rule,
/* 1199 */  vec_rule,
/* 1200 */  vec_rule,
/* 1201 */  _LoadVector_memory__rule,
/* 1202 */  vec_rule,
/* 1203 */  vec_rule,
/* 1204 */  vec_rule,
/* 1205 */  vec_rule,
/* 1206 */  vec_rule,
/* 1207 */  vec_rule,
/* 1208 */  vec_rule,
/* 1209 */  vec_rule,
/* 1210 */  vec_rule,
/* 1211 */  vec_rule,
/* 1212 */  vec_rule,
/* 1213 */  vec_rule,
/* 1214 */  vec_rule,
/* 1215 */  vec_rule,
/* 1216 */  vec_rule,
/* 1217 */  vec_rule,
/* 1218 */  vec_rule,
/* 1219 */  vec_rule,
/* 1220 */  vec_rule,
/* 1221 */  vec_rule,
/* 1222 */  vec_rule,
/* 1223 */  vec_rule,
/* 1224 */  vec_rule,
/* 1225 */  vec_rule,
/* 1226 */  vec_rule,
/* 1227 */  vec_rule,
/* 1228 */  _LoadVector_memory__rule,
/* 1229 */  vec_rule,
/* 1230 */  vec_rule,
/* 1231 */  vec_rule,
/* 1232 */  _LoadVector_memory__rule,
/* 1233 */  vec_rule,
/* 1234 */  vec_rule,
/* 1235 */  _LoadVector_memory__rule,
/* 1236 */  vec_rule,
/* 1237 */  vec_rule,
/* 1238 */  vec_rule,
/* 1239 */  vec_rule,
/* 1240 */  vec_rule,
/* 1241 */  _LoadVector_memory__rule,
/* 1242 */  vec_rule,
/* 1243 */  vec_rule,
/* 1244 */  vec_rule,
/* 1245 */  _LoadVector_memory__rule,
/* 1246 */  _Binary_cmpOp_vcmppd_immI8_rule,
/* 1247 */  _Binary_cmpOp_vcmppd_immI8_rule,
/* 1248 */  vec_rule,
/* 1249 */  vec_rule,
/* 1250 */  vec_rule,
/* 1251 */  vec_rule,
/* 1252 */  vec_rule,
/* 1253 */  vec_rule,
/* 1254 */  vec_rule,
/* 1255 */  vec_rule,
/* 1256 */  vec_rule,
/* 1257 */  vec_rule,
/* 1258 */  vec_rule,
/* 1259 */  vec_rule,
/* 1260 */  legVec_rule,
/* 1261 */  legVec_rule,
/* 1262 */  vec_rule,
/* 1263 */  vec_rule,
/* 1264 */  legVec_rule,
/* 1265 */  legVec_rule,
/* 1266 */  vec_rule,
/* 1267 */  vec_rule,
/* 1268 */  regF_rule,
/* 1269 */  regD_rule,
/* 1270 */  regF_rule,
/* 1271 */  regD_rule,
/* 1272 */  vec_rule,
/* 1273 */  vec_rule,
/* 1274 */  vec_rule,
/* 1275 */  vec_rule,
/* 1276 */  vec_rule,
/* 1277 */  vec_rule,
/* 1278 */  vec_rule,
/* 1279 */  vec_rule,
/* 1280 */  vec_rule,
/* 1281 */  vec_rule,
/* 1282 */  vec_rule,
/* 1283 */  vec_rule,
/* 1284 */  vec_rule,
/* 1285 */  vec_rule,
/* 1286 */  vec_rule,
/* 1287 */  vec_rule,
/* 1288 */  vec_rule,
/* 1289 */  vec_rule,
/* 1290 */  vec_rule,
/* 1291 */  vec_rule,
/* 1292 */  vec_rule,
/* 1293 */  vec_rule,
/* 1294 */  vec_rule,
/* 1295 */  vec_rule,
/* 1296 */  vec_rule,
/* 1297 */  vec_rule,
/* 1298 */  vec_rule,
/* 1299 */  vec_rule,
/* 1300 */  vec_rule,
/* 1301 */  vec_rule,
/* 1302 */  vec_rule,
/* 1303 */  vec_rule,
/* 1304 */  vec_rule,
/* 1305 */  vec_rule,
/* 1306 */  vec_rule,
/* 1307 */  vec_rule,
/* 1308 */  vec_rule,
/* 1309 */  vec_rule,
/* 1310 */  vec_rule,
/* 1311 */  vec_rule,
/* 1312 */  vec_rule,
/* 1313 */  vec_rule,
/* 1314 */  vec_rule,
/* 1315 */  vec_rule,
/* 1316 */  vec_rule,
/* 1317 */  vec_rule,
/* 1318 */  vec_rule,
/* 1319 */  vec_rule,
/* 1320 */  vec_rule,
/* 1321 */  vec_rule,
/* 1322 */  vec_rule,
/* 1323 */  vec_rule,
/* 1324 */  vec_rule,
/* 1325 */  vec_rule,
/* 1326 */  vec_rule,
/* 1327 */  vec_rule,
/* 1328 */  vec_rule,
/* 1329 */  vec_rule,
/* 1330 */  vec_rule,
/* 1331 */  vec_rule,
/* 1332 */  vec_rule,
/* 1333 */  vec_rule,
/* 1334 */  vec_rule,
/* 1335 */  vec_rule,
/* 1336 */  _LoadVector_memory__rule,
/* 1337 */  vec_rule,
/* 1338 */  vec_rule,
/* 1339 */  vec_rule,
/* 1340 */  _LoadVector_memory__rule,
/* 1341 */  vec_rule,
/* 1342 */  vec_rule,
/* 1343 */  vec_rule,
/* 1344 */  _LoadVector_memory__rule,
/* 1345 */  vec_rule,
/* 1346 */  vec_rule,
/* 1347 */  vec_rule,
/* 1348 */  vec_rule,
/* 1349 */  vec_rule,
/* 1350 */  vec_rule,
/* 1351 */  vec_rule,
/* 1352 */  vec_rule,
/* 1353 */  _Binary_legVec_legVec_rule,
/* 1354 */  _Binary_vec_vec_rule,
/* 1355 */  _Binary_vec_vec_rule,
/* 1356 */  _Binary_legVec_legVec_rule,
/* 1357 */  _Binary_legVec_legVec_rule,
/* 1358 */  _Binary_legVec_legVec_rule,
/* 1359 */  _Binary_vec_vec_rule,
/* 1360 */  _Binary_vec_vec_rule,
/* 1361 */  legVec_rule,
/* 1362 */  legVec_rule,
/* 1363 */  legVec_rule,
/* 1364 */  legVec_rule,
/* 1365 */  legVec_rule,
/* 1366 */  legVec_rule,
/* 1367 */  legVec_rule,
/* 1368 */  legVec_rule,
/* 1369 */  legVec_rule,
/* 1370 */  legVec_rule,
/* 1371 */  legVec_rule,
/* 1372 */  legVec_rule,
/* 1373 */  _Binary_vec_vec_rule,
/* 1374 */  _Binary_legVec_legVec_rule,
/* 1375 */  _Binary_legVec_legVec_rule,
/* 1376 */  _Binary_vec_vec_rule,
/* 1377 */  _Binary_vec_vec_rule,
/* 1378 */  vec_rule,
/* 1379 */  vec_rule,
/* 1380 */  vec_rule,
/* 1381 */  vec_rule,
/* 1382 */  vec_rule,
/* 1383 */  vec_rule,
/* 1384 */  legVec_rule,
/* 1385 */  legVec_rule,
/* 1386 */  kReg_rule,
/* 1387 */  kReg_rule,
/* 1388 */  legVec_rule,
/* 1389 */  legVec_rule,
/* 1390 */  kReg_rule,
/* 1391 */  legVec_rule,
/* 1392 */  vec_rule,
/* 1393 */  vec_rule,
/* 1394 */  vec_rule,
/* 1395 */  vec_rule,
/* 1396 */  vec_rule,
/* 1397 */  vec_rule,
/* 1398 */  vec_rule,
/* 1399 */  vec_rule,
/* 1400 */  vec_rule,
/* 1401 */  kReg_rule,
/* 1402 */  kReg_rule,
/* 1403 */  immI_0_rule,
/* 1404 */  vec_rule,
/* 1405 */  legVec_rule,
/* 1406 */  vec_rule,
/* 1407 */  vec_rule,
/* 1408 */  vec_rule,
/* 1409 */  legVec_rule,
/* 1410 */  vec_rule,
/* 1411 */  vec_rule,
/* 1412 */  vec_rule,
/* 1413 */  vec_rule,
/* 1414 */  vec_rule,
/* 1415 */  vec_rule,
/* 1416 */  vec_rule,
/* 1417 */  vec_rule,
/* 1418 */  vec_rule,
/* 1419 */  vec_rule,
/* 1420 */  vec_rule,
/* 1421 */  vec_rule,
/* 1422 */  vec_rule,
/* 1423 */  _MulAddVS2VI_vec_vec_rule,
/* 1424 */  vec_rule,
/* 1425 */  _Binary_vec_vec_rule,
/* 1426 */  _Binary_vec_vec_rule,
/* 1427 */  vec_rule,
/* 1428 */  vec_rule,
/* 1429 */  vec_rule,
/* 1430 */  vec_rule,
/* 1431 */  vec_rule,
/* 1432 */  memory_rule,
/* 1433 */  rRegL_rule,
/* 1434 */  immL_rule,
/* 1435 */  memory_rule,
/* 1436 */  kReg_rule,
/* 1437 */  vec_rule,
/* 1438 */  _VectorStoreMask_vec_immI_rule,
/* 1439 */  kReg_rule,
/* 1440 */  vec_rule,
/* 1441 */  _VectorStoreMask_vec_immI_rule,
/* 1442 */  kReg_rule,
/* 1443 */  kReg_rule,
/* 1444 */  vec_rule,
/* 1445 */  vec_rule,
/* 1446 */  _VectorStoreMask_vec_immI_rule,
/* 1447 */  _VectorStoreMask_vec_immI_rule,
/* 1448 */  _Binary_vec_vec_rule,
/* 1449 */  _Binary_vec_vec_rule,
/* 1450 */  _Binary_vec_vec_rule,
/* 1451 */  _Binary_vec_vec_rule,
/* 1452 */  _Binary_vec_vec_rule,
/* 1453 */  _Binary_vec_vec_rule,
/* 1454 */  _Binary_vec__LoadVector_memory__rule,
/* 1455 */  _Binary_vec__LoadVector_memory__rule,
/* 1456 */  _Binary_vec__LoadVector_memory__rule,
/* 1457 */  _Binary_vec__LoadVector_memory__rule,
/* 1458 */  _Binary_vec__LoadVector_memory__rule,
/* 1459 */  _Binary_vec__LoadVector_memory__rule,
/* 1460 */  _Binary_vec_vec_rule,
/* 1461 */  _Binary_vec__LoadVector_memory__rule,
/* 1462 */  _Binary_vec_vec_rule,
/* 1463 */  _Binary_vec__LoadVector_memory__rule,
/* 1464 */  _Binary_vec_vec_rule,
/* 1465 */  _Binary_vec__LoadVector_memory__rule,
/* 1466 */  _Binary_vec_vec_rule,
/* 1467 */  _Binary_vec_vec_rule,
/* 1468 */  _Binary_vec_vec_rule,
/* 1469 */  _Binary_vec_vec_rule,
/* 1470 */  _Binary_vec_vec_rule,
/* 1471 */  _Binary_vec_vec_rule,
/* 1472 */  _Binary_vec__LoadVector_memory__rule,
/* 1473 */  _Binary_vec__LoadVector_memory__rule,
/* 1474 */  _Binary_vec__LoadVector_memory__rule,
/* 1475 */  _Binary_vec__LoadVector_memory__rule,
/* 1476 */  _Binary_vec__LoadVector_memory__rule,
/* 1477 */  _Binary_vec__LoadVector_memory__rule,
/* 1478 */  _Binary_vec_vec_rule,
/* 1479 */  _Binary_vec_vec_rule,
/* 1480 */  _Binary_vec_vec_rule,
/* 1481 */  _Binary_vec_vec_rule,
/* 1482 */  _Binary_vec_vec_rule,
/* 1483 */  _Binary_vec__LoadVector_memory__rule,
/* 1484 */  _Binary_vec__LoadVector_memory__rule,
/* 1485 */  _Binary_vec__LoadVector_memory__rule,
/* 1486 */  _Binary_vec__LoadVector_memory__rule,
/* 1487 */  _Binary_vec__LoadVector_memory__rule,
/* 1488 */  vec_rule,
/* 1489 */  vec_rule,
/* 1490 */  _Binary_vec_vec_rule,
/* 1491 */  _Binary_vec_vec_rule,
/* 1492 */  _Binary_vec__LoadVector_memory__rule,
/* 1493 */  _Binary_vec__LoadVector_memory__rule,
/* 1494 */  _Binary_vec_immI8_rule,
/* 1495 */  _Binary_vec_immI8_rule,
/* 1496 */  _Binary_vec_vec_rule,
/* 1497 */  _Binary_vec_vec_rule,
/* 1498 */  _Binary_vec__LShiftCntV_immI8__rule,
/* 1499 */  _Binary_vec__LShiftCntV_immI8__rule,
/* 1500 */  _Binary_vec__LShiftCntV_immI8__rule,
/* 1501 */  _Binary_vec_vec_rule,
/* 1502 */  _Binary_vec_vec_rule,
/* 1503 */  _Binary_vec_vec_rule,
/* 1504 */  _Binary_vec_vec_rule,
/* 1505 */  _Binary_vec_vec_rule,
/* 1506 */  _Binary_vec_vec_rule,
/* 1507 */  _Binary_vec__LoadVector_memory__rule,
/* 1508 */  _Binary_vec__LoadVector_memory__rule,
/* 1509 */  _Binary_vec__LoadVector_memory__rule,
/* 1510 */  _Binary_vec__RShiftCntV_immI8__rule,
/* 1511 */  _Binary_vec__RShiftCntV_immI8__rule,
/* 1512 */  _Binary_vec__RShiftCntV_immI8__rule,
/* 1513 */  _Binary_vec_vec_rule,
/* 1514 */  _Binary_vec_vec_rule,
/* 1515 */  _Binary_vec_vec_rule,
/* 1516 */  _Binary_vec_vec_rule,
/* 1517 */  _Binary_vec_vec_rule,
/* 1518 */  _Binary_vec_vec_rule,
/* 1519 */  _Binary_vec__LoadVector_memory__rule,
/* 1520 */  _Binary_vec__LoadVector_memory__rule,
/* 1521 */  _Binary_vec__LoadVector_memory__rule,
/* 1522 */  _Binary_vec__RShiftCntV_immI8__rule,
/* 1523 */  _Binary_vec__RShiftCntV_immI8__rule,
/* 1524 */  _Binary_vec__RShiftCntV_immI8__rule,
/* 1525 */  _Binary_vec_vec_rule,
/* 1526 */  _Binary_vec_vec_rule,
/* 1527 */  _Binary_vec_vec_rule,
/* 1528 */  _Binary_vec_vec_rule,
/* 1529 */  _Binary_vec_vec_rule,
/* 1530 */  _Binary_vec_vec_rule,
/* 1531 */  _Binary_vec__LoadVector_memory__rule,
/* 1532 */  _Binary_vec__LoadVector_memory__rule,
/* 1533 */  _Binary_vec__LoadVector_memory__rule,
/* 1534 */  _Binary_vec_vec_rule,
/* 1535 */  _Binary_vec__LoadVector_memory__rule,
/* 1536 */  _Binary_vec_vec_rule,
/* 1537 */  _Binary_vec__LoadVector_memory__rule,
/* 1538 */  _Binary_vec_vec_rule,
/* 1539 */  vec_rule,
/* 1540 */  vec_rule,
/* 1541 */  vec_rule,
/* 1542 */  vec_rule,
/* 1543 */  _Binary_vec_vec_rule,
/* 1544 */  _Binary_vec_vec_rule,
/* 1545 */  _Binary_vec_vec_rule,
/* 1546 */  _Binary_vec_vec_rule,
/* 1547 */  _Binary_vec_vec_rule,
/* 1548 */  immI_rule,
/* 1549 */  rRegI_rule,
/* 1550 */  rRegL_rule,
/* 1551 */  kReg_rule,
/* 1552 */  kReg_rule,
/* 1553 */  rRegL_rule,
/* 1554 */  rRegL_rule,
/* 1555 */  kReg_rule,
/* 1556 */  kReg_rule,
/* 1557 */  kReg_rule,
/* 1558 */  memory_rule,
/* 1559 */  memory_rule,
/* 1560 */  memory_rule,
/* 1561 */  memory_rule,
/* 1562 */  memory_rule,
/* 1563 */  memory_rule,
/* 1564 */  memory_rule,
/* 1565 */  memory_rule,
/* 1566 */  memory_rule,
/* 1567 */  memory_rule,
/* 1568 */  memory_rule,
// last instruction
0 // no trailing comma
7759};

7761const        int   rightOp[] = {
/*    0 */  0,
/*    1 */  0,
/*    2 */  0,
/*    3 */  0,
/*    4 */  0,
/*    5 */  0,
/*    6 */  0,
/*    7 */  0,
/*    8 */  0,
/*    9 */  0,
/*   10 */  0,
/*   11 */  0,
/*   12 */  0,
/*   13 */  0,
/*   14 */  0,
/*   15 */  0,
/*   16 */  0,
/*   17 */  0,
/*   18 */  0,
/*   19 */  0,
/*   20 */  0,
/*   21 */  0,
/*   22 */  0,
/*   23 */  0,
/*   24 */  0,
/*   25 */  0,
/*   26 */  0,
/*   27 */  0,
/*   28 */  0,
/*   29 */  0,
/*   30 */  0,
/*   31 */  0,
/*   32 */  0,
/*   33 */  0,
/*   34 */  0,
/*   35 */  0,
/*   36 */  0,
/*   37 */  0,
/*   38 */  0,
/*   39 */  0,
/*   40 */  0,
/*   41 */  0,
/*   42 */  0,
/*   43 */  0,
/*   44 */  0,
/*   45 */  0,
/*   46 */  0,
/*   47 */  0,
/*   48 */  0,
/*   49 */  0,
/*   50 */  0,
/*   51 */  0,
/*   52 */  0,
/*   53 */  0,
/*   54 */  0,
/*   55 */  0,
/*   56 */  0,
/*   57 */  0,
/*   58 */  0,
/*   59 */  0,
/*   60 */  0,
/*   61 */  0,
/*   62 */  0,
/*   63 */  0,
/*   64 */  0,
/*   65 */  0,
/*   66 */  0,
/*   67 */  0,
/*   68 */  0,
/*   69 */  0,
/*   70 */  0,
/*   71 */  0,
/*   72 */  0,
/*   73 */  0,
/*   74 */  0,
/*   75 */  0,
/*   76 */  0,
/*   77 */  0,
/*   78 */  0,
/*   79 */  0,
/*   80 */  0,
/*   81 */  0,
/*   82 */  0,
/*   83 */  0,
/*   84 */  0,
/*   85 */  0,
/*   86 */  0,
/*   87 */  0,
/*   88 */  0,
/*   89 */  0,
/*   90 */  0,
/*   91 */  0,
/*   92 */  0,
/*   93 */  0,
/*   94 */  0,
/*   95 */  0,
/*   96 */  immL8_rule,
/*   97 */  immL32_rule,
/*   98 */  immL32_rule,
/*   99 */  rRegL_rule,
/*  100 */  _LShiftL_rRegL_immI2_rule,
/*  101 */  _LShiftL__ConvI2L_rRegI__immI2_rule,
/*  102 */  immL32_rule,
/*  103 */  immL32_rule,
/*  104 */  immL32_rule,
/*  105 */  immL32_rule,
/*  106 */  0,
/*  107 */  immL8_rule,
/*  108 */  immL32_rule,
/*  109 */  immL32_rule,
/*  110 */  rRegL_rule,
/*  111 */  _LShiftL_rRegL_immI2_rule,
/*  112 */  immL32_rule,
/*  113 */  immL32_rule,
/*  114 */  immL32_rule,
/*  115 */  0,
/*  116 */  0,
/*  117 */  0,
/*  118 */  0,
/*  119 */  0,
/*  120 */  0,
/*  121 */  0,
/*  122 */  0,
/*  123 */  0,
/*  124 */  0,
/*  125 */  0,
/*  126 */  0,
/*  127 */  0,
/*  128 */  0,
/*  129 */  0,
/*  130 */  0,
/*  131 */  0,
/*  132 */  0,
/*  133 */  0,
/*  134 */  0,
/*  135 */  0,
/*  136 */  0,
/*  137 */  0,
// last operand
/*  138 */  0,
// last operand class
/*  139 */  rRegL_rule,
/*  140 */  immI2_rule,
/*  141 */  0,
/*  142 */  immI2_rule,
/*  143 */  _LShiftL_rRegL_immI2_rule,
/*  144 */  _ConvI2L_rRegI__rule,
/*  145 */  _LShiftL__ConvI2L_rRegI__immI2_rule,
/*  146 */  0,
/*  147 */  rRegL_rule,
/*  148 */  _LShiftL_rRegL_immI2_rule,
/*  149 */  _ConvI2L_rRegI__rule,
/*  150 */  _LShiftL__ConvI2L_rRegI__immI2_rule,
/*  151 */  0,
/*  152 */  0,
/*  153 */  immI_rule,
/*  154 */  0,
/*  155 */  immI_24_rule,
/*  156 */  0,
/*  157 */  immI_24_rule,
/*  158 */  immI_255_rule,
/*  159 */  immI_rule,
/*  160 */  0,
/*  161 */  immI_24_rule,
/*  162 */  immI_16_rule,
/*  163 */  immI_255_rule,
/*  164 */  immI_65535_rule,
/*  165 */  immU31_rule,
/*  166 */  0,
/*  167 */  0,
/*  168 */  0,
/*  169 */  0,
/*  170 */  immL32_rule,
/*  171 */  rFlagsReg_rule,
/*  172 */  rRegI_rule,
/*  173 */  rFlagsRegU_rule,
/*  174 */  rFlagsRegUCF_rule,
/*  175 */  _LoadI_memory__rule,
/*  176 */  rRegN_rule,
/*  177 */  rRegP_rule,
/*  178 */  rRegL_rule,
/*  179 */  _LoadL_memory__rule,
/*  180 */  regF_rule,
/*  181 */  regD_rule,
/*  182 */  rRegI_rule,
/*  183 */  _LoadI_memory__rule,
/*  184 */  immI_rule,
/*  185 */  immI_1_rule,
/*  186 */  immI_M1_rule,
/*  187 */  rRegL_rule,
/*  188 */  _LoadL_memory__rule,
/*  189 */  immL32_rule,
/*  190 */  immL1_rule,
/*  191 */  immL_M1_rule,
/*  192 */  rRegP_rule,
/*  193 */  rRegI_rule,
/*  194 */  rRegL_rule,
/*  195 */  rRegN_rule,
/*  196 */  rRegI_rule,
/*  197 */  immI_rule,
/*  198 */  rRegL_rule,
/*  199 */  immL32_rule,
/*  200 */  rRegI_rule,
/*  201 */  _LoadI_memory__rule,
/*  202 */  _LoadL_memory__rule,
/*  203 */  immI_1_rule,
/*  204 */  immI8_rule,
/*  205 */  rcx_RegI_rule,
/*  206 */  immI_1_rule,
/*  207 */  immI8_rule,
/*  208 */  rcx_RegI_rule,
/*  209 */  immI_1_rule,
/*  210 */  immI8_rule,
/*  211 */  rcx_RegI_rule,
/*  212 */  immI_1_rule,
/*  213 */  immI8_rule,
/*  214 */  rcx_RegI_rule,
/*  215 */  immI_1_rule,
/*  216 */  immI8_rule,
/*  217 */  rcx_RegI_rule,
/*  218 */  immI_1_rule,
/*  219 */  immI8_rule,
/*  220 */  rcx_RegI_rule,
/*  221 */  immI_24_rule,
/*  222 */  immI_16_rule,
/*  223 */  immI_255_rule,
/*  224 */  immI_65535_rule,
/*  225 */  immI_Pow2M1_rule,
/*  226 */  rRegI_rule,
/*  227 */  _LoadB_memory__rule,
/*  228 */  rRegI_rule,
/*  229 */  _LoadI_memory__rule,
/*  230 */  immI_rule,
/*  231 */  immI_M1_rule,
/*  232 */  immI_M1_rule,
/*  233 */  rRegI_rule,
/*  234 */  _LoadB_memory__rule,
/*  235 */  rRegI_rule,
/*  236 */  _LoadI_memory__rule,
/*  237 */  immI_rule,
/*  238 */  rRegI_rule,
/*  239 */  _LoadB_memory__rule,
/*  240 */  rRegI_rule,
/*  241 */  _LoadI_memory__rule,
/*  242 */  immI_rule,
/*  243 */  rRegL_rule,
/*  244 */  _LoadL_memory__rule,
/*  245 */  immL32_rule,
/*  246 */  immL_NotPow2_rule,
/*  247 */  immL_M1_rule,
/*  248 */  rRegL_rule,
/*  249 */  immL_M1_rule,
/*  250 */  0,
/*  251 */  rRegL_rule,
/*  252 */  _LoadL_memory__rule,
/*  253 */  immL32_rule,
/*  254 */  immL_Pow2_rule,
/*  255 */  rRegL_rule,
/*  256 */  _LoadL_memory__rule,
/*  257 */  immL32_rule,
/*  258 */  rRegI_rule,
/*  259 */  rRegI_rule,
/*  260 */  rRegI_rule,
/*  261 */  _CmpLTMask_rRegI_rRegI_rule,
/*  262 */  0,
/*  263 */  0,
/*  264 */  rcx_RegI_rule,
/*  265 */  rdx_RegI_rule,
/*  266 */  rdx_RegI_rule,
/*  267 */  immI_rule,
/*  268 */  rax_RegI_rule,
/*  269 */  rsi_RegP_rule,
/*  270 */  immI_rule,
/*  271 */  0,
/*  272 */  0,
/*  273 */  0,
/*  274 */  immL32_rule,
/*  275 */  _LoadL_memory__rule,
/*  276 */  _CastP2X_rRegP__rule,
/*  277 */  immU7_rule,
/*  278 */  immI8_rule,
/*  279 */  rax_RegP_rule,
/*  280 */  0,
/*  281 */  kReg_rule,
/*  282 */  vec_rule,
/*  283 */  _Binary_vec_kReg_rule,
/*  284 */  rRegI_rule,
/*  285 */  rRegL_rule,
/*  286 */  regF_rule,
/*  287 */  regD_rule,
/*  288 */  immI8_rule,
/*  289 */  legVec_rule,
/*  290 */  immD_rule,
/*  291 */  0,
/*  292 */  0,
/*  293 */  legVec_rule,
/*  294 */  kReg_rule,
/*  295 */  _LoadVector_memory__rule,
/*  296 */  vec_rule,
/*  297 */  immU8_rule,
/*  298 */  immU8_rule,
/*  299 */  immI_rule,
/*  300 */  immI8_rule,
/*  301 */  _LShiftCntV_immI8__rule,
/*  302 */  _RShiftCntV_immI8__rule,
/*  303 */  kReg_rule,
/*  304 */  kReg_rule,
/*  305 */  0,
// last internally defined operand
/*  306 */  0,
/*  307 */  0,
/*  308 */  0,
/*  309 */  0,
/*  310 */  0,
/*  311 */  0,
/*  312 */  0,
/*  313 */  0,
/*  314 */  0,
/*  315 */  0,
/*  316 */  0,
/*  317 */  0,
/*  318 */  0,
/*  319 */  0,
/*  320 */  0,
/*  321 */  0,
/*  322 */  0,
/*  323 */  0,
/*  324 */  0,
/*  325 */  0,
/*  326 */  0,
/*  327 */  0,
/*  328 */  0,
/*  329 */  0,
/*  330 */  0,
/*  331 */  0,
/*  332 */  0,
/*  333 */  0,
/*  334 */  0,
/*  335 */  0,
/*  336 */  0,
/*  337 */  0,
/*  338 */  0,
/*  339 */  0,
/*  340 */  0,
/*  341 */  0,
/*  342 */  0,
/*  343 */  0,
/*  344 */  0,
/*  345 */  0,
/*  346 */  0,
/*  347 */  0,
/*  348 */  0,
/*  349 */  0,
/*  350 */  0,
/*  351 */  0,
/*  352 */  0,
/*  353 */  0,
/*  354 */  0,
/*  355 */  0,
/*  356 */  0,
/*  357 */  0,
/*  358 */  0,
/*  359 */  0,
/*  360 */  0,
/*  361 */  0,
/*  362 */  0,
/*  363 */  0,
/*  364 */  0,
/*  365 */  0,
/*  366 */  0,
/*  367 */  _Binary_rax_RegP_rRegP_rule,
/*  368 */  _Binary_rax_RegI_rRegI_rule,
/*  369 */  _Binary_rax_RegL_rRegL_rule,
/*  370 */  regF_rule,
/*  371 */  regF_rule,
/*  372 */  _LoadF_memory__rule,
/*  373 */  _LoadF_memory__rule,
/*  374 */  immF_rule,
/*  375 */  immF_rule,
/*  376 */  regD_rule,
/*  377 */  regD_rule,
/*  378 */  _LoadD_memory__rule,
/*  379 */  _LoadD_memory__rule,
/*  380 */  immD_rule,
/*  381 */  immD_rule,
/*  382 */  0,
/*  383 */  0,
/*  384 */  0,
/*  385 */  0,
/*  386 */  0,
/*  387 */  0,
/*  388 */  0,
/*  389 */  0,
/*  390 */  0,
/*  391 */  rRegI_rule,
/*  392 */  immI_rule,
/*  393 */  rRegL_rule,
/*  394 */  immL32_rule,
/*  395 */  rRegI_rule,
/*  396 */  immI_rule,
/*  397 */  rRegL_rule,
/*  398 */  immL32_rule,
/*  399 */  rax_RegI_rule,
/*  400 */  rax_RegL_rule,
/*  401 */  rRegI_rule,
/*  402 */  immI_rule,
/*  403 */  rRegL_rule,
/*  404 */  immL32_rule,
/*  405 */  rRegI_rule,
/*  406 */  immI_rule,
/*  407 */  _LoadI_memory__rule,
/*  408 */  immI_0_rule,
/*  409 */  immI_0_rule,
/*  410 */  immI_0_rule,
/*  411 */  immI_0_rule,
/*  412 */  rRegI_rule,
/*  413 */  immI_rule,
/*  414 */  _LoadI_memory__rule,
/*  415 */  immI_0_rule,
/*  416 */  rRegP_rule,
/*  417 */  _LoadP_memory__rule,
/*  418 */  _LoadP_memory__rule,
/*  419 */  immP0_rule,
/*  420 */  immP0_rule,
/*  421 */  immP0_rule,
/*  422 */  rRegN_rule,
/*  423 */  _LoadN_memory__rule,
/*  424 */  immN_rule,
/*  425 */  _LoadN_memory__rule,
/*  426 */  immNKlass_rule,
/*  427 */  _LoadNKlass_memory__rule,
/*  428 */  immN0_rule,
/*  429 */  immN0_rule,
/*  430 */  immN0_rule,
/*  431 */  rRegL_rule,
/*  432 */  immL32_rule,
/*  433 */  _LoadL_memory__rule,
/*  434 */  immL0_rule,
/*  435 */  immL0_rule,
/*  436 */  immL0_rule,
/*  437 */  immL0_rule,
/*  438 */  immL0_rule,
/*  439 */  immL0_rule,
/*  440 */  rRegL_rule,
/*  441 */  immL32_rule,
/*  442 */  _LoadL_memory__rule,
/*  443 */  immL0_rule,
/*  444 */  immI8_rule,
/*  445 */  immI_0_rule,
/*  446 */  immI_0_rule,
/*  447 */  immP0_rule,
/*  448 */  rbx_RegP_rule,
/*  449 */  rbx_RegP_rule,
/*  450 */  rax_RegP_rule,
/*  451 */  0,
/*  452 */  0,
/*  453 */  0,
/*  454 */  0,
/*  455 */  0,
/*  456 */  0,
/*  457 */  0,
/*  458 */  0,
/*  459 */  0,
/*  460 */  0,
/*  461 */  0,
/*  462 */  0,
/*  463 */  0,
/*  464 */  0,
/*  465 */  0,
/*  466 */  0,
/*  467 */  0,
/*  468 */  0,
/*  469 */  0,
/*  470 */  0,
/*  471 */  0,
/*  472 */  0,
/*  473 */  0,
/*  474 */  0,
/*  475 */  0,
/*  476 */  0,
/*  477 */  0,
/*  478 */  0,
/*  479 */  0,
/*  480 */  immI_0_rule,
/*  481 */  immI_0_rule,
/*  482 */  immI_0_rule,
/*  483 */  0,
/*  484 */  0,
/*  485 */  0,
/*  486 */  0,
/*  487 */  0,
/*  488 */  0,
/*  489 */  0,
/*  490 */  0,
/*  491 */  0,
/*  492 */  0,
/*  493 */  0,
/*  494 */  0,
/*  495 */  0,
/*  496 */  0,
/*  497 */  0,
/*  498 */  0,
/*  499 */  0,
/*  500 */  immI_24_rule,
/*  501 */  0,
/*  502 */  0,
/*  503 */  immI_24_rule,
/*  504 */  0,
/*  505 */  0,
/*  506 */  0,
/*  507 */  0,
/*  508 */  immI_24_rule,
/*  509 */  immI_255_rule,
/*  510 */  immI_16_rule,
/*  511 */  immI_65535_rule,
/*  512 */  0,
/*  513 */  0,
/*  514 */  0,
/*  515 */  0,
/*  516 */  immL_32bits_rule,
/*  517 */  0,
/*  518 */  0,
/*  519 */  0,
/*  520 */  0,
/*  521 */  0,
/*  522 */  0,
/*  523 */  0,
/*  524 */  0,
/*  525 */  0,
/*  526 */  legRegF_rule,
/*  527 */  legRegF_rule,
/*  528 */  legRegD_rule,
/*  529 */  legRegD_rule,
/*  530 */  legRegF_rule,
/*  531 */  legRegF_rule,
/*  532 */  legRegD_rule,
/*  533 */  legRegD_rule,
/*  534 */  0,
/*  535 */  0,
/*  536 */  0,
/*  537 */  0,
/*  538 */  rRegI_rule,
/*  539 */  rRegI_rule,
/*  540 */  rRegI_rule,
/*  541 */  rRegL_rule,
/*  542 */  any_RegP_rule,
/*  543 */  immP0_rule,
/*  544 */  immP31_rule,
/*  545 */  rRegN_rule,
/*  546 */  rRegN_rule,
/*  547 */  immN0_rule,
/*  548 */  immN_rule,
/*  549 */  immNKlass_rule,
/*  550 */  immI_0_rule,
/*  551 */  immI_rule,
/*  552 */  immL0_rule,
/*  553 */  immL32_rule,
/*  554 */  immI_0_rule,
/*  555 */  immI16_rule,
/*  556 */  immI_0_rule,
/*  557 */  immI8_rule,
/*  558 */  immI_0_rule,
/*  559 */  immI_0_rule,
/*  560 */  regF_rule,
/*  561 */  immF0_rule,
/*  562 */  immF_rule,
/*  563 */  regD_rule,
/*  564 */  immD0_rule,
/*  565 */  immD0_rule,
/*  566 */  0,
/*  567 */  0,
/*  568 */  0,
/*  569 */  0,
/*  570 */  0,
/*  571 */  0,
/*  572 */  0,
/*  573 */  0,
/*  574 */  0,
/*  575 */  0,
/*  576 */  0,
/*  577 */  0,
/*  578 */  0,
/*  579 */  0,
/*  580 */  0,
/*  581 */  0,
/*  582 */  0,
/*  583 */  0,
/*  584 */  0,
/*  585 */  0,
/*  586 */  0,
/*  587 */  0,
/*  588 */  0,
/*  589 */  0,
/*  590 */  0,
/*  591 */  0,
/*  592 */  0,
/*  593 */  0,
/*  594 */  0,
/*  595 */  0,
/*  596 */  0,
/*  597 */  0,
/*  598 */  0,
/*  599 */  0,
/*  600 */  0,
/*  601 */  0,
/*  602 */  0,
/*  603 */  0,
/*  604 */  0,
/*  605 */  _Binary_rRegI_rRegI_rule,
/*  606 */  _Binary_rRegI_rRegI_rule,
/*  607 */  _Binary_rRegI_rRegI_rule,
/*  608 */  _Binary_rRegI__LoadI_memory__rule,
/*  609 */  _Binary_rRegI__LoadI_memory__rule,
/*  610 */  _Binary_rRegI__LoadI_memory__rule,
/*  611 */  _Binary_rRegN_rRegN_rule,
/*  612 */  _Binary_rRegN_rRegN_rule,
/*  613 */  _Binary_rRegN_rRegN_rule,
/*  614 */  _Binary_rRegP_rRegP_rule,
/*  615 */  _Binary_rRegP_rRegP_rule,
/*  616 */  _Binary_rRegP_rRegP_rule,
/*  617 */  _Binary_rRegL_rRegL_rule,
/*  618 */  _Binary_rRegL__LoadL_memory__rule,
/*  619 */  _Binary_rRegL_rRegL_rule,
/*  620 */  _Binary_rRegL_rRegL_rule,
/*  621 */  _Binary_rRegL__LoadL_memory__rule,
/*  622 */  _Binary_rRegL__LoadL_memory__rule,
/*  623 */  _Binary_regF_regF_rule,
/*  624 */  _Binary_regF_regF_rule,
/*  625 */  _Binary_regF_regF_rule,
/*  626 */  _Binary_regD_regD_rule,
/*  627 */  _Binary_regD_regD_rule,
/*  628 */  _Binary_regD_regD_rule,
/*  629 */  rRegI_rule,
/*  630 */  immI_rule,
/*  631 */  _LoadI_memory__rule,
/*  632 */  rRegI_rule,
/*  633 */  _AddI__LoadI_memory__rRegI_rule,
/*  634 */  _AddI_rRegI__LoadI_memory__rule,
/*  635 */  _AddI__LoadI_memory__immI_rule,
/*  636 */  immI_1_rule,
/*  637 */  _AddI__LoadI_memory__immI_1_rule,
/*  638 */  immI_M1_rule,
/*  639 */  _AddI__LoadI_memory__immI_M1_rule,
/*  640 */  immI_rule,
/*  641 */  rRegL_rule,
/*  642 */  immL32_rule,
/*  643 */  _LoadL_memory__rule,
/*  644 */  rRegL_rule,
/*  645 */  _AddL__LoadL_memory__rRegL_rule,
/*  646 */  _AddL_rRegL__LoadL_memory__rule,
/*  647 */  _AddL__LoadL_memory__immL32_rule,
/*  648 */  immL1_rule,
/*  649 */  _AddL__LoadL_memory__immL1_rule,
/*  650 */  immL_M1_rule,
/*  651 */  _AddL__LoadL_memory__immL_M1_rule,
/*  652 */  immL32_rule,
/*  653 */  rRegL_rule,
/*  654 */  immL32_rule,
/*  655 */  immL32_rule,
/*  656 */  0,
/*  657 */  _Binary_rax_RegP_rRegP_rule,
/*  658 */  _Binary_rax_RegP_rRegP_rule,
/*  659 */  _Binary_rax_RegL_rRegL_rule,
/*  660 */  _Binary_rax_RegL_rRegL_rule,
/*  661 */  _Binary_rax_RegI_rRegI_rule,
/*  662 */  _Binary_rax_RegI_rRegI_rule,
/*  663 */  _Binary_rax_RegI_rRegI_rule,
/*  664 */  _Binary_rax_RegI_rRegI_rule,
/*  665 */  _Binary_rax_RegI_rRegI_rule,
/*  666 */  _Binary_rax_RegI_rRegI_rule,
/*  667 */  _Binary_rax_RegN_rRegN_rule,
/*  668 */  _Binary_rax_RegN_rRegN_rule,
/*  669 */  _Binary_rax_RegI_rRegI_rule,
/*  670 */  _Binary_rax_RegI_rRegI_rule,
/*  671 */  _Binary_rax_RegI_rRegI_rule,
/*  672 */  _Binary_rax_RegL_rRegL_rule,
/*  673 */  _Binary_rax_RegN_rRegN_rule,
/*  674 */  _Binary_rax_RegP_rRegP_rule,
/*  675 */  immI_rule,
/*  676 */  rRegI_rule,
/*  677 */  immI_rule,
/*  678 */  rRegI_rule,
/*  679 */  immI_rule,
/*  680 */  rRegI_rule,
/*  681 */  immL32_rule,
/*  682 */  rRegL_rule,
/*  683 */  rRegI_rule,
/*  684 */  rRegI_rule,
/*  685 */  rRegI_rule,
/*  686 */  rRegL_rule,
/*  687 */  rRegP_rule,
/*  688 */  rRegN_rule,
/*  689 */  0,
/*  690 */  0,
/*  691 */  rRegI_rule,
/*  692 */  immI_rule,
/*  693 */  _LoadI_memory__rule,
/*  694 */  _SubI__LoadI_memory__rRegI_rule,
/*  695 */  _SubI__LoadI_memory__immI_rule,
/*  696 */  rRegL_rule,
/*  697 */  immL32_rule,
/*  698 */  _LoadL_memory__rule,
/*  699 */  _SubL__LoadL_memory__rRegL_rule,
/*  700 */  _SubL__LoadL_memory__immL32_rule,
/*  701 */  _SubI_immI_0_rRegI_rule,
/*  702 */  rRegI_rule,
/*  703 */  0,
/*  704 */  _SubI_immI_0__LoadI_memory__rule,
/*  705 */  rRegL_rule,
/*  706 */  0,
/*  707 */  _SubL_immL0__LoadL_memory__rule,
/*  708 */  rRegI_rule,
/*  709 */  immI_rule,
/*  710 */  _LoadI_memory__rule,
/*  711 */  rRegI_rule,
/*  712 */  immI_rule,
/*  713 */  _Binary_rRegI_rRegI_rule,
/*  714 */  rRegL_rule,
/*  715 */  immL32_rule,
/*  716 */  _LoadL_memory__rule,
/*  717 */  rRegL_rule,
/*  718 */  immL32_rule,
/*  719 */  rax_RegL_rule,
/*  720 */  rax_RegL_rule,
/*  721 */  no_rax_rdx_RegI_rule,
/*  722 */  no_rax_rdx_RegL_rule,
/*  723 */  no_rax_rdx_RegI_rule,
/*  724 */  no_rax_rdx_RegL_rule,
/*  725 */  0,
/*  726 */  0,
/*  727 */  0,
/*  728 */  0,
/*  729 */  immL10_rule,
/*  730 */  no_rax_rdx_RegI_rule,
/*  731 */  no_rax_rdx_RegL_rule,
/*  732 */  immI_1_rule,
/*  733 */  _LShiftI__LoadI_memory__immI_1_rule,
/*  734 */  immI8_rule,
/*  735 */  _LShiftI__LoadI_memory__immI8_rule,
/*  736 */  rcx_RegI_rule,
/*  737 */  _LShiftI__LoadI_memory__rcx_RegI_rule,
/*  738 */  immI_1_rule,
/*  739 */  _RShiftI__LoadI_memory__immI_1_rule,
/*  740 */  immI8_rule,
/*  741 */  _RShiftI__LoadI_memory__immI8_rule,
/*  742 */  rcx_RegI_rule,
/*  743 */  _RShiftI__LoadI_memory__rcx_RegI_rule,
/*  744 */  immI_1_rule,
/*  745 */  _URShiftI__LoadI_memory__immI_1_rule,
/*  746 */  immI8_rule,
/*  747 */  _URShiftI__LoadI_memory__immI8_rule,
/*  748 */  rcx_RegI_rule,
/*  749 */  _URShiftI__LoadI_memory__rcx_RegI_rule,
/*  750 */  immI_1_rule,
/*  751 */  _LShiftL__LoadL_memory__immI_1_rule,
/*  752 */  immI8_rule,
/*  753 */  _LShiftL__LoadL_memory__immI8_rule,
/*  754 */  rcx_RegI_rule,
/*  755 */  _LShiftL__LoadL_memory__rcx_RegI_rule,
/*  756 */  immI_1_rule,
/*  757 */  _RShiftL__LoadL_memory__immI_1_rule,
/*  758 */  immI8_rule,
/*  759 */  _RShiftL__LoadL_memory__immI8_rule,
/*  760 */  rcx_RegI_rule,
/*  761 */  _RShiftL__LoadL_memory__rcx_RegI_rule,
/*  762 */  immI_1_rule,
/*  763 */  _URShiftL__LoadL_memory__immI_1_rule,
/*  764 */  immI8_rule,
/*  765 */  _URShiftL__LoadL_memory__immI8_rule,
/*  766 */  rcx_RegI_rule,
/*  767 */  _URShiftL__LoadL_memory__rcx_RegI_rule,
/*  768 */  immI_24_rule,
/*  769 */  immI_16_rule,
/*  770 */  immI8_rule,
/*  771 */  rcx_RegI_rule,
/*  772 */  immI8_rule,
/*  773 */  immI8_rule,
/*  774 */  rcx_RegI_rule,
/*  775 */  immI8_rule,
/*  776 */  rcx_RegI_rule,
/*  777 */  immI8_rule,
/*  778 */  immI8_rule,
/*  779 */  rcx_RegI_rule,
/*  780 */  rRegI_rule,
/*  781 */  immI_255_rule,
/*  782 */  0,
/*  783 */  immI_65535_rule,
/*  784 */  0,
/*  785 */  0,
/*  786 */  immI_rule,
/*  787 */  _LoadI_memory__rule,
/*  788 */  rRegI_rule,
/*  789 */  _AndI__LoadB_memory__rRegI_rule,
/*  790 */  _AndI_rRegI__LoadB_memory__rule,
/*  791 */  _AndI__LoadI_memory__rRegI_rule,
/*  792 */  _AndI_rRegI__LoadI_memory__rule,
/*  793 */  _AndI__LoadI_memory__immI_rule,
/*  794 */  _LoadI_memory__rule,
/*  795 */  _XorI_rRegI_immI_M1_rule,
/*  796 */  rRegI_rule,
/*  797 */  _XorI_rRegI_immI_M1_rule,
/*  798 */  rRegI_rule,
/*  799 */  _SubI_immI_0_rRegI_rule,
/*  800 */  _LoadI_memory__rule,
/*  801 */  _SubI_immI_0__LoadI_memory__rule,
/*  802 */  _LoadI_memory__rule,
/*  803 */  _AddI__LoadI_memory__immI_M1_rule,
/*  804 */  rRegI_rule,
/*  805 */  _AddI_rRegI_immI_M1_rule,
/*  806 */  rRegI_rule,
/*  807 */  _AddI_rRegI_immI_M1_rule,
/*  808 */  _LoadI_memory__rule,
/*  809 */  _AddI__LoadI_memory__immI_M1_rule,
/*  810 */  rRegI_rule,
/*  811 */  immI_rule,
/*  812 */  _LoadI_memory__rule,
/*  813 */  rRegI_rule,
/*  814 */  _OrI__LoadB_memory__rRegI_rule,
/*  815 */  _OrI_rRegI__LoadB_memory__rule,
/*  816 */  _OrI__LoadI_memory__rRegI_rule,
/*  817 */  _OrI_rRegI__LoadI_memory__rule,
/*  818 */  _OrI__LoadI_memory__immI_rule,
/*  819 */  rRegI_rule,
/*  820 */  immI_M1_rule,
/*  821 */  immI_rule,
/*  822 */  _LoadI_memory__rule,
/*  823 */  rRegI_rule,
/*  824 */  _XorI__LoadB_memory__rRegI_rule,
/*  825 */  _XorI_rRegI__LoadB_memory__rule,
/*  826 */  _XorI__LoadI_memory__rRegI_rule,
/*  827 */  _XorI_rRegI__LoadI_memory__rule,
/*  828 */  _XorI__LoadI_memory__immI_rule,
/*  829 */  rRegL_rule,
/*  830 */  immL_255_rule,
/*  831 */  immL_65535_rule,
/*  832 */  immL32_rule,
/*  833 */  _LoadL_memory__rule,
/*  834 */  rRegL_rule,
/*  835 */  _AndL__LoadL_memory__rRegL_rule,
/*  836 */  _AndL_rRegL__LoadL_memory__rule,
/*  837 */  _AndL__LoadL_memory__immL32_rule,
/*  838 */  _AndL__LoadL_memory__immL_NotPow2_rule,
/*  839 */  _LoadL_memory__rule,
/*  840 */  _XorL_rRegL_immL_M1_rule,
/*  841 */  rRegL_rule,
/*  842 */  _XorL_rRegL_immL_M1_rule,
/*  843 */  rRegL_rule,
/*  844 */  _SubL_immL0_rRegL_rule,
/*  845 */  _LoadL_memory__rule,
/*  846 */  _SubL_immL0__LoadL_memory__rule,
/*  847 */  _LoadL_memory__rule,
/*  848 */  _AddL__LoadL_memory__immL_M1_rule,
/*  849 */  rRegL_rule,
/*  850 */  _AddL_rRegL_immL_M1_rule,
/*  851 */  rRegL_rule,
/*  852 */  _AddL_rRegL_immL_M1_rule,
/*  853 */  _LoadL_memory__rule,
/*  854 */  _AddL__LoadL_memory__immL_M1_rule,
/*  855 */  rRegL_rule,
/*  856 */  _CastP2X_any_RegP__rule,
/*  857 */  rRegL_rule,
/*  858 */  immL32_rule,
/*  859 */  _LoadL_memory__rule,
/*  860 */  rRegL_rule,
/*  861 */  _OrL__LoadL_memory__rRegL_rule,
/*  862 */  _OrL_rRegL__LoadL_memory__rule,
/*  863 */  _OrL__LoadL_memory__immL32_rule,
/*  864 */  _OrL__LoadL_memory__immL_Pow2_rule,
/*  865 */  rRegL_rule,
/*  866 */  immL_M1_rule,
/*  867 */  immL32_rule,
/*  868 */  _LoadL_memory__rule,
/*  869 */  rRegL_rule,
/*  870 */  _XorL__LoadL_memory__rRegL_rule,
/*  871 */  _XorL_rRegL__LoadL_memory__rule,
/*  872 */  _XorL__LoadL_memory__immL32_rule,
/*  873 */  0,
/*  874 */  0,
/*  875 */  rRegI_rule,
/*  876 */  immI_0_rule,
/*  877 */  _SubI_rRegI_rRegI_rule,
/*  878 */  _AndI__CmpLTMask_rRegI_rRegI_rRegI_rule,
/*  879 */  _SubI_rRegI_rRegI_rule,
/*  880 */  _AndI_rRegI__CmpLTMask_rRegI_rRegI_rule,
/*  881 */  rRegI_rule,
/*  882 */  _CmpLTMask_rRegI_rRegI_rule,
/*  883 */  regF_rule,
/*  884 */  _LoadF_memory__rule,
/*  885 */  immF_rule,
/*  886 */  regD_rule,
/*  887 */  _LoadD_memory__rule,
/*  888 */  immD_rule,
/*  889 */  0,
/*  890 */  0,
/*  891 */  0,
/*  892 */  0,
/*  893 */  0,
/*  894 */  0,
/*  895 */  0,
/*  896 */  0,
/*  897 */  0,
/*  898 */  0,
/*  899 */  0,
/*  900 */  0,
/*  901 */  0,
/*  902 */  0,
/*  903 */  0,
/*  904 */  0,
/*  905 */  0,
/*  906 */  0,
/*  907 */  0,
/*  908 */  immL_32bits_rule,
/*  909 */  immL_32bits_rule,
/*  910 */  immL_32bits_rule,
/*  911 */  0,
/*  912 */  0,
/*  913 */  0,
/*  914 */  0,
/*  915 */  0,
/*  916 */  rdi_RegP_rule,
/*  917 */  rdi_RegP_rule,
/*  918 */  rdi_RegP_rule,
/*  919 */  rdi_RegP_rule,
/*  920 */  rRegP_rule,
/*  921 */  _Binary_rsi_RegP_rdx_RegI_rule,
/*  922 */  _Binary_rsi_RegP_rdx_RegI_rule,
/*  923 */  _Binary_rsi_RegP_rdx_RegI_rule,
/*  924 */  _Binary_rsi_RegP_rdx_RegI_rule,
/*  925 */  _Binary_rsi_RegP_rdx_RegI_rule,
/*  926 */  _Binary_rsi_RegP_rdx_RegI_rule,
/*  927 */  _Binary_rdi_RegP_rcx_RegI_rule,
/*  928 */  _Binary_rdi_RegP_rcx_RegI_rule,
/*  929 */  _Binary_rsi_RegP_immI_rule,
/*  930 */  _Binary_rsi_RegP_immI_rule,
/*  931 */  _Binary_rsi_RegP_immI_rule,
/*  932 */  _Binary_rsi_RegP_rax_RegI_rule,
/*  933 */  _Binary_rsi_RegP_rax_RegI_rule,
/*  934 */  _Binary_rsi_RegP_rax_RegI_rule,
/*  935 */  rax_RegI_rule,
/*  936 */  rax_RegI_rule,
/*  937 */  rcx_RegI_rule,
/*  938 */  rcx_RegI_rule,
/*  939 */  rsi_RegP_rule,
/*  940 */  rsi_RegP_rule,
/*  941 */  rsi_RegP_rule,
/*  942 */  rsi_RegP_rule,
/*  943 */  rcx_RegI_rule,
/*  944 */  rcx_RegI_rule,
/*  945 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  946 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  947 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  948 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  949 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  950 */  _Binary_rdi_RegP_rdx_RegI_rule,
/*  951 */  rRegL_rule,
/*  952 */  0,
/*  953 */  rRegI_rule,
/*  954 */  0,
/*  955 */  rRegI_rule,
/*  956 */  0,
/*  957 */  rFlagsReg_rule,
/*  958 */  rFlagsReg_rule,
/*  959 */  rFlagsRegU_rule,
/*  960 */  rFlagsRegUCF_rule,
/*  961 */  rFlagsReg_rule,
/*  962 */  rFlagsRegU_rule,
/*  963 */  rFlagsRegUCF_rule,
/*  964 */  rFlagsRegU_rule,
/*  965 */  rFlagsRegUCF_rule,
/*  966 */  rFlagsRegUCF_rule,
/*  967 */  rax_RegP_rule,
/*  968 */  0,
/*  969 */  rFlagsReg_rule,
/*  970 */  rFlagsReg_rule,
/*  971 */  rFlagsRegU_rule,
/*  972 */  rFlagsRegUCF_rule,
/*  973 */  rFlagsRegU_rule,
/*  974 */  rFlagsRegUCF_rule,
/*  975 */  rFlagsRegUCF_rule,
/*  976 */  0,
/*  977 */  0,
/*  978 */  0,
/*  979 */  0,
/*  980 */  0,
/*  981 */  0,
/*  982 */  0,
/*  983 */  0,
/*  984 */  0,
/*  985 */  rbx_RegP_rule,
/*  986 */  rax_RegP_rule,
/*  987 */  0,
/*  988 */  0,
/*  989 */  0,
/*  990 */  0,
/*  991 */  regF_rule,
/*  992 */  _LoadF_memory__rule,
/*  993 */  regF_rule,
/*  994 */  immF_rule,
/*  995 */  regF_rule,
/*  996 */  _LoadF_memory__rule,
/*  997 */  regF_rule,
/*  998 */  immF_rule,
/*  999 */  regD_rule,
/* 1000 */  _LoadD_memory__rule,
/* 1001 */  regD_rule,
/* 1002 */  immD_rule,
/* 1003 */  regD_rule,
/* 1004 */  _LoadD_memory__rule,
/* 1005 */  regD_rule,
/* 1006 */  immD_rule,
/* 1007 */  regF_rule,
/* 1008 */  _LoadF_memory__rule,
/* 1009 */  immF_rule,
/* 1010 */  regF_rule,
/* 1011 */  _LoadF_memory__rule,
/* 1012 */  immF_rule,
/* 1013 */  regD_rule,
/* 1014 */  _LoadD_memory__rule,
/* 1015 */  immD_rule,
/* 1016 */  regD_rule,
/* 1017 */  _LoadD_memory__rule,
/* 1018 */  immD_rule,
/* 1019 */  regF_rule,
/* 1020 */  _LoadF_memory__rule,
/* 1021 */  regF_rule,
/* 1022 */  immF_rule,
/* 1023 */  regF_rule,
/* 1024 */  _LoadF_memory__rule,
/* 1025 */  regF_rule,
/* 1026 */  immF_rule,
/* 1027 */  regD_rule,
/* 1028 */  _LoadD_memory__rule,
/* 1029 */  regD_rule,
/* 1030 */  immD_rule,
/* 1031 */  regD_rule,
/* 1032 */  _LoadD_memory__rule,
/* 1033 */  regD_rule,
/* 1034 */  immD_rule,
/* 1035 */  regF_rule,
/* 1036 */  _LoadF_memory__rule,
/* 1037 */  immF_rule,
/* 1038 */  regF_rule,
/* 1039 */  _LoadF_memory__rule,
/* 1040 */  immF_rule,
/* 1041 */  regD_rule,
/* 1042 */  _LoadD_memory__rule,
/* 1043 */  immD_rule,
/* 1044 */  regD_rule,
/* 1045 */  _LoadD_memory__rule,
/* 1046 */  immD_rule,
/* 1047 */  0,
/* 1048 */  0,
/* 1049 */  0,
/* 1050 */  0,
/* 1051 */  0,
/* 1052 */  0,
/* 1053 */  0,
/* 1054 */  immU8_rule,
/* 1055 */  immU8_rule,
/* 1056 */  immU8_rule,
/* 1057 */  immU8_rule,
/* 1058 */  immU8_rule,
/* 1059 */  immU8_rule,
/* 1060 */  immU8_rule,
/* 1061 */  0,
/* 1062 */  _Binary_regD_regD_rule,
/* 1063 */  _Binary_regF_regF_rule,
/* 1064 */  0,
/* 1065 */  vec_rule,
/* 1066 */  legVec_rule,
/* 1067 */  vec_rule,
/* 1068 */  _Binary_vec_kReg_rule,
/* 1069 */  _Binary_vec_vec_rule,
/* 1070 */  _Binary_vec__Binary_vec_kReg_rule,
/* 1071 */  0,
/* 1072 */  0,
/* 1073 */  0,
/* 1074 */  0,
/* 1075 */  0,
/* 1076 */  0,
/* 1077 */  0,
/* 1078 */  0,
/* 1079 */  0,
/* 1080 */  0,
/* 1081 */  0,
/* 1082 */  0,
/* 1083 */  0,
/* 1084 */  0,
/* 1085 */  0,
/* 1086 */  0,
/* 1087 */  0,
/* 1088 */  0,
/* 1089 */  0,
/* 1090 */  0,
/* 1091 */  0,
/* 1092 */  0,
/* 1093 */  0,
/* 1094 */  0,
/* 1095 */  0,
/* 1096 */  0,
/* 1097 */  immU8_rule,
/* 1098 */  immU8_rule,
/* 1099 */  immU8_rule,
/* 1100 */  immU8_rule,
/* 1101 */  immU8_rule,
/* 1102 */  immU8_rule,
/* 1103 */  immU8_rule,
/* 1104 */  immU8_rule,
/* 1105 */  immU8_rule,
/* 1106 */  immU8_rule,
/* 1107 */  immI_rule,
/* 1108 */  legVec_rule,
/* 1109 */  legVec_rule,
/* 1110 */  legVec_rule,
/* 1111 */  legVec_rule,
/* 1112 */  legVec_rule,
/* 1113 */  legVec_rule,
/* 1114 */  legVec_rule,
/* 1115 */  legVec_rule,
/* 1116 */  legVec_rule,
/* 1117 */  legVec_rule,
/* 1118 */  legVec_rule,
/* 1119 */  legVec_rule,
/* 1120 */  legVec_rule,
/* 1121 */  legVec_rule,
/* 1122 */  vec_rule,
/* 1123 */  vec_rule,
/* 1124 */  vec_rule,
/* 1125 */  vec_rule,
/* 1126 */  vec_rule,
/* 1127 */  vec_rule,
/* 1128 */  vec_rule,
/* 1129 */  vec_rule,
/* 1130 */  vec_rule,
/* 1131 */  vec_rule,
/* 1132 */  vec_rule,
/* 1133 */  legVec_rule,
/* 1134 */  legVec_rule,
/* 1135 */  vec_rule,
/* 1136 */  vec_rule,
/* 1137 */  vec_rule,
/* 1138 */  vec_rule,
/* 1139 */  legVec_rule,
/* 1140 */  legVec_rule,
/* 1141 */  legVec_rule,
/* 1142 */  legVec_rule,
/* 1143 */  legVec_rule,
/* 1144 */  legVec_rule,
/* 1145 */  legVec_rule,
/* 1146 */  legVec_rule,
/* 1147 */  vec_rule,
/* 1148 */  vec_rule,
/* 1149 */  vec_rule,
/* 1150 */  vec_rule,
/* 1151 */  vec_rule,
/* 1152 */  vec_rule,
/* 1153 */  legVec_rule,
/* 1154 */  legVec_rule,
/* 1155 */  legVec_rule,
/* 1156 */  legVec_rule,
/* 1157 */  legVec_rule,
/* 1158 */  legVec_rule,
/* 1159 */  legVec_rule,
/* 1160 */  vec_rule,
/* 1161 */  legVec_rule,
/* 1162 */  legVec_rule,
/* 1163 */  legVec_rule,
/* 1164 */  legVec_rule,
/* 1165 */  legVec_rule,
/* 1166 */  legVec_rule,
/* 1167 */  legVec_rule,
/* 1168 */  legVec_rule,
/* 1169 */  legVec_rule,
/* 1170 */  legVec_rule,
/* 1171 */  legVec_rule,
/* 1172 */  legVec_rule,
/* 1173 */  legVec_rule,
/* 1174 */  legVec_rule,
/* 1175 */  legVec_rule,
/* 1176 */  legVec_rule,
/* 1177 */  legVec_rule,
/* 1178 */  vec_rule,
/* 1179 */  vec_rule,
/* 1180 */  _LoadVector_memory__rule,
/* 1181 */  vec_rule,
/* 1182 */  vec_rule,
/* 1183 */  vec_rule,
/* 1184 */  _LoadVector_memory__rule,
/* 1185 */  vec_rule,
/* 1186 */  vec_rule,
/* 1187 */  vec_rule,
/* 1188 */  _LoadVector_memory__rule,
/* 1189 */  vec_rule,
/* 1190 */  vec_rule,
/* 1191 */  vec_rule,
/* 1192 */  _LoadVector_memory__rule,
/* 1193 */  vec_rule,
/* 1194 */  vec_rule,
/* 1195 */  vec_rule,
/* 1196 */  _LoadVector_memory__rule,
/* 1197 */  vec_rule,
/* 1198 */  vec_rule,
/* 1199 */  vec_rule,
/* 1200 */  _LoadVector_memory__rule,
/* 1201 */  vec_rule,
/* 1202 */  vec_rule,
/* 1203 */  vec_rule,
/* 1204 */  _LoadVector_memory__rule,
/* 1205 */  vec_rule,
/* 1206 */  vec_rule,
/* 1207 */  _LoadVector_memory__rule,
/* 1208 */  vec_rule,
/* 1209 */  vec_rule,
/* 1210 */  _LoadVector_memory__rule,
/* 1211 */  vec_rule,
/* 1212 */  vec_rule,
/* 1213 */  _LoadVector_memory__rule,
/* 1214 */  vec_rule,
/* 1215 */  vec_rule,
/* 1216 */  _LoadVector_memory__rule,
/* 1217 */  vec_rule,
/* 1218 */  vec_rule,
/* 1219 */  _LoadVector_memory__rule,
/* 1220 */  vec_rule,
/* 1221 */  vec_rule,
/* 1222 */  vec_rule,
/* 1223 */  vec_rule,
/* 1224 */  vec_rule,
/* 1225 */  vec_rule,
/* 1226 */  vec_rule,
/* 1227 */  _LoadVector_memory__rule,
/* 1228 */  vec_rule,
/* 1229 */  vec_rule,
/* 1230 */  vec_rule,
/* 1231 */  _LoadVector_memory__rule,
/* 1232 */  vec_rule,
/* 1233 */  vec_rule,
/* 1234 */  _LoadVector_memory__rule,
/* 1235 */  vec_rule,
/* 1236 */  vec_rule,
/* 1237 */  vec_rule,
/* 1238 */  vec_rule,
/* 1239 */  vec_rule,
/* 1240 */  _LoadVector_memory__rule,
/* 1241 */  vec_rule,
/* 1242 */  vec_rule,
/* 1243 */  vec_rule,
/* 1244 */  _LoadVector_memory__rule,
/* 1245 */  vec_rule,
/* 1246 */  _Binary_legVec_legVec_rule,
/* 1247 */  _Binary_legVec_legVec_rule,
/* 1248 */  vec_rule,
/* 1249 */  vec_rule,
/* 1250 */  _LoadVector_memory__rule,
/* 1251 */  vec_rule,
/* 1252 */  vec_rule,
/* 1253 */  _LoadVector_memory__rule,
/* 1254 */  vec_rule,
/* 1255 */  vec_rule,
/* 1256 */  vec_rule,
/* 1257 */  vec_rule,
/* 1258 */  vec_rule,
/* 1259 */  vec_rule,
/* 1260 */  legVec_rule,
/* 1261 */  legVec_rule,
/* 1262 */  vec_rule,
/* 1263 */  vec_rule,
/* 1264 */  legVec_rule,
/* 1265 */  legVec_rule,
/* 1266 */  vec_rule,
/* 1267 */  vec_rule,
/* 1268 */  _Binary_regF_regF_rule,
/* 1269 */  _Binary_regD_regD_rule,
/* 1270 */  regF_rule,
/* 1271 */  _Binary_regD_immD_rule,
/* 1272 */  vec_rule,
/* 1273 */  vec_rule,
/* 1274 */  vec_rule,
/* 1275 */  vec_rule,
/* 1276 */  vec_rule,
/* 1277 */  vec_rule,
/* 1278 */  vec_rule,
/* 1279 */  vec_rule,
/* 1280 */  vec_rule,
/* 1281 */  vec_rule,
/* 1282 */  vec_rule,
/* 1283 */  vec_rule,
/* 1284 */  vec_rule,
/* 1285 */  vec_rule,
/* 1286 */  vec_rule,
/* 1287 */  vec_rule,
/* 1288 */  vec_rule,
/* 1289 */  vec_rule,
/* 1290 */  vec_rule,
/* 1291 */  vec_rule,
/* 1292 */  vec_rule,
/* 1293 */  _LShiftCntV_immI8__rule,
/* 1294 */  _RShiftCntV_immI8__rule,
/* 1295 */  _RShiftCntV_immI8__rule,
/* 1296 */  vec_rule,
/* 1297 */  vec_rule,
/* 1298 */  _LShiftCntV_immI8__rule,
/* 1299 */  _RShiftCntV_immI8__rule,
/* 1300 */  vec_rule,
/* 1301 */  vec_rule,
/* 1302 */  vec_rule,
/* 1303 */  vec_rule,
/* 1304 */  vec_rule,
/* 1305 */  vec_rule,
/* 1306 */  vec_rule,
/* 1307 */  vec_rule,
/* 1308 */  vec_rule,
/* 1309 */  vec_rule,
/* 1310 */  vec_rule,
/* 1311 */  vec_rule,
/* 1312 */  vec_rule,
/* 1313 */  vec_rule,
/* 1314 */  vec_rule,
/* 1315 */  vec_rule,
/* 1316 */  vec_rule,
/* 1317 */  vec_rule,
/* 1318 */  vec_rule,
/* 1319 */  vec_rule,
/* 1320 */  vec_rule,
/* 1321 */  vec_rule,
/* 1322 */  vec_rule,
/* 1323 */  vec_rule,
/* 1324 */  vec_rule,
/* 1325 */  vec_rule,
/* 1326 */  vec_rule,
/* 1327 */  vec_rule,
/* 1328 */  vec_rule,
/* 1329 */  vec_rule,
/* 1330 */  vec_rule,
/* 1331 */  vec_rule,
/* 1332 */  vec_rule,
/* 1333 */  vec_rule,
/* 1334 */  vec_rule,
/* 1335 */  _LoadVector_memory__rule,
/* 1336 */  vec_rule,
/* 1337 */  vec_rule,
/* 1338 */  vec_rule,
/* 1339 */  _LoadVector_memory__rule,
/* 1340 */  vec_rule,
/* 1341 */  vec_rule,
/* 1342 */  vec_rule,
/* 1343 */  _LoadVector_memory__rule,
/* 1344 */  vec_rule,
/* 1345 */  0,
/* 1346 */  0,
/* 1347 */  0,
/* 1348 */  0,
/* 1349 */  0,
/* 1350 */  0,
/* 1351 */  0,
/* 1352 */  0,
/* 1353 */  immI8_rule,
/* 1354 */  immI8_rule,
/* 1355 */  immI8_rule,
/* 1356 */  immI8_rule,
/* 1357 */  immI8_rule,
/* 1358 */  immI8_rule,
/* 1359 */  immI8_rule,
/* 1360 */  immI8_rule,
/* 1361 */  immU8_rule,
/* 1362 */  immU8_rule,
/* 1363 */  immU8_rule,
/* 1364 */  immI_rule,
/* 1365 */  immI_rule,
/* 1366 */  immI_rule,
/* 1367 */  immU8_rule,
/* 1368 */  immU8_rule,
/* 1369 */  immU8_rule,
/* 1370 */  immU8_rule,
/* 1371 */  immU8_rule,
/* 1372 */  immU8_rule,
/* 1373 */  vec_rule,
/* 1374 */  legVec_rule,
/* 1375 */  legVec_rule,
/* 1376 */  vec_rule,
/* 1377 */  kReg_rule,
/* 1378 */  0,
/* 1379 */  0,
/* 1380 */  0,
/* 1381 */  0,
/* 1382 */  0,
/* 1383 */  0,
/* 1384 */  legVec_rule,
/* 1385 */  legVec_rule,
/* 1386 */  kReg_rule,
/* 1387 */  kReg_rule,
/* 1388 */  legVec_rule,
/* 1389 */  legVec_rule,
/* 1390 */  kReg_rule,
/* 1391 */  0,
/* 1392 */  0,
/* 1393 */  0,
/* 1394 */  immI_1_rule,
/* 1395 */  immI_2_rule,
/* 1396 */  immI_4_rule,
/* 1397 */  immI_8_rule,
/* 1398 */  immI_8_rule,
/* 1399 */  immI_4_rule,
/* 1400 */  immI_8_rule,
/* 1401 */  immI_rule,
/* 1402 */  immI_rule,
/* 1403 */  0,
/* 1404 */  vec_rule,
/* 1405 */  vec_rule,
/* 1406 */  vec_rule,
/* 1407 */  0,
/* 1408 */  vec_rule,
/* 1409 */  vec_rule,
/* 1410 */  vec_rule,
/* 1411 */  0,
/* 1412 */  vec_rule,
/* 1413 */  vec_rule,
/* 1414 */  0,
/* 1415 */  vec_rule,
/* 1416 */  vec_rule,
/* 1417 */  _Binary_vec_vec_rule,
/* 1418 */  _Binary_vec__LoadVector_memory__rule,
/* 1419 */  _Binary_vec_vec_rule,
/* 1420 */  _Binary_vec__LoadVector_memory__rule,
/* 1421 */  vec_rule,
/* 1422 */  vec_rule,
/* 1423 */  vec_rule,
/* 1424 */  _MulAddVS2VI_vec_vec_rule,
/* 1425 */  _Binary_vec_immU8_rule,
/* 1426 */  _Binary__LoadVector_memory__immU8_rule,
/* 1427 */  immI8_rule,
/* 1428 */  immI8_rule,
/* 1429 */  vec_rule,
/* 1430 */  vec_rule,
/* 1431 */  _Binary_vec_kReg_rule,
/* 1432 */  kReg_rule,
/* 1433 */  0,
/* 1434 */  0,
/* 1435 */  _Binary_vec_kReg_rule,
/* 1436 */  0,
/* 1437 */  0,
/* 1438 */  0,
/* 1439 */  0,
/* 1440 */  0,
/* 1441 */  0,
/* 1442 */  0,
/* 1443 */  0,
/* 1444 */  0,
/* 1445 */  0,
/* 1446 */  0,
/* 1447 */  0,
/* 1448 */  kReg_rule,
/* 1449 */  kReg_rule,
/* 1450 */  kReg_rule,
/* 1451 */  kReg_rule,
/* 1452 */  kReg_rule,
/* 1453 */  kReg_rule,
/* 1454 */  kReg_rule,
/* 1455 */  kReg_rule,
/* 1456 */  kReg_rule,
/* 1457 */  kReg_rule,
/* 1458 */  kReg_rule,
/* 1459 */  kReg_rule,
/* 1460 */  kReg_rule,
/* 1461 */  kReg_rule,
/* 1462 */  kReg_rule,
/* 1463 */  kReg_rule,
/* 1464 */  kReg_rule,
/* 1465 */  kReg_rule,
/* 1466 */  kReg_rule,
/* 1467 */  kReg_rule,
/* 1468 */  kReg_rule,
/* 1469 */  kReg_rule,
/* 1470 */  kReg_rule,
/* 1471 */  kReg_rule,
/* 1472 */  kReg_rule,
/* 1473 */  kReg_rule,
/* 1474 */  kReg_rule,
/* 1475 */  kReg_rule,
/* 1476 */  kReg_rule,
/* 1477 */  kReg_rule,
/* 1478 */  kReg_rule,
/* 1479 */  kReg_rule,
/* 1480 */  kReg_rule,
/* 1481 */  kReg_rule,
/* 1482 */  kReg_rule,
/* 1483 */  kReg_rule,
/* 1484 */  kReg_rule,
/* 1485 */  kReg_rule,
/* 1486 */  kReg_rule,
/* 1487 */  kReg_rule,
/* 1488 */  kReg_rule,
/* 1489 */  kReg_rule,
/* 1490 */  kReg_rule,
/* 1491 */  kReg_rule,
/* 1492 */  kReg_rule,
/* 1493 */  kReg_rule,
/* 1494 */  kReg_rule,
/* 1495 */  kReg_rule,
/* 1496 */  kReg_rule,
/* 1497 */  kReg_rule,
/* 1498 */  kReg_rule,
/* 1499 */  kReg_rule,
/* 1500 */  kReg_rule,
/* 1501 */  kReg_rule,
/* 1502 */  kReg_rule,
/* 1503 */  kReg_rule,
/* 1504 */  kReg_rule,
/* 1505 */  kReg_rule,
/* 1506 */  kReg_rule,
/* 1507 */  kReg_rule,
/* 1508 */  kReg_rule,
/* 1509 */  kReg_rule,
/* 1510 */  kReg_rule,
/* 1511 */  kReg_rule,
/* 1512 */  kReg_rule,
/* 1513 */  kReg_rule,
/* 1514 */  kReg_rule,
/* 1515 */  kReg_rule,
/* 1516 */  kReg_rule,
/* 1517 */  kReg_rule,
/* 1518 */  kReg_rule,
/* 1519 */  kReg_rule,
/* 1520 */  kReg_rule,
/* 1521 */  kReg_rule,
/* 1522 */  kReg_rule,
/* 1523 */  kReg_rule,
/* 1524 */  kReg_rule,
/* 1525 */  kReg_rule,
/* 1526 */  kReg_rule,
/* 1527 */  kReg_rule,
/* 1528 */  kReg_rule,
/* 1529 */  kReg_rule,
/* 1530 */  kReg_rule,
/* 1531 */  kReg_rule,
/* 1532 */  kReg_rule,
/* 1533 */  kReg_rule,
/* 1534 */  kReg_rule,
/* 1535 */  kReg_rule,
/* 1536 */  kReg_rule,
/* 1537 */  kReg_rule,
/* 1538 */  kReg_rule,
/* 1539 */  kReg_rule,
/* 1540 */  kReg_rule,
/* 1541 */  kReg_rule,
/* 1542 */  kReg_rule,
/* 1543 */  _Binary_vec_kReg_rule,
/* 1544 */  _Binary_vec_kReg_rule,
/* 1545 */  _Binary__LoadVector_memory__kReg_rule,
/* 1546 */  _Binary__LoadVector_memory__kReg_rule,
/* 1547 */  _Binary_immI8_kReg_rule,
/* 1548 */  0,
/* 1549 */  0,
/* 1550 */  0,
/* 1551 */  _MaskAll_immI_M1__rule,
/* 1552 */  _MaskAll_immI_M1__rule,
/* 1553 */  0,
/* 1554 */  0,
/* 1555 */  kReg_rule,
/* 1556 */  kReg_rule,
/* 1557 */  kReg_rule,
/* 1558 */  _Binary_rax_RegP_rRegP_rule,
/* 1559 */  _Binary_rax_RegP_rRegP_rule,
/* 1560 */  _Binary_rax_RegN_rRegN_rule,
/* 1561 */  _Binary_rax_RegN_rRegN_rule,
/* 1562 */  _Binary_rax_RegN_rRegN_rule,
/* 1563 */  _Binary_rax_RegP_rRegP_rule,
/* 1564 */  0,
/* 1565 */  _Binary_rax_RegP_rRegP_rule,
/* 1566 */  _Binary_rax_RegP_rRegP_rule,
/* 1567 */  _Binary_rax_RegP_rRegP_rule,
/* 1568 */  rRegP_rule,
// last instruction
0 // no trailing comma
9336};

9338const char        *ruleName[] = {
/*    0 */  "UNIVERSE",
/*    1 */  "LABEL",
/*    2 */  "SREGI",
/*    3 */  "SREGP",
/*    4 */  "SREGF",
/*    5 */  "SREGD",
/*    6 */  "SREGL",
/*    7 */  "METHOD",
/*    8 */  "IMMI",
/*    9 */  "IMMI_0",
/*   10 */  "IMMI_1",
/*   11 */  "IMMI_M1",
/*   12 */  "IMMI_2",
/*   13 */  "IMMI_4",
/*   14 */  "IMMI_8",
/*   15 */  "IMMI2",
/*   16 */  "IMMU7",
/*   17 */  "IMMI8",
/*   18 */  "IMMU8",
/*   19 */  "IMMI16",
/*   20 */  "IMMU31",
/*   21 */  "IMMI_32",
/*   22 */  "IMMI_64",
/*   23 */  "IMMP",
/*   24 */  "IMMP0",
/*   25 */  "IMMN",
/*   26 */  "IMMNKLASS",
/*   27 */  "IMMN0",
/*   28 */  "IMMP31",
/*   29 */  "IMML",
/*   30 */  "IMML8",
/*   31 */  "IMMUL32",
/*   32 */  "IMML32",
/*   33 */  "IMML_POW2",
/*   34 */  "IMML_NOTPOW2",
/*   35 */  "IMML0",
/*   36 */  "IMML1",
/*   37 */  "IMML_M1",
/*   38 */  "IMML10",
/*   39 */  "IMML_127",
/*   40 */  "IMML_32BITS",
/*   41 */  "IMMI_POW2M1",
/*   42 */  "IMMF0",
/*   43 */  "IMMF",
/*   44 */  "IMMD0",
/*   45 */  "IMMD",
/*   46 */  "IMMI_16",
/*   47 */  "IMMI_24",
/*   48 */  "IMMI_255",
/*   49 */  "IMMI_65535",
/*   50 */  "IMML_255",
/*   51 */  "IMML_65535",
/*   52 */  "KREG",
/*   53 */  "KREG_K1",
/*   54 */  "KREG_K2",
/*   55 */  "KREG_K3",
/*   56 */  "KREG_K4",
/*   57 */  "KREG_K5",
/*   58 */  "KREG_K6",
/*   59 */  "KREG_K7",
/*   60 */  "RREGI",
/*   61 */  "RAX_REGI",
/*   62 */  "RBX_REGI",
/*   63 */  "RCX_REGI",
/*   64 */  "RDX_REGI",
/*   65 */  "RDI_REGI",
/*   66 */  "NO_RAX_RDX_REGI",
/*   67 */  "ANY_REGP",
/*   68 */  "RREGP",
/*   69 */  "RREGN",
/*   70 */  "NO_RAX_REGP",
/*   71 */  "NO_RBP_REGP",
/*   72 */  "NO_RAX_RBX_REGP",
/*   73 */  "RAX_REGP",
/*   74 */  "RAX_REGN",
/*   75 */  "RBX_REGP",
/*   76 */  "RSI_REGP",
/*   77 */  "RBP_REGP",
/*   78 */  "RDI_REGP",
/*   79 */  "R15_REGP",
/*   80 */  "RREGL",
/*   81 */  "NO_RAX_RDX_REGL",
/*   82 */  "NO_RAX_REGL",
/*   83 */  "RAX_REGL",
/*   84 */  "RCX_REGL",
/*   85 */  "RDX_REGL",
/*   86 */  "RFLAGSREG",
/*   87 */  "RFLAGSREGU",
/*   88 */  "RFLAGSREGUCF",
/*   89 */  "REGF",
/*   90 */  "LEGREGF",
/*   91 */  "VLREGF",
/*   92 */  "REGD",
/*   93 */  "LEGREGD",
/*   94 */  "VLREGD",
/*   95 */  "INDIRECT",
/*   96 */  "INDOFFSET8",
/*   97 */  "INDOFFSET32",
/*   98 */  "INDINDEXOFFSET",
/*   99 */  "INDINDEX",
/*  100 */  "INDINDEXSCALE",
/*  101 */  "INDPOSINDEXSCALE",
/*  102 */  "INDINDEXSCALEOFFSET",
/*  103 */  "INDPOSINDEXOFFSET",
/*  104 */  "INDPOSINDEXSCALEOFFSET",
/*  105 */  "INDCOMPRESSEDOOPOFFSET",
/*  106 */  "INDIRECTNARROW",
/*  107 */  "INDOFFSET8NARROW",
/*  108 */  "INDOFFSET32NARROW",
/*  109 */  "INDINDEXOFFSETNARROW",
/*  110 */  "INDINDEXNARROW",
/*  111 */  "INDINDEXSCALENARROW",
/*  112 */  "INDINDEXSCALEOFFSETNARROW",
/*  113 */  "INDPOSINDEXOFFSETNARROW",
/*  114 */  "INDPOSINDEXSCALEOFFSETNARROW",
/*  115 */  "STACKSLOTP",
/*  116 */  "STACKSLOTI",
/*  117 */  "STACKSLOTF",
/*  118 */  "STACKSLOTD",
/*  119 */  "STACKSLOTL",
/*  120 */  "CMPOP",
/*  121 */  "CMPOPU",
/*  122 */  "CMPOPUCF",
/*  123 */  "CMPOPUCF2",
/*  124 */  "RXMM0",
/*  125 */  "VEC",
/*  126 */  "LEGVEC",
/*  127 */  "VECS",
/*  128 */  "LEGVECS",
/*  129 */  "VECD",
/*  130 */  "LEGVECD",
/*  131 */  "VECX",
/*  132 */  "LEGVECX",
/*  133 */  "VECY",
/*  134 */  "LEGVECY",
/*  135 */  "VECZ",
/*  136 */  "LEGVECZ",
/*  137 */  "CMPOP_VCMPPD",
// last operand
/*  138 */  "MEMORY",
// last operand class
/*  139 */  "_AddP_any_RegP_rRegL",
/*  140 */  "_LShiftL_rRegL_immI2",
/*  141 */  "_ConvI2L_rRegI_",
/*  142 */  "_LShiftL__ConvI2L_rRegI__immI2",
/*  143 */  "_AddP_any_RegP__LShiftL_rRegL_immI2",
/*  144 */  "_AddP_any_RegP__ConvI2L_rRegI_",
/*  145 */  "_AddP_any_RegP__LShiftL__ConvI2L_rRegI__immI2",
/*  146 */  "_DecodeN_rRegN_",
/*  147 */  "_AddP__DecodeN_rRegN__rRegL",
/*  148 */  "_AddP__DecodeN_rRegN___LShiftL_rRegL_immI2",
/*  149 */  "_AddP__DecodeN_rRegN___ConvI2L_rRegI_",
/*  150 */  "_AddP__DecodeN_rRegN___LShiftL__ConvI2L_rRegI__immI2",
/*  151 */  "_LoadB_memory_",
/*  152 */  "_LoadUB_memory_",
/*  153 */  "_AndI__LoadUB_memory__immI",
/*  154 */  "_LoadS_memory_",
/*  155 */  "_LShiftI__LoadS_memory__immI_24",
/*  156 */  "_LoadUS_memory_",
/*  157 */  "_LShiftI__LoadUS_memory__immI_24",
/*  158 */  "_AndI__LoadUS_memory__immI_255",
/*  159 */  "_AndI__LoadUS_memory__immI",
/*  160 */  "_LoadI_memory_",
/*  161 */  "_LShiftI__LoadI_memory__immI_24",
/*  162 */  "_LShiftI__LoadI_memory__immI_16",
/*  163 */  "_AndI__LoadI_memory__immI_255",
/*  164 */  "_AndI__LoadI_memory__immI_65535",
/*  165 */  "_AndI__LoadI_memory__immU31",
/*  166 */  "_ConvI2L__LoadI_memory__",
/*  167 */  "_LoadL_memory_",
/*  168 */  "_CastP2X_rRegP_",
/*  169 */  "_CastP2X__DecodeN_rRegN__",
/*  170 */  "_AddL__LShiftL_rRegL_immI2_immL32",
/*  171 */  "_Binary_cmpOp_rFlagsReg",
/*  172 */  "_Binary_rRegI_rRegI",
/*  173 */  "_Binary_cmpOpU_rFlagsRegU",
/*  174 */  "_Binary_cmpOpUCF_rFlagsRegUCF",
/*  175 */  "_Binary_rRegI__LoadI_memory_",
/*  176 */  "_Binary_rRegN_rRegN",
/*  177 */  "_Binary_rRegP_rRegP",
/*  178 */  "_Binary_rRegL_rRegL",
/*  179 */  "_Binary_rRegL__LoadL_memory_",
/*  180 */  "_Binary_regF_regF",
/*  181 */  "_Binary_regD_regD",
/*  182 */  "_AddI__LoadI_memory__rRegI",
/*  183 */  "_AddI_rRegI__LoadI_memory_",
/*  184 */  "_AddI__LoadI_memory__immI",
/*  185 */  "_AddI__LoadI_memory__immI_1",
/*  186 */  "_AddI__LoadI_memory__immI_M1",
/*  187 */  "_AddL__LoadL_memory__rRegL",
/*  188 */  "_AddL_rRegL__LoadL_memory_",
/*  189 */  "_AddL__LoadL_memory__immL32",
/*  190 */  "_AddL__LoadL_memory__immL1",
/*  191 */  "_AddL__LoadL_memory__immL_M1",
/*  192 */  "_Binary_rax_RegP_rRegP",
/*  193 */  "_Binary_rax_RegI_rRegI",
/*  194 */  "_Binary_rax_RegL_rRegL",
/*  195 */  "_Binary_rax_RegN_rRegN",
/*  196 */  "_SubI__LoadI_memory__rRegI",
/*  197 */  "_SubI__LoadI_memory__immI",
/*  198 */  "_SubL__LoadL_memory__rRegL",
/*  199 */  "_SubL__LoadL_memory__immL32",
/*  200 */  "_SubI_immI_0_rRegI",
/*  201 */  "_SubI_immI_0__LoadI_memory_",
/*  202 */  "_SubL_immL0__LoadL_memory_",
/*  203 */  "_LShiftI__LoadI_memory__immI_1",
/*  204 */  "_LShiftI__LoadI_memory__immI8",
/*  205 */  "_LShiftI__LoadI_memory__rcx_RegI",
/*  206 */  "_RShiftI__LoadI_memory__immI_1",
/*  207 */  "_RShiftI__LoadI_memory__immI8",
/*  208 */  "_RShiftI__LoadI_memory__rcx_RegI",
/*  209 */  "_URShiftI__LoadI_memory__immI_1",
/*  210 */  "_URShiftI__LoadI_memory__immI8",
/*  211 */  "_URShiftI__LoadI_memory__rcx_RegI",
/*  212 */  "_LShiftL__LoadL_memory__immI_1",
/*  213 */  "_LShiftL__LoadL_memory__immI8",
/*  214 */  "_LShiftL__LoadL_memory__rcx_RegI",
/*  215 */  "_RShiftL__LoadL_memory__immI_1",
/*  216 */  "_RShiftL__LoadL_memory__immI8",
/*  217 */  "_RShiftL__LoadL_memory__rcx_RegI",
/*  218 */  "_URShiftL__LoadL_memory__immI_1",
/*  219 */  "_URShiftL__LoadL_memory__immI8",
/*  220 */  "_URShiftL__LoadL_memory__rcx_RegI",
/*  221 */  "_LShiftI_rRegI_immI_24",
/*  222 */  "_LShiftI_rRegI_immI_16",
/*  223 */  "_AndI_rRegI_immI_255",
/*  224 */  "_AndI_rRegI_immI_65535",
/*  225 */  "_AndI_rRegI_immI_Pow2M1",
/*  226 */  "_AndI__LoadB_memory__rRegI",
/*  227 */  "_AndI_rRegI__LoadB_memory_",
/*  228 */  "_AndI__LoadI_memory__rRegI",
/*  229 */  "_AndI_rRegI__LoadI_memory_",
/*  230 */  "_AndI__LoadI_memory__immI",
/*  231 */  "_XorI_rRegI_immI_M1",
/*  232 */  "_AddI_rRegI_immI_M1",
/*  233 */  "_OrI__LoadB_memory__rRegI",
/*  234 */  "_OrI_rRegI__LoadB_memory_",
/*  235 */  "_OrI__LoadI_memory__rRegI",
/*  236 */  "_OrI_rRegI__LoadI_memory_",
/*  237 */  "_OrI__LoadI_memory__immI",
/*  238 */  "_XorI__LoadB_memory__rRegI",
/*  239 */  "_XorI_rRegI__LoadB_memory_",
/*  240 */  "_XorI__LoadI_memory__rRegI",
/*  241 */  "_XorI_rRegI__LoadI_memory_",
/*  242 */  "_XorI__LoadI_memory__immI",
/*  243 */  "_AndL__LoadL_memory__rRegL",
/*  244 */  "_AndL_rRegL__LoadL_memory_",
/*  245 */  "_AndL__LoadL_memory__immL32",
/*  246 */  "_AndL__LoadL_memory__immL_NotPow2",
/*  247 */  "_XorL_rRegL_immL_M1",
/*  248 */  "_SubL_immL0_rRegL",
/*  249 */  "_AddL_rRegL_immL_M1",
/*  250 */  "_CastP2X_any_RegP_",
/*  251 */  "_OrL__LoadL_memory__rRegL",
/*  252 */  "_OrL_rRegL__LoadL_memory_",
/*  253 */  "_OrL__LoadL_memory__immL32",
/*  254 */  "_OrL__LoadL_memory__immL_Pow2",
/*  255 */  "_XorL__LoadL_memory__rRegL",
/*  256 */  "_XorL_rRegL__LoadL_memory_",
/*  257 */  "_XorL__LoadL_memory__immL32",
/*  258 */  "_CmpLTMask_rRegI_rRegI",
/*  259 */  "_AndI__CmpLTMask_rRegI_rRegI_rRegI",
/*  260 */  "_SubI_rRegI_rRegI",
/*  261 */  "_AndI_rRegI__CmpLTMask_rRegI_rRegI",
/*  262 */  "_LoadF_memory_",
/*  263 */  "_LoadD_memory_",
/*  264 */  "_Binary_rdi_RegP_rcx_RegI",
/*  265 */  "_Binary_rsi_RegP_rdx_RegI",
/*  266 */  "_Binary_rdi_RegP_rdx_RegI",
/*  267 */  "_Binary_rsi_RegP_immI",
/*  268 */  "_Binary_rsi_RegP_rax_RegI",
/*  269 */  "_Binary_rdi_RegP_rsi_RegP",
/*  270 */  "_AndI_rRegI_immI",
/*  271 */  "_LoadP_memory_",
/*  272 */  "_LoadN_memory_",
/*  273 */  "_LoadNKlass_memory_",
/*  274 */  "_AndL_rRegL_immL32",
/*  275 */  "_AndL__CastP2X_rRegP___LoadL_memory_",
/*  276 */  "_AndL__LoadL_memory___CastP2X_rRegP_",
/*  277 */  "_AndI__LoadUB_memory__immU7",
/*  278 */  "_AndI__LoadB_memory__immI8",
/*  279 */  "_PartialSubtypeCheck_rsi_RegP_rax_RegP",
/*  280 */  "_LoadVector_memory_",
/*  281 */  "_Binary_vec_kReg",
/*  282 */  "_Binary_vec_vec",
/*  283 */  "_Binary_vec__Binary_vec_kReg",
/*  284 */  "_Binary_vec_rRegI",
/*  285 */  "_Binary_vec_rRegL",
/*  286 */  "_Binary_vec_regF",
/*  287 */  "_Binary_vec_regD",
/*  288 */  "_Binary_cmpOp_vcmppd_immI8",
/*  289 */  "_Binary_legVec_legVec",
/*  290 */  "_Binary_regD_immD",
/*  291 */  "_LShiftCntV_immI8_",
/*  292 */  "_RShiftCntV_immI8_",
/*  293 */  "_VectorTest_legVec_legVec",
/*  294 */  "_VectorTest_kReg_kReg",
/*  295 */  "_Binary_vec__LoadVector_memory_",
/*  296 */  "_MulAddVS2VI_vec_vec",
/*  297 */  "_Binary_vec_immU8",
/*  298 */  "_Binary__LoadVector_memory__immU8",
/*  299 */  "_VectorStoreMask_vec_immI",
/*  300 */  "_Binary_vec_immI8",
/*  301 */  "_Binary_vec__LShiftCntV_immI8_",
/*  302 */  "_Binary_vec__RShiftCntV_immI8_",
/*  303 */  "_Binary__LoadVector_memory__kReg",
/*  304 */  "_Binary_immI8_kReg",
/*  305 */  "_MaskAll_immI_M1_",
// last internally defined operand
/*  306 */  "storeSSI",
/*  307 */  "storeSSL",
/*  308 */  "storeSSP",
/*  309 */  "storeSSF",
/*  310 */  "storeSSD",
/*  311 */  "MoveF2VL",
/*  312 */  "MoveF2LEG",
/*  313 */  "MoveVL2F",
/*  314 */  "MoveLEG2F",
/*  315 */  "MoveD2VL",
/*  316 */  "MoveD2LEG",
/*  317 */  "MoveVL2D",
/*  318 */  "MoveLEG2D",
/*  319 */  "leaP8",
/*  320 */  "leaP32",
/*  321 */  "leaPIdxOff",
/*  322 */  "leaPIdxScale",
/*  323 */  "leaPPosIdxScale",
/*  324 */  "leaPIdxScaleOff",
/*  325 */  "leaPPosIdxOff",
/*  326 */  "leaPPosIdxScaleOff",
/*  327 */  "leaPCompressedOopOffset",
/*  328 */  "leaP8Narrow",
/*  329 */  "leaP32Narrow",
/*  330 */  "leaPIdxOffNarrow",
/*  331 */  "leaPIdxScaleNarrow",
/*  332 */  "leaPIdxScaleOffNarrow",
/*  333 */  "leaPPosIdxOffNarrow",
/*  334 */  "leaPPosIdxScaleOffNarrow",
/*  335 */  "loadConI",
/*  336 */  "loadConI0",
/*  337 */  "loadConL",
/*  338 */  "loadConL0",
/*  339 */  "loadConUL32",
/*  340 */  "loadConL32",
/*  341 */  "loadConP",
/*  342 */  "loadConP0",
/*  343 */  "loadConP31",
/*  344 */  "loadConF",
/*  345 */  "loadConN0",
/*  346 */  "loadConN",
/*  347 */  "loadConNKlass",
/*  348 */  "loadConF0",
/*  349 */  "loadConD",
/*  350 */  "loadConD0",
/*  351 */  "loadSSI",
/*  352 */  "loadSSL",
/*  353 */  "loadSSP",
/*  354 */  "loadSSF",
/*  355 */  "loadSSD",
/*  356 */  "MoveVec2Leg",
/*  357 */  "MoveLeg2Vec",
/*  358 */  "membar_volatile",
/*  359 */  "castX2P",
/*  360 */  "castP2X",
/*  361 */  "checkCastPP",
/*  362 */  "castPP",
/*  363 */  "castII",
/*  364 */  "castLL",
/*  365 */  "castFF",
/*  366 */  "castDD",
/*  367 */  "storePConditional",
/*  368 */  "storeIConditional",
/*  369 */  "storeLConditional",
/*  370 */  "cmpF_cc_reg",
/*  371 */  "cmpF_cc_reg_CF",
/*  372 */  "cmpF_cc_mem",
/*  373 */  "cmpF_cc_memCF",
/*  374 */  "cmpF_cc_imm",
/*  375 */  "cmpF_cc_immCF",
/*  376 */  "cmpD_cc_reg",
/*  377 */  "cmpD_cc_reg_CF",
/*  378 */  "cmpD_cc_mem",
/*  379 */  "cmpD_cc_memCF",
/*  380 */  "cmpD_cc_imm",
/*  381 */  "cmpD_cc_immCF",
/*  382 */  "MoveF2I_stack_reg",
/*  383 */  "MoveI2F_stack_reg",
/*  384 */  "MoveD2L_stack_reg",
/*  385 */  "MoveL2D_stack_reg_partial",
/*  386 */  "MoveL2D_stack_reg",
/*  387 */  "MoveF2I_reg_reg",
/*  388 */  "MoveD2L_reg_reg",
/*  389 */  "MoveI2F_reg_reg",
/*  390 */  "MoveL2D_reg_reg",
/*  391 */  "overflowAddI_rReg",
/*  392 */  "overflowAddI_rReg_imm",
/*  393 */  "overflowAddL_rReg",
/*  394 */  "overflowAddL_rReg_imm",
/*  395 */  "overflowSubI_rReg",
/*  396 */  "overflowSubI_rReg_imm",
/*  397 */  "overflowSubL_rReg",
/*  398 */  "overflowSubL_rReg_imm",
/*  399 */  "overflowNegI_rReg",
/*  400 */  "overflowNegL_rReg",
/*  401 */  "overflowMulI_rReg",
/*  402 */  "overflowMulI_rReg_imm",
/*  403 */  "overflowMulL_rReg",
/*  404 */  "overflowMulL_rReg_imm",
/*  405 */  "compI_rReg",
/*  406 */  "compI_rReg_imm",
/*  407 */  "compI_rReg_mem",
/*  408 */  "testI_reg",
/*  409 */  "testI_reg_imm",
/*  410 */  "testI_reg_mem",
/*  411 */  "testI_reg_mem_0",
/*  412 */  "compU_rReg",
/*  413 */  "compU_rReg_imm",
/*  414 */  "compU_rReg_mem",
/*  415 */  "testU_reg",
/*  416 */  "compP_rReg",
/*  417 */  "compP_rReg_mem",
/*  418 */  "compP_mem_rReg",
/*  419 */  "testP_reg",
/*  420 */  "testP_mem",
/*  421 */  "testP_mem_reg0",
/*  422 */  "compN_rReg",
/*  423 */  "compN_rReg_mem",
/*  424 */  "compN_rReg_imm",
/*  425 */  "compN_mem_imm",
/*  426 */  "compN_rReg_imm_klass",
/*  427 */  "compN_mem_imm_klass",
/*  428 */  "testN_reg",
/*  429 */  "testN_mem",
/*  430 */  "testN_mem_reg0",
/*  431 */  "compL_rReg",
/*  432 */  "compL_rReg_imm",
/*  433 */  "compL_rReg_mem",
/*  434 */  "testL_reg",
/*  435 */  "testL_reg_imm",
/*  436 */  "testL_reg_mem",
/*  437 */  "testL_reg_mem_0",
/*  438 */  "testL_reg_mem2",
/*  439 */  "testL_reg_mem2_0",
/*  440 */  "compUL_rReg",
/*  441 */  "compUL_rReg_imm",
/*  442 */  "compUL_rReg_mem",
/*  443 */  "testUL_reg",
/*  444 */  "compB_mem_imm",
/*  445 */  "testUB_mem_imm",
/*  446 */  "testB_mem_imm",
/*  447 */  "partialSubtypeCheck_vs_Zero",
/*  448 */  "cmpFastLockRTM",
/*  449 */  "cmpFastLock",
/*  450 */  "cmpFastUnlock",
/*  451 */  "tlsLoadP",
/*  452 */  "absF_reg",
/*  453 */  "absF_reg_reg",
/*  454 */  "absD_reg",
/*  455 */  "absD_reg_reg",
/*  456 */  "negF_reg",
/*  457 */  "negF_reg_reg",
/*  458 */  "negD_reg",
/*  459 */  "negD_reg_reg",
/*  460 */  "reinterpret_mask",
/*  461 */  "reinterpret",
/*  462 */  "vreinterpret_expand",
/*  463 */  "reinterpret_shrink",
/*  464 */  "vsqrtF_reg",
/*  465 */  "vsqrtF_mem",
/*  466 */  "vsqrtD_reg",
/*  467 */  "vsqrtD_mem",
/*  468 */  "vshiftcnt",
/*  469 */  "vshiftcnt_0",
/*  470 */  "vcastBtoX",
/*  471 */  "vcastStoX_evex",
/*  472 */  "vcastItoX_evex",
/*  473 */  "vcastLtoX_evex",
/*  474 */  "vcastFtoD_reg",
/*  475 */  "vcastDtoF_reg",
/*  476 */  "vabsB_reg",
/*  477 */  "vabsS_reg",
/*  478 */  "vabsI_reg",
/*  479 */  "vabsL_reg",
/*  480 */  "cmpvptest_anytrue_lt16",
/*  481 */  "cmpvptest_anytrue_ge16",
/*  482 */  "cmpvptest_anytrue_evex",
/*  483 */  "vmaskcast_evex",
/*  484 */  "vmaskcast",
/*  485 */  "loadShuffleB",
/*  486 */  "loadShuffleS_evex",
/*  487 */  "loadShuffleI_avx",
/*  488 */  "loadShuffleL_evex",
/*  489 */  "vpopcountI",
/*  490 */  "long_to_mask_evex",
/*  491 */  "castMM",
/*  492 */  "castVV",
/*  493 */  "castVVLeg",
/*  494 */  "loadB",
/*  495 */  "loadB2L",
/*  496 */  "loadUB",
/*  497 */  "loadUB2L",
/*  498 */  "loadUB2L_immI",
/*  499 */  "loadS",
/*  500 */  "loadS2B",
/*  501 */  "loadS2L",
/*  502 */  "loadUS",
/*  503 */  "loadUS2B",
/*  504 */  "loadUS2L",
/*  505 */  "loadUS2L_immI_255",
/*  506 */  "loadUS2L_immI",
/*  507 */  "loadI",
/*  508 */  "loadI2B",
/*  509 */  "loadI2UB",
/*  510 */  "loadI2S",
/*  511 */  "loadI2US",
/*  512 */  "loadI2L",
/*  513 */  "loadI2L_immI_255",
/*  514 */  "loadI2L_immI_65535",
/*  515 */  "loadI2L_immU31",
/*  516 */  "loadUI2L",
/*  517 */  "loadL",
/*  518 */  "loadRange",
/*  519 */  "loadP",
/*  520 */  "loadN",
/*  521 */  "loadKlass",
/*  522 */  "loadNKlass",
/*  523 */  "loadF",
/*  524 */  "loadD_partial",
/*  525 */  "loadD",
/*  526 */  "maxF_reg",
/*  527 */  "maxF_reduction_reg",
/*  528 */  "maxD_reg",
/*  529 */  "maxD_reduction_reg",
/*  530 */  "minF_reg",
/*  531 */  "minF_reduction_reg",
/*  532 */  "minD_reg",
/*  533 */  "minD_reduction_reg",
/*  534 */  "prefetchAlloc",
/*  535 */  "prefetchAllocNTA",
/*  536 */  "prefetchAllocT0",
/*  537 */  "prefetchAllocT2",
/*  538 */  "storeB",
/*  539 */  "storeC",
/*  540 */  "storeI",
/*  541 */  "storeL",
/*  542 */  "storeP",
/*  543 */  "storeImmP0",
/*  544 */  "storeImmP",
/*  545 */  "storeN",
/*  546 */  "storeNKlass",
/*  547 */  "storeImmN0",
/*  548 */  "storeImmN",
/*  549 */  "storeImmNKlass",
/*  550 */  "storeImmI0",
/*  551 */  "storeImmI",
/*  552 */  "storeImmL0",
/*  553 */  "storeImmL",
/*  554 */  "storeImmC0",
/*  555 */  "storeImmI16",
/*  556 */  "storeImmB0",
/*  557 */  "storeImmB",
/*  558 */  "storeImmCM0_reg",
/*  559 */  "storeImmCM0",
/*  560 */  "storeF",
/*  561 */  "storeF0",
/*  562 */  "storeF_imm",
/*  563 */  "storeD",
/*  564 */  "storeD0_imm",
/*  565 */  "storeD0",
/*  566 */  "cacheWB",
/*  567 */  "cacheWBPreSync",
/*  568 */  "cacheWBPostSync",
/*  569 */  "bytes_reverse_int",
/*  570 */  "bytes_reverse_long",
/*  571 */  "bytes_reverse_unsigned_short",
/*  572 */  "bytes_reverse_short",
/*  573 */  "countLeadingZerosI",
/*  574 */  "countLeadingZerosI_bsr",
/*  575 */  "countLeadingZerosL",
/*  576 */  "countLeadingZerosL_bsr",
/*  577 */  "countTrailingZerosI",
/*  578 */  "countTrailingZerosI_bsf",
/*  579 */  "countTrailingZerosL",
/*  580 */  "countTrailingZerosL_bsf",
/*  581 */  "popCountI",
/*  582 */  "popCountI_mem",
/*  583 */  "popCountL",
/*  584 */  "popCountL_mem",
/*  585 */  "membar_acquire",
/*  586 */  "membar_acquire_0",
/*  587 */  "membar_acquire_lock",
/*  588 */  "membar_release",
/*  589 */  "membar_release_0",
/*  590 */  "membar_release_lock",
/*  591 */  "unnecessary_membar_volatile",
/*  592 */  "membar_storestore",
/*  593 */  "membar_storestore_0",
/*  594 */  "convP2I",
/*  595 */  "convN2I",
/*  596 */  "encodeHeapOop",
/*  597 */  "encodeHeapOop_not_null",
/*  598 */  "decodeHeapOop",
/*  599 */  "decodeHeapOop_not_null",
/*  600 */  "encodeKlass_not_null",
/*  601 */  "decodeKlass_not_null",
/*  602 */  "jumpXtnd_offset",
/*  603 */  "jumpXtnd_addr",
/*  604 */  "jumpXtnd",
/*  605 */  "cmovI_reg",
/*  606 */  "cmovI_regU",
/*  607 */  "cmovI_regUCF",
/*  608 */  "cmovI_mem",
/*  609 */  "cmovI_memU",
/*  610 */  "cmovI_memUCF",
/*  611 */  "cmovN_reg",
/*  612 */  "cmovN_regU",
/*  613 */  "cmovN_regUCF",
/*  614 */  "cmovP_reg",
/*  615 */  "cmovP_regU",
/*  616 */  "cmovP_regUCF",
/*  617 */  "cmovL_reg",
/*  618 */  "cmovL_mem",
/*  619 */  "cmovL_regU",
/*  620 */  "cmovL_regUCF",
/*  621 */  "cmovL_memU",
/*  622 */  "cmovL_memUCF",
/*  623 */  "cmovF_reg",
/*  624 */  "cmovF_regU",
/*  625 */  "cmovF_regUCF",
/*  626 */  "cmovD_reg",
/*  627 */  "cmovD_regU",
/*  628 */  "cmovD_regUCF",
/*  629 */  "addI_rReg",
/*  630 */  "addI_rReg_imm",
/*  631 */  "addI_rReg_mem",
/*  632 */  "addI_rReg_mem_0",
/*  633 */  "addI_mem_rReg",
/*  634 */  "addI_mem_rReg_0",
/*  635 */  "addI_mem_imm",
/*  636 */  "incI_rReg",
/*  637 */  "incI_mem",
/*  638 */  "decI_rReg",
/*  639 */  "decI_mem",
/*  640 */  "leaI_rReg_immI",
/*  641 */  "addL_rReg",
/*  642 */  "addL_rReg_imm",
/*  643 */  "addL_rReg_mem",
/*  644 */  "addL_rReg_mem_0",
/*  645 */  "addL_mem_rReg",
/*  646 */  "addL_mem_rReg_0",
/*  647 */  "addL_mem_imm",
/*  648 */  "incL_rReg",
/*  649 */  "incL_mem",
/*  650 */  "decL_rReg",
/*  651 */  "decL_mem",
/*  652 */  "leaL_rReg_immL",
/*  653 */  "addP_rReg",
/*  654 */  "addP_rReg_imm",
/*  655 */  "leaP_rReg_imm",
/*  656 */  "loadPLocked",
/*  657 */  "compareAndSwapP",
/*  658 */  "compareAndSwapP_0",
/*  659 */  "compareAndSwapL",
/*  660 */  "compareAndSwapL_0",
/*  661 */  "compareAndSwapI",
/*  662 */  "compareAndSwapI_0",
/*  663 */  "compareAndSwapB",
/*  664 */  "compareAndSwapB_0",
/*  665 */  "compareAndSwapS",
/*  666 */  "compareAndSwapS_0",
/*  667 */  "compareAndSwapN",
/*  668 */  "compareAndSwapN_0",
/*  669 */  "compareAndExchangeB",
/*  670 */  "compareAndExchangeS",
/*  671 */  "compareAndExchangeI",
/*  672 */  "compareAndExchangeL",
/*  673 */  "compareAndExchangeN",
/*  674 */  "compareAndExchangeP",
/*  675 */  "xaddB_no_res",
/*  676 */  "xaddB",
/*  677 */  "xaddS_no_res",
/*  678 */  "xaddS",
/*  679 */  "xaddI_no_res",
/*  680 */  "xaddI",
/*  681 */  "xaddL_no_res",
/*  682 */  "xaddL",
/*  683 */  "xchgB",
/*  684 */  "xchgS",
/*  685 */  "xchgI",
/*  686 */  "xchgL",
/*  687 */  "xchgP",
/*  688 */  "xchgN",
/*  689 */  "absI_rReg",
/*  690 */  "absL_rReg",
/*  691 */  "subI_rReg",
/*  692 */  "subI_rReg_imm",
/*  693 */  "subI_rReg_mem",
/*  694 */  "subI_mem_rReg",
/*  695 */  "subI_mem_imm",
/*  696 */  "subL_rReg",
/*  697 */  "subL_rReg_imm",
/*  698 */  "subL_rReg_mem",
/*  699 */  "subL_mem_rReg",
/*  700 */  "subL_mem_imm",
/*  701 */  "subP_rReg",
/*  702 */  "negI_rReg",
/*  703 */  "negI_rReg_2",
/*  704 */  "negI_mem",
/*  705 */  "negL_rReg",
/*  706 */  "negL_rReg_2",
/*  707 */  "negL_mem",
/*  708 */  "mulI_rReg",
/*  709 */  "mulI_rReg_imm",
/*  710 */  "mulI_mem",
/*  711 */  "mulI_mem_0",
/*  712 */  "mulI_mem_imm",
/*  713 */  "mulAddS2I_rReg",
/*  714 */  "mulL_rReg",
/*  715 */  "mulL_rReg_imm",
/*  716 */  "mulL_mem",
/*  717 */  "mulL_mem_0",
/*  718 */  "mulL_mem_imm",
/*  719 */  "mulHiL_rReg",
/*  720 */  "umulHiL_rReg",
/*  721 */  "divI_rReg",
/*  722 */  "divL_rReg",
/*  723 */  "divModI_rReg_divmod",
/*  724 */  "divModL_rReg_divmod",
/*  725 */  "loadConL_0x6666666666666667",
/*  726 */  "mul_hi",
/*  727 */  "sarL_rReg_63",
/*  728 */  "sarL_rReg_2",
/*  729 */  "divL_10",
/*  730 */  "modI_rReg",
/*  731 */  "modL_rReg",
/*  732 */  "salI_rReg_1",
/*  733 */  "salI_mem_1",
/*  734 */  "salI_rReg_imm",
/*  735 */  "salI_mem_imm",
/*  736 */  "salI_rReg_CL",
/*  737 */  "salI_mem_CL",
/*  738 */  "sarI_rReg_1",
/*  739 */  "sarI_mem_1",
/*  740 */  "sarI_rReg_imm",
/*  741 */  "sarI_mem_imm",
/*  742 */  "sarI_rReg_CL",
/*  743 */  "sarI_mem_CL",
/*  744 */  "shrI_rReg_1",
/*  745 */  "shrI_mem_1",
/*  746 */  "shrI_rReg_imm",
/*  747 */  "shrI_mem_imm",
/*  748 */  "shrI_rReg_CL",
/*  749 */  "shrI_mem_CL",
/*  750 */  "salL_rReg_1",
/*  751 */  "salL_mem_1",
/*  752 */  "salL_rReg_imm",
/*  753 */  "salL_mem_imm",
/*  754 */  "salL_rReg_CL",
/*  755 */  "salL_mem_CL",
/*  756 */  "sarL_rReg_1",
/*  757 */  "sarL_mem_1",
/*  758 */  "sarL_rReg_imm",
/*  759 */  "sarL_mem_imm",
/*  760 */  "sarL_rReg_CL",
/*  761 */  "sarL_mem_CL",
/*  762 */  "shrL_rReg_1",
/*  763 */  "shrL_mem_1",
/*  764 */  "shrL_rReg_imm",
/*  765 */  "shrL_mem_imm",
/*  766 */  "shrL_rReg_CL",
/*  767 */  "shrL_mem_CL",
/*  768 */  "i2b",
/*  769 */  "i2s",
/*  770 */  "rolI_imm",
/*  771 */  "rolI_rReg_Var",
/*  772 */  "rorI_immI8_legacy",
/*  773 */  "rorI_immI8",
/*  774 */  "rorI_rReg_Var",
/*  775 */  "rolL_immI8",
/*  776 */  "rolL_rReg_Var",
/*  777 */  "rorL_immI8_legacy",
/*  778 */  "rorL_immI8",
/*  779 */  "rorL_rReg_Var",
/*  780 */  "andI_rReg",
/*  781 */  "andI_rReg_imm255",
/*  782 */  "andI2L_rReg_imm255",
/*  783 */  "andI_rReg_imm65535",
/*  784 */  "andI2L_rReg_imm65535",
/*  785 */  "convI2LAndI_reg_immIbitmask",
/*  786 */  "andI_rReg_imm",
/*  787 */  "andI_rReg_mem",
/*  788 */  "andI_rReg_mem_0",
/*  789 */  "andB_mem_rReg",
/*  790 */  "andB_mem_rReg_0",
/*  791 */  "andI_mem_rReg",
/*  792 */  "andI_mem_rReg_0",
/*  793 */  "andI_mem_imm",
/*  794 */  "andnI_rReg_rReg_mem",
/*  795 */  "andnI_rReg_rReg_mem_0",
/*  796 */  "andnI_rReg_rReg_rReg",
/*  797 */  "andnI_rReg_rReg_rReg_0",
/*  798 */  "blsiI_rReg_rReg",
/*  799 */  "blsiI_rReg_rReg_0",
/*  800 */  "blsiI_rReg_mem",
/*  801 */  "blsiI_rReg_mem_0",
/*  802 */  "blsmskI_rReg_mem",
/*  803 */  "blsmskI_rReg_mem_0",
/*  804 */  "blsmskI_rReg_rReg",
/*  805 */  "blsmskI_rReg_rReg_0",
/*  806 */  "blsrI_rReg_rReg",
/*  807 */  "blsrI_rReg_rReg_0",
/*  808 */  "blsrI_rReg_mem",
/*  809 */  "blsrI_rReg_mem_0",
/*  810 */  "orI_rReg",
/*  811 */  "orI_rReg_imm",
/*  812 */  "orI_rReg_mem",
/*  813 */  "orI_rReg_mem_0",
/*  814 */  "orB_mem_rReg",
/*  815 */  "orB_mem_rReg_0",
/*  816 */  "orI_mem_rReg",
/*  817 */  "orI_mem_rReg_0",
/*  818 */  "orI_mem_imm",
/*  819 */  "xorI_rReg",
/*  820 */  "xorI_rReg_im1",
/*  821 */  "xorI_rReg_imm",
/*  822 */  "xorI_rReg_mem",
/*  823 */  "xorI_rReg_mem_0",
/*  824 */  "xorB_mem_rReg",
/*  825 */  "xorB_mem_rReg_0",
/*  826 */  "xorI_mem_rReg",
/*  827 */  "xorI_mem_rReg_0",
/*  828 */  "xorI_mem_imm",
/*  829 */  "andL_rReg",
/*  830 */  "andL_rReg_imm255",
/*  831 */  "andL_rReg_imm65535",
/*  832 */  "andL_rReg_imm",
/*  833 */  "andL_rReg_mem",
/*  834 */  "andL_rReg_mem_0",
/*  835 */  "andL_mem_rReg",
/*  836 */  "andL_mem_rReg_0",
/*  837 */  "andL_mem_imm",
/*  838 */  "btrL_mem_imm",
/*  839 */  "andnL_rReg_rReg_mem",
/*  840 */  "andnL_rReg_rReg_mem_0",
/*  841 */  "andnL_rReg_rReg_rReg",
/*  842 */  "andnL_rReg_rReg_rReg_0",
/*  843 */  "blsiL_rReg_rReg",
/*  844 */  "blsiL_rReg_rReg_0",
/*  845 */  "blsiL_rReg_mem",
/*  846 */  "blsiL_rReg_mem_0",
/*  847 */  "blsmskL_rReg_mem",
/*  848 */  "blsmskL_rReg_mem_0",
/*  849 */  "blsmskL_rReg_rReg",
/*  850 */  "blsmskL_rReg_rReg_0",
/*  851 */  "blsrL_rReg_rReg",
/*  852 */  "blsrL_rReg_rReg_0",
/*  853 */  "blsrL_rReg_mem",
/*  854 */  "blsrL_rReg_mem_0",
/*  855 */  "orL_rReg",
/*  856 */  "orL_rReg_castP2X",
/*  857 */  "orL_rReg_castP2X_0",
/*  858 */  "orL_rReg_imm",
/*  859 */  "orL_rReg_mem",
/*  860 */  "orL_rReg_mem_0",
/*  861 */  "orL_mem_rReg",
/*  862 */  "orL_mem_rReg_0",
/*  863 */  "orL_mem_imm",
/*  864 */  "btsL_mem_imm",
/*  865 */  "xorL_rReg",
/*  866 */  "xorL_rReg_im1",
/*  867 */  "xorL_rReg_imm",
/*  868 */  "xorL_rReg_mem",
/*  869 */  "xorL_rReg_mem_0",
/*  870 */  "xorL_mem_rReg",
/*  871 */  "xorL_mem_rReg_0",
/*  872 */  "xorL_mem_imm",
/*  873 */  "convI2B",
/*  874 */  "convP2B",
/*  875 */  "cmpLTMask",
/*  876 */  "cmpLTMask0",
/*  877 */  "cadd_cmpLTMask",
/*  878 */  "cadd_cmpLTMask_1",
/*  879 */  "cadd_cmpLTMask_0",
/*  880 */  "cadd_cmpLTMask_2",
/*  881 */  "and_cmpLTMask",
/*  882 */  "and_cmpLTMask_0",
/*  883 */  "cmpF_reg",
/*  884 */  "cmpF_mem",
/*  885 */  "cmpF_imm",
/*  886 */  "cmpD_reg",
/*  887 */  "cmpD_mem",
/*  888 */  "cmpD_imm",
/*  889 */  "convF2D_reg_reg",
/*  890 */  "convF2D_reg_mem",
/*  891 */  "convD2F_reg_reg",
/*  892 */  "convD2F_reg_mem",
/*  893 */  "convF2I_reg_reg",
/*  894 */  "convF2L_reg_reg",
/*  895 */  "convD2I_reg_reg",
/*  896 */  "convD2L_reg_reg",
/*  897 */  "convI2F_reg_reg",
/*  898 */  "convI2F_reg_mem",
/*  899 */  "convI2D_reg_reg",
/*  900 */  "convI2D_reg_mem",
/*  901 */  "convXI2F_reg",
/*  902 */  "convXI2D_reg",
/*  903 */  "convL2F_reg_reg",
/*  904 */  "convL2F_reg_mem",
/*  905 */  "convL2D_reg_reg",
/*  906 */  "convL2D_reg_mem",
/*  907 */  "convI2L_reg_reg",
/*  908 */  "convI2L_reg_reg_zex",
/*  909 */  "convI2L_reg_mem_zex",
/*  910 */  "zerox_long_reg_reg",
/*  911 */  "convL2I_reg_reg",
/*  912 */  "MoveF2I_reg_stack",
/*  913 */  "MoveI2F_reg_stack",
/*  914 */  "MoveD2L_reg_stack",
/*  915 */  "MoveL2D_reg_stack",
/*  916 */  "rep_stos",
/*  917 */  "rep_stos_evex",
/*  918 */  "rep_stos_large",
/*  919 */  "rep_stos_large_evex",
/*  920 */  "rep_stos_im",
/*  921 */  "string_compareL",
/*  922 */  "string_compareL_evex",
/*  923 */  "string_compareU",
/*  924 */  "string_compareU_evex",
/*  925 */  "string_compareLU",
/*  926 */  "string_compareLU_evex",
/*  927 */  "string_compareUL",
/*  928 */  "string_compareUL_evex",
/*  929 */  "string_indexof_conL",
/*  930 */  "string_indexof_conU",
/*  931 */  "string_indexof_conUL",
/*  932 */  "string_indexofL",
/*  933 */  "string_indexofU",
/*  934 */  "string_indexofUL",
/*  935 */  "string_indexof_char",
/*  936 */  "stringL_indexof_char",
/*  937 */  "string_equals",
/*  938 */  "string_equals_evex",
/*  939 */  "array_equalsB",
/*  940 */  "array_equalsB_evex",
/*  941 */  "array_equalsC",
/*  942 */  "array_equalsC_evex",
/*  943 */  "has_negatives",
/*  944 */  "has_negatives_evex",
/*  945 */  "string_compress",
/*  946 */  "string_compress_evex",
/*  947 */  "string_inflate",
/*  948 */  "string_inflate_evex",
/*  949 */  "encode_iso_array",
/*  950 */  "encode_ascii_array",
/*  951 */  "cmpL3_reg_reg",
/*  952 */  "cmovI_reg_g",
/*  953 */  "minI_rReg",
/*  954 */  "cmovI_reg_l",
/*  955 */  "maxI_rReg",
/*  956 */  "jmpDir",
/*  957 */  "jmpCon",
/*  958 */  "jmpLoopEnd",
/*  959 */  "jmpLoopEndU",
/*  960 */  "jmpLoopEndUCF",
/*  961 */  "jmpLoopEnd_and_restoreMask",
/*  962 */  "jmpLoopEndU_and_restoreMask",
/*  963 */  "jmpLoopEndUCF_and_restoreMask",
/*  964 */  "jmpConU",
/*  965 */  "jmpConUCF",
/*  966 */  "jmpConUCF2",
/*  967 */  "partialSubtypeCheck",
/*  968 */  "jmpDir_short",
/*  969 */  "jmpCon_short",
/*  970 */  "jmpLoopEnd_short",
/*  971 */  "jmpLoopEndU_short",
/*  972 */  "jmpLoopEndUCF_short",
/*  973 */  "jmpConU_short",
/*  974 */  "jmpConUCF_short",
/*  975 */  "jmpConUCF2_short",
/*  976 */  "safePoint_poll_tls",
/*  977 */  "CallStaticJavaDirect",
/*  978 */  "CallDynamicJavaDirect",
/*  979 */  "CallRuntimeDirect",
/*  980 */  "CallLeafDirect",
/*  981 */  "CallLeafDirectVector",
/*  982 */  "CallNativeDirect",
/*  983 */  "CallLeafNoFPDirect",
/*  984 */  "Ret",
/*  985 */  "TailCalljmpInd",
/*  986 */  "tailjmpInd",
/*  987 */  "CreateException",
/*  988 */  "RethrowException",
/*  989 */  "ShouldNotReachHere",
/*  990 */  "setMask",
/*  991 */  "addF_reg",
/*  992 */  "addF_mem",
/*  993 */  "addF_mem_0",
/*  994 */  "addF_imm",
/*  995 */  "addF_reg_reg",
/*  996 */  "addF_reg_mem",
/*  997 */  "addF_reg_mem_0",
/*  998 */  "addF_reg_imm",
/*  999 */  "addD_reg",
/* 1000 */  "addD_mem",
/* 1001 */  "addD_mem_0",
/* 1002 */  "addD_imm",
/* 1003 */  "addD_reg_reg",
/* 1004 */  "addD_reg_mem",
/* 1005 */  "addD_reg_mem_0",
/* 1006 */  "addD_reg_imm",
/* 1007 */  "subF_reg",
/* 1008 */  "subF_mem",
/* 1009 */  "subF_imm",
/* 1010 */  "subF_reg_reg",
/* 1011 */  "subF_reg_mem",
/* 1012 */  "subF_reg_imm",
/* 1013 */  "subD_reg",
/* 1014 */  "subD_mem",
/* 1015 */  "subD_imm",
/* 1016 */  "subD_reg_reg",
/* 1017 */  "subD_reg_mem",
/* 1018 */  "subD_reg_imm",
/* 1019 */  "mulF_reg",
/* 1020 */  "mulF_mem",
/* 1021 */  "mulF_mem_0",
/* 1022 */  "mulF_imm",
/* 1023 */  "mulF_reg_reg",
/* 1024 */  "mulF_reg_mem",
/* 1025 */  "mulF_reg_mem_0",
/* 1026 */  "mulF_reg_imm",
/* 1027 */  "mulD_reg",
/* 1028 */  "mulD_mem",
/* 1029 */  "mulD_mem_0",
/* 1030 */  "mulD_imm",
/* 1031 */  "mulD_reg_reg",
/* 1032 */  "mulD_reg_mem",
/* 1033 */  "mulD_reg_mem_0",
/* 1034 */  "mulD_reg_imm",
/* 1035 */  "divF_reg",
/* 1036 */  "divF_mem",
/* 1037 */  "divF_imm",
/* 1038 */  "divF_reg_reg",
/* 1039 */  "divF_reg_mem",
/* 1040 */  "divF_reg_imm",
/* 1041 */  "divD_reg",
/* 1042 */  "divD_mem",
/* 1043 */  "divD_imm",
/* 1044 */  "divD_reg_reg",
/* 1045 */  "divD_reg_mem",
/* 1046 */  "divD_reg_imm",
/* 1047 */  "sqrtF_reg",
/* 1048 */  "sqrtD_reg",
/* 1049 */  "reinterpret_mask_W2B",
/* 1050 */  "reinterpret_mask_D2B",
/* 1051 */  "reinterpret_mask_Q2B",
/* 1052 */  "reinterpret_expand",
/* 1053 */  "vreinterpret_expand4",
/* 1054 */  "roundD_reg",
/* 1055 */  "roundD_mem",
/* 1056 */  "roundD_imm",
/* 1057 */  "vroundD_reg",
/* 1058 */  "vround8D_reg",
/* 1059 */  "vroundD_mem",
/* 1060 */  "vround8D_mem",
/* 1061 */  "onspinwait",
/* 1062 */  "fmaD_reg",
/* 1063 */  "fmaF_reg",
/* 1064 */  "loadV",
/* 1065 */  "storeV",
/* 1066 */  "gather",
/* 1067 */  "evgather",
/* 1068 */  "evgather_masked",
/* 1069 */  "scatter",
/* 1070 */  "scatter_masked",
/* 1071 */  "ReplB_reg",
/* 1072 */  "ReplB_mem",
/* 1073 */  "ReplB_imm",
/* 1074 */  "ReplB_zero",
/* 1075 */  "ReplS_reg",
/* 1076 */  "ReplS_mem",
/* 1077 */  "ReplS_imm",
/* 1078 */  "ReplS_zero",
/* 1079 */  "ReplI_reg",
/* 1080 */  "ReplI_mem",
/* 1081 */  "ReplI_imm",
/* 1082 */  "ReplI_zero",
/* 1083 */  "ReplI_M1",
/* 1084 */  "ReplI_M1_0",
/* 1085 */  "ReplI_M1_1",
/* 1086 */  "ReplL_reg",
/* 1087 */  "ReplL_mem",
/* 1088 */  "ReplL_imm",
/* 1089 */  "ReplL_zero",
/* 1090 */  "ReplL_M1",
/* 1091 */  "ReplF_reg",
/* 1092 */  "ReplF_mem",
/* 1093 */  "ReplF_zero",
/* 1094 */  "ReplD_reg",
/* 1095 */  "ReplD_mem",
/* 1096 */  "ReplD_zero",
/* 1097 */  "insert",
/* 1098 */  "insert32",
/* 1099 */  "insert64",
/* 1100 */  "insert2L",
/* 1101 */  "insert4L",
/* 1102 */  "insert8L",
/* 1103 */  "insertF",
/* 1104 */  "vinsertF",
/* 1105 */  "insert2D",
/* 1106 */  "insert4D",
/* 1107 */  "insert8D",
/* 1108 */  "reductionI",
/* 1109 */  "reductionI_0",
/* 1110 */  "reductionI_1",
/* 1111 */  "reductionI_2",
/* 1112 */  "reductionI_3",
/* 1113 */  "reductionI_4",
/* 1114 */  "reductionI_5",
/* 1115 */  "reductionL",
/* 1116 */  "reductionL_0",
/* 1117 */  "reductionL_1",
/* 1118 */  "reductionL_2",
/* 1119 */  "reductionL_3",
/* 1120 */  "reductionL_4",
/* 1121 */  "reductionL_5",
/* 1122 */  "reductionL_avx512dq",
/* 1123 */  "reductionL_avx512dq_0",
/* 1124 */  "reductionL_avx512dq_1",
/* 1125 */  "reductionL_avx512dq_2",
/* 1126 */  "reductionL_avx512dq_3",
/* 1127 */  "reductionL_avx512dq_4",
/* 1128 */  "reductionL_avx512dq_5",
/* 1129 */  "reductionF128",
/* 1130 */  "reductionF128_0",
/* 1131 */  "reduction8F",
/* 1132 */  "reduction8F_0",
/* 1133 */  "reduction16F",
/* 1134 */  "reduction16F_0",
/* 1135 */  "reduction2D",
/* 1136 */  "reduction2D_0",
/* 1137 */  "reduction4D",
/* 1138 */  "reduction4D_0",
/* 1139 */  "reduction8D",
/* 1140 */  "reduction8D_0",
/* 1141 */  "reductionB",
/* 1142 */  "reductionB_0",
/* 1143 */  "reductionB_1",
/* 1144 */  "reductionB_2",
/* 1145 */  "reductionB_3",
/* 1146 */  "reductionB_4",
/* 1147 */  "reductionB_avx512bw",
/* 1148 */  "reductionB_avx512bw_0",
/* 1149 */  "reductionB_avx512bw_1",
/* 1150 */  "reductionB_avx512bw_2",
/* 1151 */  "reductionB_avx512bw_3",
/* 1152 */  "reductionB_avx512bw_4",
/* 1153 */  "reductionS",
/* 1154 */  "reductionS_0",
/* 1155 */  "reductionS_1",
/* 1156 */  "reductionS_2",
/* 1157 */  "reductionS_3",
/* 1158 */  "reductionS_4",
/* 1159 */  "reductionS_5",
/* 1160 */  "mul_reductionB",
/* 1161 */  "mul_reduction64B",
/* 1162 */  "minmax_reduction2F",
/* 1163 */  "minmax_reduction2F_0",
/* 1164 */  "minmax_reductionF",
/* 1165 */  "minmax_reductionF_0",
/* 1166 */  "minmax_reduction2F_av",
/* 1167 */  "minmax_reduction2F_av_0",
/* 1168 */  "minmax_reductionF_av",
/* 1169 */  "minmax_reductionF_av_0",
/* 1170 */  "minmax_reduction2D",
/* 1171 */  "minmax_reduction2D_0",
/* 1172 */  "minmax_reductionD",
/* 1173 */  "minmax_reductionD_0",
/* 1174 */  "minmax_reduction2D_av",
/* 1175 */  "minmax_reduction2D_av_0",
/* 1176 */  "minmax_reductionD_av",
/* 1177 */  "minmax_reductionD_av_0",
/* 1178 */  "vaddB",
/* 1179 */  "vaddB_reg",
/* 1180 */  "vaddB_mem",
/* 1181 */  "vaddB_mem_0",
/* 1182 */  "vaddS",
/* 1183 */  "vaddS_reg",
/* 1184 */  "vaddS_mem",
/* 1185 */  "vaddS_mem_0",
/* 1186 */  "vaddI",
/* 1187 */  "vaddI_reg",
/* 1188 */  "vaddI_mem",
/* 1189 */  "vaddI_mem_0",
/* 1190 */  "vaddL",
/* 1191 */  "vaddL_reg",
/* 1192 */  "vaddL_mem",
/* 1193 */  "vaddL_mem_0",
/* 1194 */  "vaddF",
/* 1195 */  "vaddF_reg",
/* 1196 */  "vaddF_mem",
/* 1197 */  "vaddF_mem_0",
/* 1198 */  "vaddD",
/* 1199 */  "vaddD_reg",
/* 1200 */  "vaddD_mem",
/* 1201 */  "vaddD_mem_0",
/* 1202 */  "vsubB",
/* 1203 */  "vsubB_reg",
/* 1204 */  "vsubB_mem",
/* 1205 */  "vsubS",
/* 1206 */  "vsubS_reg",
/* 1207 */  "vsubS_mem",
/* 1208 */  "vsubI",
/* 1209 */  "vsubI_reg",
/* 1210 */  "vsubI_mem",
/* 1211 */  "vsubL",
/* 1212 */  "vsubL_reg",
/* 1213 */  "vsubL_mem",
/* 1214 */  "vsubF",
/* 1215 */  "vsubF_reg",
/* 1216 */  "vsubF_mem",
/* 1217 */  "vsubD",
/* 1218 */  "vsubD_reg",
/* 1219 */  "vsubD_mem",
/* 1220 */  "mulB_reg",
/* 1221 */  "mul16B_reg",
/* 1222 */  "vmul16B_reg_avx",
/* 1223 */  "vmul32B_reg_avx",
/* 1224 */  "vmul64B_reg_avx",
/* 1225 */  "vmulS",
/* 1226 */  "vmulS_reg",
/* 1227 */  "vmulS_mem",
/* 1228 */  "vmulS_mem_0",
/* 1229 */  "vmulI",
/* 1230 */  "vmulI_reg",
/* 1231 */  "vmulI_mem",
/* 1232 */  "vmulI_mem_0",
/* 1233 */  "vmulL_reg",
/* 1234 */  "vmulL_mem",
/* 1235 */  "vmulL_mem_0",
/* 1236 */  "mul2L_reg",
/* 1237 */  "vmul4L_reg_avx",
/* 1238 */  "vmulF",
/* 1239 */  "vmulF_reg",
/* 1240 */  "vmulF_mem",
/* 1241 */  "vmulF_mem_0",
/* 1242 */  "vmulD",
/* 1243 */  "vmulD_reg",
/* 1244 */  "vmulD_mem",
/* 1245 */  "vmulD_mem_0",
/* 1246 */  "vcmov8F_reg",
/* 1247 */  "vcmov4D_reg",
/* 1248 */  "vdivF",
/* 1249 */  "vdivF_reg",
/* 1250 */  "vdivF_mem",
/* 1251 */  "vdivD",
/* 1252 */  "vdivD_reg",
/* 1253 */  "vdivD_mem",
/* 1254 */  "minmax_reg_sse",
/* 1255 */  "minmax_reg_sse_0",
/* 1256 */  "vminmax_reg",
/* 1257 */  "vminmax_reg_0",
/* 1258 */  "minmaxL_reg_sse",
/* 1259 */  "minmaxL_reg_sse_0",
/* 1260 */  "vminmaxL_reg_avx",
/* 1261 */  "vminmaxL_reg_avx_0",
/* 1262 */  "vminmaxL_reg_evex",
/* 1263 */  "vminmaxL_reg_evex_0",
/* 1264 */  "minmaxFP_reg",
/* 1265 */  "minmaxFP_reg_0",
/* 1266 */  "evminmaxFP_reg_eavx",
/* 1267 */  "evminmaxFP_reg_eavx_0",
/* 1268 */  "signumF_reg",
/* 1269 */  "signumD_reg",
/* 1270 */  "copySignF_reg",
/* 1271 */  "copySignD_imm",
/* 1272 */  "vshiftB",
/* 1273 */  "vshiftB_0",
/* 1274 */  "vshiftB_1",
/* 1275 */  "vshift16B",
/* 1276 */  "vshift16B_0",
/* 1277 */  "vshift16B_1",
/* 1278 */  "vshift16B_avx",
/* 1279 */  "vshift16B_avx_0",
/* 1280 */  "vshift16B_avx_1",
/* 1281 */  "vshift32B_avx",
/* 1282 */  "vshift32B_avx_0",
/* 1283 */  "vshift32B_avx_1",
/* 1284 */  "vshift64B_avx",
/* 1285 */  "vshift64B_avx_0",
/* 1286 */  "vshift64B_avx_1",
/* 1287 */  "vshiftS",
/* 1288 */  "vshiftS_0",
/* 1289 */  "vshiftS_1",
/* 1290 */  "vshiftI",
/* 1291 */  "vshiftI_0",
/* 1292 */  "vshiftI_1",
/* 1293 */  "vshiftI_imm",
/* 1294 */  "vshiftI_imm_0",
/* 1295 */  "vshiftI_imm_1",
/* 1296 */  "vshiftL",
/* 1297 */  "vshiftL_0",
/* 1298 */  "vshiftL_imm",
/* 1299 */  "vshiftL_imm_0",
/* 1300 */  "vshiftL_arith_reg",
/* 1301 */  "vshiftL_arith_reg_evex",
/* 1302 */  "vshift8B_var_nobw",
/* 1303 */  "vshift8B_var_nobw_0",
/* 1304 */  "vshift8B_var_nobw_1",
/* 1305 */  "vshift16B_var_nobw",
/* 1306 */  "vshift16B_var_nobw_0",
/* 1307 */  "vshift16B_var_nobw_1",
/* 1308 */  "vshift32B_var_nobw",
/* 1309 */  "vshift32B_var_nobw_0",
/* 1310 */  "vshift32B_var_nobw_1",
/* 1311 */  "vshiftB_var_evex_bw",
/* 1312 */  "vshiftB_var_evex_bw_0",
/* 1313 */  "vshiftB_var_evex_bw_1",
/* 1314 */  "vshift64B_var_evex_bw",
/* 1315 */  "vshift64B_var_evex_bw_0",
/* 1316 */  "vshift64B_var_evex_bw_1",
/* 1317 */  "vshift8S_var_nobw",
/* 1318 */  "vshift8S_var_nobw_0",
/* 1319 */  "vshift8S_var_nobw_1",
/* 1320 */  "vshift16S_var_nobw",
/* 1321 */  "vshift16S_var_nobw_0",
/* 1322 */  "vshift16S_var_nobw_1",
/* 1323 */  "vshift16S_var_evex_bw",
/* 1324 */  "vshift16S_var_evex_bw_0",
/* 1325 */  "vshift16S_var_evex_bw_1",
/* 1326 */  "vshiftI_var",
/* 1327 */  "vshiftI_var_0",
/* 1328 */  "vshiftI_var_1",
/* 1329 */  "vshiftL_var",
/* 1330 */  "vshiftL_var_0",
/* 1331 */  "vshiftL_arith_var",
/* 1332 */  "vshiftL_arith_var_evex",
/* 1333 */  "vand",
/* 1334 */  "vand_reg",
/* 1335 */  "vand_mem",
/* 1336 */  "vand_mem_0",
/* 1337 */  "vor",
/* 1338 */  "vor_reg",
/* 1339 */  "vor_mem",
/* 1340 */  "vor_mem_0",
/* 1341 */  "vxor",
/* 1342 */  "vxor_reg",
/* 1343 */  "vxor_mem",
/* 1344 */  "vxor_mem_0",
/* 1345 */  "castStoX",
/* 1346 */  "vcastStoX",
/* 1347 */  "castItoX",
/* 1348 */  "vcastItoX",
/* 1349 */  "vcastLtoBS",
/* 1350 */  "vcastFtoI_reg_avx",
/* 1351 */  "vcastFtoI_reg_evex",
/* 1352 */  "vcastDtoL_reg_evex",
/* 1353 */  "vcmpFD",
/* 1354 */  "evcmpFD64",
/* 1355 */  "evcmpFD",
/* 1356 */  "vcmp",
/* 1357 */  "vcmpu",
/* 1358 */  "vcmpu32",
/* 1359 */  "vcmpu64",
/* 1360 */  "evcmp",
/* 1361 */  "extractI",
/* 1362 */  "extractI_0",
/* 1363 */  "extractI_1",
/* 1364 */  "vextractI",
/* 1365 */  "vextractI_0",
/* 1366 */  "vextractI_1",
/* 1367 */  "extractL",
/* 1368 */  "vextractL",
/* 1369 */  "extractF",
/* 1370 */  "vextractF",
/* 1371 */  "extractD",
/* 1372 */  "vextractD",
/* 1373 */  "blendvp",
/* 1374 */  "vblendvpI",
/* 1375 */  "vblendvpFD",
/* 1376 */  "evblendvp64",
/* 1377 */  "evblendvp64_masked",
/* 1378 */  "vabsnegF",
/* 1379 */  "vabsnegF_0",
/* 1380 */  "vabsneg4F",
/* 1381 */  "vabsneg4F_0",
/* 1382 */  "vabsnegD",
/* 1383 */  "vabsnegD_0",
/* 1384 */  "vptest_alltrue_lt16",
/* 1385 */  "vptest_alltrue_ge16",
/* 1386 */  "vptest_alltrue_lt8_evex",
/* 1387 */  "vptest_alltrue_ge8_evex",
/* 1388 */  "vptest_anytrue_lt16",
/* 1389 */  "vptest_anytrue_ge16",
/* 1390 */  "vptest_anytrue_evex",
/* 1391 */  "loadMask",
/* 1392 */  "loadMask64",
/* 1393 */  "loadMask_evex",
/* 1394 */  "vstoreMask1B",
/* 1395 */  "vstoreMask2B",
/* 1396 */  "vstoreMask4B",
/* 1397 */  "storeMask8B",
/* 1398 */  "storeMask8B_avx",
/* 1399 */  "vstoreMask4B_evex_novectmask",
/* 1400 */  "vstoreMask8B_evex_novectmask",
/* 1401 */  "vstoreMask_evex_vectmask",
/* 1402 */  "vstoreMask_evex",
/* 1403 */  "loadIotaIndices",
/* 1404 */  "rearrangeB",
/* 1405 */  "rearrangeB_avx",
/* 1406 */  "rearrangeB_evex",
/* 1407 */  "loadShuffleS",
/* 1408 */  "rearrangeS",
/* 1409 */  "rearrangeS_avx",
/* 1410 */  "rearrangeS_evex",
/* 1411 */  "loadShuffleI",
/* 1412 */  "rearrangeI",
/* 1413 */  "rearrangeI_avx",
/* 1414 */  "loadShuffleL",
/* 1415 */  "rearrangeL",
/* 1416 */  "rearrangeL_evex",
/* 1417 */  "vfmaF_reg",
/* 1418 */  "vfmaF_mem",
/* 1419 */  "vfmaD_reg",
/* 1420 */  "vfmaD_mem",
/* 1421 */  "vmuladdS2I_reg_sse",
/* 1422 */  "vmuladdS2I_reg_avx",
/* 1423 */  "vmuladdaddS2I_reg",
/* 1424 */  "vmuladdaddS2I_reg_0",
/* 1425 */  "vpternlog",
/* 1426 */  "vpternlog_mem",
/* 1427 */  "vprotate_immI8",
/* 1428 */  "vprotate_immI8_0",
/* 1429 */  "vprorate",
/* 1430 */  "vprorate_0",
/* 1431 */  "vmask_cmp_node",
/* 1432 */  "vmasked_load64",
/* 1433 */  "vmask_gen",
/* 1434 */  "vmask_gen_imm",
/* 1435 */  "vmasked_store64",
/* 1436 */  "vmask_tolong_evex",
/* 1437 */  "vmask_tolong_bool",
/* 1438 */  "vmask_tolong_avx",
/* 1439 */  "vmask_truecount_evex",
/* 1440 */  "vmask_truecount_bool",
/* 1441 */  "vmask_truecount_avx",
/* 1442 */  "vmask_first_or_last_true_evex",
/* 1443 */  "vmask_first_or_last_true_evex_0",
/* 1444 */  "vmask_first_or_last_true_bool",
/* 1445 */  "vmask_first_or_last_true_bool_0",
/* 1446 */  "vmask_first_or_last_true_avx",
/* 1447 */  "vmask_first_or_last_true_avx_0",
/* 1448 */  "vadd_reg_masked",
/* 1449 */  "vadd_reg_masked_0",
/* 1450 */  "vadd_reg_masked_1",
/* 1451 */  "vadd_reg_masked_2",
/* 1452 */  "vadd_reg_masked_3",
/* 1453 */  "vadd_reg_masked_4",
/* 1454 */  "vadd_mem_masked",
/* 1455 */  "vadd_mem_masked_0",
/* 1456 */  "vadd_mem_masked_1",
/* 1457 */  "vadd_mem_masked_2",
/* 1458 */  "vadd_mem_masked_3",
/* 1459 */  "vadd_mem_masked_4",
/* 1460 */  "vxor_reg_masked",
/* 1461 */  "vxor_mem_masked",
/* 1462 */  "vor_reg_masked",
/* 1463 */  "vor_mem_masked",
/* 1464 */  "vand_reg_masked",
/* 1465 */  "vand_mem_masked",
/* 1466 */  "vsub_reg_masked",
/* 1467 */  "vsub_reg_masked_0",
/* 1468 */  "vsub_reg_masked_1",
/* 1469 */  "vsub_reg_masked_2",
/* 1470 */  "vsub_reg_masked_3",
/* 1471 */  "vsub_reg_masked_4",
/* 1472 */  "vsub_mem_masked",
/* 1473 */  "vsub_mem_masked_0",
/* 1474 */  "vsub_mem_masked_1",
/* 1475 */  "vsub_mem_masked_2",
/* 1476 */  "vsub_mem_masked_3",
/* 1477 */  "vsub_mem_masked_4",
/* 1478 */  "vmul_reg_masked",
/* 1479 */  "vmul_reg_masked_0",
/* 1480 */  "vmul_reg_masked_1",
/* 1481 */  "vmul_reg_masked_2",
/* 1482 */  "vmul_reg_masked_3",
/* 1483 */  "vmul_mem_masked",
/* 1484 */  "vmul_mem_masked_0",
/* 1485 */  "vmul_mem_masked_1",
/* 1486 */  "vmul_mem_masked_2",
/* 1487 */  "vmul_mem_masked_3",
/* 1488 */  "vsqrt_reg_masked",
/* 1489 */  "vsqrt_reg_masked_0",
/* 1490 */  "vdiv_reg_masked",
/* 1491 */  "vdiv_reg_masked_0",
/* 1492 */  "vdiv_mem_masked",
/* 1493 */  "vdiv_mem_masked_0",
/* 1494 */  "vrol_imm_masked",
/* 1495 */  "vrol_imm_masked_0",
/* 1496 */  "vrol_reg_masked",
/* 1497 */  "vrol_reg_masked_0",
/* 1498 */  "vlshift_imm_masked",
/* 1499 */  "vlshift_imm_masked_0",
/* 1500 */  "vlshift_imm_masked_1",
/* 1501 */  "vlshift_reg_masked",
/* 1502 */  "vlshift_reg_masked_0",
/* 1503 */  "vlshift_reg_masked_1",
/* 1504 */  "vlshiftv_reg_masked",
/* 1505 */  "vlshiftv_reg_masked_0",
/* 1506 */  "vlshiftv_reg_masked_1",
/* 1507 */  "vlshift_mem_masked",
/* 1508 */  "vlshift_mem_masked_0",
/* 1509 */  "vlshift_mem_masked_1",
/* 1510 */  "vrshift_imm_masked",
/* 1511 */  "vrshift_imm_masked_0",
/* 1512 */  "vrshift_imm_masked_1",
/* 1513 */  "vrshift_reg_masked",
/* 1514 */  "vrshift_reg_masked_0",
/* 1515 */  "vrshift_reg_masked_1",
/* 1516 */  "vrshiftv_reg_masked",
/* 1517 */  "vrshiftv_reg_masked_0",
/* 1518 */  "vrshiftv_reg_masked_1",
/* 1519 */  "vrshift_mem_masked",
/* 1520 */  "vrshift_mem_masked_0",
/* 1521 */  "vrshift_mem_masked_1",
/* 1522 */  "vurshift_imm_masked",
/* 1523 */  "vurshift_imm_masked_0",
/* 1524 */  "vurshift_imm_masked_1",
/* 1525 */  "vurshift_reg_masked",
/* 1526 */  "vurshift_reg_masked_0",
/* 1527 */  "vurshift_reg_masked_1",
/* 1528 */  "vurshiftv_reg_masked",
/* 1529 */  "vurshiftv_reg_masked_0",
/* 1530 */  "vurshiftv_reg_masked_1",
/* 1531 */  "vurshift_mem_masked",
/* 1532 */  "vurshift_mem_masked_0",
/* 1533 */  "vurshift_mem_masked_1",
/* 1534 */  "vmaxv_reg_masked",
/* 1535 */  "vmaxv_mem_masked",
/* 1536 */  "vminv_reg_masked",
/* 1537 */  "vminv_mem_masked",
/* 1538 */  "vrearrangev_reg_masked",
/* 1539 */  "vabs_masked",
/* 1540 */  "vabs_masked_0",
/* 1541 */  "vabs_masked_1",
/* 1542 */  "vabs_masked_2",
/* 1543 */  "vfma_reg_masked",
/* 1544 */  "vfma_reg_masked_0",
/* 1545 */  "vfma_mem_masked",
/* 1546 */  "vfma_mem_masked_0",
/* 1547 */  "evcmp_masked",
/* 1548 */  "mask_all_evexI_imm",
/* 1549 */  "mask_all_evexI",
/* 1550 */  "mask_all_evexL",
/* 1551 */  "mask_not_immLT8",
/* 1552 */  "mask_not_imm",
/* 1553 */  "long_to_maskLE8_avx",
/* 1554 */  "long_to_maskGT8_avx",
/* 1555 */  "mask_opers_evex",
/* 1556 */  "mask_opers_evex_0",
/* 1557 */  "mask_opers_evex_1",
/* 1558 */  "compareAndSwapP_shenandoah",
/* 1559 */  "compareAndSwapP_shenandoah_0",
/* 1560 */  "compareAndSwapN_shenandoah",
/* 1561 */  "compareAndSwapN_shenandoah_0",
/* 1562 */  "compareAndExchangeN_shenandoah",
/* 1563 */  "compareAndExchangeP_shenandoah",
/* 1564 */  "zLoadP",
/* 1565 */  "zCompareAndExchangeP",
/* 1566 */  "zCompareAndSwapP",
/* 1567 */  "zCompareAndSwapP_0",
/* 1568 */  "zXChgP",
// last instruction
"invalid rule name" // no trailing comma
10913};

10915const        bool  swallowed[] = {
/*    0 */  false,
/*    1 */  false,
/*    2 */  false,
/*    3 */  false,
/*    4 */  false,
/*    5 */  false,
/*    6 */  false,
/*    7 */  false,
/*    8 */  true,
/*    9 */  true,
/*   10 */  true,
/*   11 */  true,
/*   12 */  true,
/*   13 */  true,
/*   14 */  true,
/*   15 */  true,
/*   16 */  true,
/*   17 */  true,
/*   18 */  true,
/*   19 */  true,
/*   20 */  true,
/*   21 */  true,
/*   22 */  true,
/*   23 */  true,
/*   24 */  true,
/*   25 */  true,
/*   26 */  true,
/*   27 */  true,
/*   28 */  true,
/*   29 */  true,
/*   30 */  true,
/*   31 */  true,
/*   32 */  true,
/*   33 */  true,
/*   34 */  true,
/*   35 */  true,
/*   36 */  true,
/*   37 */  true,
/*   38 */  true,
/*   39 */  true,
/*   40 */  true,
/*   41 */  true,
/*   42 */  true,
/*   43 */  true,
/*   44 */  true,
/*   45 */  true,
/*   46 */  true,
/*   47 */  true,
/*   48 */  true,
/*   49 */  true,
/*   50 */  true,
/*   51 */  true,
/*   52 */  false,
/*   53 */  false,
/*   54 */  false,
/*   55 */  false,
/*   56 */  false,
/*   57 */  false,
/*   58 */  false,
/*   59 */  false,
/*   60 */  false,
/*   61 */  false,
/*   62 */  false,
/*   63 */  false,
/*   64 */  false,
/*   65 */  false,
/*   66 */  false,
/*   67 */  false,
/*   68 */  false,
/*   69 */  false,
/*   70 */  false,
/*   71 */  false,
/*   72 */  false,
/*   73 */  false,
/*   74 */  false,
/*   75 */  false,
/*   76 */  false,
/*   77 */  false,
/*   78 */  false,
/*   79 */  false,
/*   80 */  false,
/*   81 */  false,
/*   82 */  false,
/*   83 */  false,
/*   84 */  false,
/*   85 */  false,
/*   86 */  false,
/*   87 */  false,
/*   88 */  false,
/*   89 */  false,
/*   90 */  false,
/*   91 */  false,
/*   92 */  false,
/*   93 */  false,
/*   94 */  false,
/*   95 */  false,
/*   96 */  false,
/*   97 */  false,
/*   98 */  false,
/*   99 */  false,
/*  100 */  false,
/*  101 */  false,
/*  102 */  false,
/*  103 */  false,
/*  104 */  false,
/*  105 */  false,
/*  106 */  false,
/*  107 */  false,
/*  108 */  false,
/*  109 */  false,
/*  110 */  false,
/*  111 */  false,
/*  112 */  false,
/*  113 */  false,
/*  114 */  false,
/*  115 */  false,
/*  116 */  false,
/*  117 */  false,
/*  118 */  false,
/*  119 */  false,
/*  120 */  true,
/*  121 */  true,
/*  122 */  true,
/*  123 */  true,
/*  124 */  false,
/*  125 */  false,
/*  126 */  false,
/*  127 */  false,
/*  128 */  false,
/*  129 */  false,
/*  130 */  false,
/*  131 */  false,
/*  132 */  false,
/*  133 */  false,
/*  134 */  false,
/*  135 */  false,
/*  136 */  false,
/*  137 */  true,
// last operand
/*  138 */  false,
// last operand class
/*  139 */  false,
/*  140 */  false,
/*  141 */  false,
/*  142 */  false,
/*  143 */  false,
/*  144 */  false,
/*  145 */  false,
/*  146 */  false,
/*  147 */  false,
/*  148 */  false,
/*  149 */  false,
/*  150 */  false,
/*  151 */  false,
/*  152 */  false,
/*  153 */  false,
/*  154 */  false,
/*  155 */  false,
/*  156 */  false,
/*  157 */  false,
/*  158 */  false,
/*  159 */  false,
/*  160 */  false,
/*  161 */  false,
/*  162 */  false,
/*  163 */  false,
/*  164 */  false,
/*  165 */  false,
/*  166 */  false,
/*  167 */  false,
/*  168 */  false,
/*  169 */  false,
/*  170 */  false,
/*  171 */  false,
/*  172 */  false,
/*  173 */  false,
/*  174 */  false,
/*  175 */  false,
/*  176 */  false,
/*  177 */  false,
/*  178 */  false,
/*  179 */  false,
/*  180 */  false,
/*  181 */  false,
/*  182 */  false,
/*  183 */  false,
/*  184 */  false,
/*  185 */  false,
/*  186 */  false,
/*  187 */  false,
/*  188 */  false,
/*  189 */  false,
/*  190 */  false,
/*  191 */  false,
/*  192 */  false,
/*  193 */  false,
/*  194 */  false,
/*  195 */  false,
/*  196 */  false,
/*  197 */  false,
/*  198 */  false,
/*  199 */  false,
/*  200 */  false,
/*  201 */  false,
/*  202 */  false,
/*  203 */  false,
/*  204 */  false,
/*  205 */  false,
/*  206 */  false,
/*  207 */  false,
/*  208 */  false,
/*  209 */  false,
/*  210 */  false,
/*  211 */  false,
/*  212 */  false,
/*  213 */  false,
/*  214 */  false,
/*  215 */  false,
/*  216 */  false,
/*  217 */  false,
/*  218 */  false,
/*  219 */  false,
/*  220 */  false,
/*  221 */  false,
/*  222 */  false,
/*  223 */  false,
/*  224 */  false,
/*  225 */  false,
/*  226 */  false,
/*  227 */  false,
/*  228 */  false,
/*  229 */  false,
/*  230 */  false,
/*  231 */  false,
/*  232 */  false,
/*  233 */  false,
/*  234 */  false,
/*  235 */  false,
/*  236 */  false,
/*  237 */  false,
/*  238 */  false,
/*  239 */  false,
/*  240 */  false,
/*  241 */  false,
/*  242 */  false,
/*  243 */  false,
/*  244 */  false,
/*  245 */  false,
/*  246 */  false,
/*  247 */  false,
/*  248 */  false,
/*  249 */  false,
/*  250 */  false,
/*  251 */  false,
/*  252 */  false,
/*  253 */  false,
/*  254 */  false,
/*  255 */  false,
/*  256 */  false,
/*  257 */  false,
/*  258 */  false,
/*  259 */  false,
/*  260 */  false,
/*  261 */  false,
/*  262 */  false,
/*  263 */  false,
/*  264 */  false,
/*  265 */  false,
/*  266 */  false,
/*  267 */  false,
/*  268 */  false,
/*  269 */  false,
/*  270 */  false,
/*  271 */  false,
/*  272 */  false,
/*  273 */  false,
/*  274 */  false,
/*  275 */  false,
/*  276 */  false,
/*  277 */  false,
/*  278 */  false,
/*  279 */  false,
/*  280 */  false,
/*  281 */  false,
/*  282 */  false,
/*  283 */  false,
/*  284 */  false,
/*  285 */  false,
/*  286 */  false,
/*  287 */  false,
/*  288 */  false,
/*  289 */  false,
/*  290 */  false,
/*  291 */  false,
/*  292 */  false,
/*  293 */  false,
/*  294 */  false,
/*  295 */  false,
/*  296 */  false,
/*  297 */  false,
/*  298 */  false,
/*  299 */  false,
/*  300 */  false,
/*  301 */  false,
/*  302 */  false,
/*  303 */  false,
/*  304 */  false,
/*  305 */  false,
// last internally defined operand
/*  306 */  false,
/*  307 */  false,
/*  308 */  false,
/*  309 */  false,
/*  310 */  false,
/*  311 */  false,
/*  312 */  false,
/*  313 */  false,
/*  314 */  false,
/*  315 */  false,
/*  316 */  false,
/*  317 */  false,
/*  318 */  false,
/*  319 */  false,
/*  320 */  false,
/*  321 */  false,
/*  322 */  false,
/*  323 */  false,
/*  324 */  false,
/*  325 */  false,
/*  326 */  false,
/*  327 */  false,
/*  328 */  false,
/*  329 */  false,
/*  330 */  false,
/*  331 */  false,
/*  332 */  false,
/*  333 */  false,
/*  334 */  false,
/*  335 */  false,
/*  336 */  false,
/*  337 */  false,
/*  338 */  false,
/*  339 */  false,
/*  340 */  false,
/*  341 */  false,
/*  342 */  false,
/*  343 */  false,
/*  344 */  false,
/*  345 */  false,
/*  346 */  false,
/*  347 */  false,
/*  348 */  false,
/*  349 */  false,
/*  350 */  false,
/*  351 */  false,
/*  352 */  false,
/*  353 */  false,
/*  354 */  false,
/*  355 */  false,
/*  356 */  false,
/*  357 */  false,
/*  358 */  false,
/*  359 */  false,
/*  360 */  false,
/*  361 */  false,
/*  362 */  false,
/*  363 */  false,
/*  364 */  false,
/*  365 */  false,
/*  366 */  false,
/*  367 */  false,
/*  368 */  false,
/*  369 */  false,
/*  370 */  false,
/*  371 */  false,
/*  372 */  false,
/*  373 */  false,
/*  374 */  false,
/*  375 */  false,
/*  376 */  false,
/*  377 */  false,
/*  378 */  false,
/*  379 */  false,
/*  380 */  false,
/*  381 */  false,
/*  382 */  false,
/*  383 */  false,
/*  384 */  false,
/*  385 */  false,
/*  386 */  false,
/*  387 */  false,
/*  388 */  false,
/*  389 */  false,
/*  390 */  false,
/*  391 */  false,
/*  392 */  false,
/*  393 */  false,
/*  394 */  false,
/*  395 */  false,
/*  396 */  false,
/*  397 */  false,
/*  398 */  false,
/*  399 */  false,
/*  400 */  false,
/*  401 */  false,
/*  402 */  false,
/*  403 */  false,
/*  404 */  false,
/*  405 */  false,
/*  406 */  false,
/*  407 */  false,
/*  408 */  false,
/*  409 */  false,
/*  410 */  false,
/*  411 */  false,
/*  412 */  false,
/*  413 */  false,
/*  414 */  false,
/*  415 */  false,
/*  416 */  false,
/*  417 */  false,
/*  418 */  false,
/*  419 */  false,
/*  420 */  false,
/*  421 */  false,
/*  422 */  false,
/*  423 */  false,
/*  424 */  false,
/*  425 */  false,
/*  426 */  false,
/*  427 */  false,
/*  428 */  false,
/*  429 */  false,
/*  430 */  false,
/*  431 */  false,
/*  432 */  false,
/*  433 */  false,
/*  434 */  false,
/*  435 */  false,
/*  436 */  false,
/*  437 */  false,
/*  438 */  false,
/*  439 */  false,
/*  440 */  false,
/*  441 */  false,
/*  442 */  false,
/*  443 */  false,
/*  444 */  false,
/*  445 */  false,
/*  446 */  false,
/*  447 */  false,
/*  448 */  false,
/*  449 */  false,
/*  450 */  false,
/*  451 */  false,
/*  452 */  false,
/*  453 */  false,
/*  454 */  false,
/*  455 */  false,
/*  456 */  false,
/*  457 */  false,
/*  458 */  false,
/*  459 */  false,
/*  460 */  false,
/*  461 */  false,
/*  462 */  false,
/*  463 */  false,
/*  464 */  false,
/*  465 */  false,
/*  466 */  false,
/*  467 */  false,
/*  468 */  false,
/*  469 */  false,
/*  470 */  false,
/*  471 */  false,
/*  472 */  false,
/*  473 */  false,
/*  474 */  false,
/*  475 */  false,
/*  476 */  false,
/*  477 */  false,
/*  478 */  false,
/*  479 */  false,
/*  480 */  false,
/*  481 */  false,
/*  482 */  false,
/*  483 */  false,
/*  484 */  false,
/*  485 */  false,
/*  486 */  false,
/*  487 */  false,
/*  488 */  false,
/*  489 */  false,
/*  490 */  false,
/*  491 */  false,
/*  492 */  false,
/*  493 */  false,
/*  494 */  false,
/*  495 */  false,
/*  496 */  false,
/*  497 */  false,
/*  498 */  false,
/*  499 */  false,
/*  500 */  false,
/*  501 */  false,
/*  502 */  false,
/*  503 */  false,
/*  504 */  false,
/*  505 */  false,
/*  506 */  false,
/*  507 */  false,
/*  508 */  false,
/*  509 */  false,
/*  510 */  false,
/*  511 */  false,
/*  512 */  false,
/*  513 */  false,
/*  514 */  false,
/*  515 */  false,
/*  516 */  false,
/*  517 */  false,
/*  518 */  false,
/*  519 */  false,
/*  520 */  false,
/*  521 */  false,
/*  522 */  false,
/*  523 */  false,
/*  524 */  false,
/*  525 */  false,
/*  526 */  false,
/*  527 */  false,
/*  528 */  false,
/*  529 */  false,
/*  530 */  false,
/*  531 */  false,
/*  532 */  false,
/*  533 */  false,
/*  534 */  false,
/*  535 */  false,
/*  536 */  false,
/*  537 */  false,
/*  538 */  false,
/*  539 */  false,
/*  540 */  false,
/*  541 */  false,
/*  542 */  false,
/*  543 */  false,
/*  544 */  false,
/*  545 */  false,
/*  546 */  false,
/*  547 */  false,
/*  548 */  false,
/*  549 */  false,
/*  550 */  false,
/*  551 */  false,
/*  552 */  false,
/*  553 */  false,
/*  554 */  false,
/*  555 */  false,
/*  556 */  false,
/*  557 */  false,
/*  558 */  false,
/*  559 */  false,
/*  560 */  false,
/*  561 */  false,
/*  562 */  false,
/*  563 */  false,
/*  564 */  false,
/*  565 */  false,
/*  566 */  false,
/*  567 */  false,
/*  568 */  false,
/*  569 */  false,
/*  570 */  false,
/*  571 */  false,
/*  572 */  false,
/*  573 */  false,
/*  574 */  false,
/*  575 */  false,
/*  576 */  false,
/*  577 */  false,
/*  578 */  false,
/*  579 */  false,
/*  580 */  false,
/*  581 */  false,
/*  582 */  false,
/*  583 */  false,
/*  584 */  false,
/*  585 */  false,
/*  586 */  false,
/*  587 */  false,
/*  588 */  false,
/*  589 */  false,
/*  590 */  false,
/*  591 */  false,
/*  592 */  false,
/*  593 */  false,
/*  594 */  false,
/*  595 */  false,
/*  596 */  false,
/*  597 */  false,
/*  598 */  false,
/*  599 */  false,
/*  600 */  false,
/*  601 */  false,
/*  602 */  false,
/*  603 */  false,
/*  604 */  false,
/*  605 */  false,
/*  606 */  false,
/*  607 */  false,
/*  608 */  false,
/*  609 */  false,
/*  610 */  false,
/*  611 */  false,
/*  612 */  false,
/*  613 */  false,
/*  614 */  false,
/*  615 */  false,
/*  616 */  false,
/*  617 */  false,
/*  618 */  false,
/*  619 */  false,
/*  620 */  false,
/*  621 */  false,
/*  622 */  false,
/*  623 */  false,
/*  624 */  false,
/*  625 */  false,
/*  626 */  false,
/*  627 */  false,
/*  628 */  false,
/*  629 */  false,
/*  630 */  false,
/*  631 */  false,
/*  632 */  false,
/*  633 */  false,
/*  634 */  false,
/*  635 */  false,
/*  636 */  false,
/*  637 */  false,
/*  638 */  false,
/*  639 */  false,
/*  640 */  false,
/*  641 */  false,
/*  642 */  false,
/*  643 */  false,
/*  644 */  false,
/*  645 */  false,
/*  646 */  false,
/*  647 */  false,
/*  648 */  false,
/*  649 */  false,
/*  650 */  false,
/*  651 */  false,
/*  652 */  false,
/*  653 */  false,
/*  654 */  false,
/*  655 */  false,
/*  656 */  false,
/*  657 */  false,
/*  658 */  false,
/*  659 */  false,
/*  660 */  false,
/*  661 */  false,
/*  662 */  false,
/*  663 */  false,
/*  664 */  false,
/*  665 */  false,
/*  666 */  false,
/*  667 */  false,
/*  668 */  false,
/*  669 */  false,
/*  670 */  false,
/*  671 */  false,
/*  672 */  false,
/*  673 */  false,
/*  674 */  false,
/*  675 */  false,
/*  676 */  false,
/*  677 */  false,
/*  678 */  false,
/*  679 */  false,
/*  680 */  false,
/*  681 */  false,
/*  682 */  false,
/*  683 */  false,
/*  684 */  false,
/*  685 */  false,
/*  686 */  false,
/*  687 */  false,
/*  688 */  false,
/*  689 */  false,
/*  690 */  false,
/*  691 */  false,
/*  692 */  false,
/*  693 */  false,
/*  694 */  false,
/*  695 */  false,
/*  696 */  false,
/*  697 */  false,
/*  698 */  false,
/*  699 */  false,
/*  700 */  false,
/*  701 */  false,
/*  702 */  false,
/*  703 */  false,
/*  704 */  false,
/*  705 */  false,
/*  706 */  false,
/*  707 */  false,
/*  708 */  false,
/*  709 */  false,
/*  710 */  false,
/*  711 */  false,
/*  712 */  false,
/*  713 */  false,
/*  714 */  false,
/*  715 */  false,
/*  716 */  false,
/*  717 */  false,
/*  718 */  false,
/*  719 */  false,
/*  720 */  false,
/*  721 */  false,
/*  722 */  false,
/*  723 */  false,
/*  724 */  false,
/*  725 */  false,
/*  726 */  false,
/*  727 */  false,
/*  728 */  false,
/*  729 */  false,
/*  730 */  false,
/*  731 */  false,
/*  732 */  false,
/*  733 */  false,
/*  734 */  false,
/*  735 */  false,
/*  736 */  false,
/*  737 */  false,
/*  738 */  false,
/*  739 */  false,
/*  740 */  false,
/*  741 */  false,
/*  742 */  false,
/*  743 */  false,
/*  744 */  false,
/*  745 */  false,
/*  746 */  false,
/*  747 */  false,
/*  748 */  false,
/*  749 */  false,
/*  750 */  false,
/*  751 */  false,
/*  752 */  false,
/*  753 */  false,
/*  754 */  false,
/*  755 */  false,
/*  756 */  false,
/*  757 */  false,
/*  758 */  false,
/*  759 */  false,
/*  760 */  false,
/*  761 */  false,
/*  762 */  false,
/*  763 */  false,
/*  764 */  false,
/*  765 */  false,
/*  766 */  false,
/*  767 */  false,
/*  768 */  false,
/*  769 */  false,
/*  770 */  false,
/*  771 */  false,
/*  772 */  false,
/*  773 */  false,
/*  774 */  false,
/*  775 */  false,
/*  776 */  false,
/*  777 */  false,
/*  778 */  false,
/*  779 */  false,
/*  780 */  false,
/*  781 */  false,
/*  782 */  false,
/*  783 */  false,
/*  784 */  false,
/*  785 */  false,
/*  786 */  false,
/*  787 */  false,
/*  788 */  false,
/*  789 */  false,
/*  790 */  false,
/*  791 */  false,
/*  792 */  false,
/*  793 */  false,
/*  794 */  false,
/*  795 */  false,
/*  796 */  false,
/*  797 */  false,
/*  798 */  false,
/*  799 */  false,
/*  800 */  false,
/*  801 */  false,
/*  802 */  false,
/*  803 */  false,
/*  804 */  false,
/*  805 */  false,
/*  806 */  false,
/*  807 */  false,
/*  808 */  false,
/*  809 */  false,
/*  810 */  false,
/*  811 */  false,
/*  812 */  false,
/*  813 */  false,
/*  814 */  false,
/*  815 */  false,
/*  816 */  false,
/*  817 */  false,
/*  818 */  false,
/*  819 */  false,
/*  820 */  false,
/*  821 */  false,
/*  822 */  false,
/*  823 */  false,
/*  824 */  false,
/*  825 */  false,
/*  826 */  false,
/*  827 */  false,
/*  828 */  false,
/*  829 */  false,
/*  830 */  false,
/*  831 */  false,
/*  832 */  false,
/*  833 */  false,
/*  834 */  false,
/*  835 */  false,
/*  836 */  false,
/*  837 */  false,
/*  838 */  false,
/*  839 */  false,
/*  840 */  false,
/*  841 */  false,
/*  842 */  false,
/*  843 */  false,
/*  844 */  false,
/*  845 */  false,
/*  846 */  false,
/*  847 */  false,
/*  848 */  false,
/*  849 */  false,
/*  850 */  false,
/*  851 */  false,
/*  852 */  false,
/*  853 */  false,
/*  854 */  false,
/*  855 */  false,
/*  856 */  false,
/*  857 */  false,
/*  858 */  false,
/*  859 */  false,
/*  860 */  false,
/*  861 */  false,
/*  862 */  false,
/*  863 */  false,
/*  864 */  false,
/*  865 */  false,
/*  866 */  false,
/*  867 */  false,
/*  868 */  false,
/*  869 */  false,
/*  870 */  false,
/*  871 */  false,
/*  872 */  false,
/*  873 */  false,
/*  874 */  false,
/*  875 */  false,
/*  876 */  false,
/*  877 */  false,
/*  878 */  false,
/*  879 */  false,
/*  880 */  false,
/*  881 */  false,
/*  882 */  false,
/*  883 */  false,
/*  884 */  false,
/*  885 */  false,
/*  886 */  false,
/*  887 */  false,
/*  888 */  false,
/*  889 */  false,
/*  890 */  false,
/*  891 */  false,
/*  892 */  false,
/*  893 */  false,
/*  894 */  false,
/*  895 */  false,
/*  896 */  false,
/*  897 */  false,
/*  898 */  false,
/*  899 */  false,
/*  900 */  false,
/*  901 */  false,
/*  902 */  false,
/*  903 */  false,
/*  904 */  false,
/*  905 */  false,
/*  906 */  false,
/*  907 */  false,
/*  908 */  false,
/*  909 */  false,
/*  910 */  false,
/*  911 */  false,
/*  912 */  false,
/*  913 */  false,
/*  914 */  false,
/*  915 */  false,
/*  916 */  false,
/*  917 */  false,
/*  918 */  false,
/*  919 */  false,
/*  920 */  false,
/*  921 */  false,
/*  922 */  false,
/*  923 */  false,
/*  924 */  false,
/*  925 */  false,
/*  926 */  false,
/*  927 */  false,
/*  928 */  false,
/*  929 */  false,
/*  930 */  false,
/*  931 */  false,
/*  932 */  false,
/*  933 */  false,
/*  934 */  false,
/*  935 */  false,
/*  936 */  false,
/*  937 */  false,
/*  938 */  false,
/*  939 */  false,
/*  940 */  false,
/*  941 */  false,
/*  942 */  false,
/*  943 */  false,
/*  944 */  false,
/*  945 */  false,
/*  946 */  false,
/*  947 */  false,
/*  948 */  false,
/*  949 */  false,
/*  950 */  false,
/*  951 */  false,
/*  952 */  false,
/*  953 */  false,
/*  954 */  false,
/*  955 */  false,
/*  956 */  false,
/*  957 */  false,
/*  958 */  false,
/*  959 */  false,
/*  960 */  false,
/*  961 */  false,
/*  962 */  false,
/*  963 */  false,
/*  964 */  false,
/*  965 */  false,
/*  966 */  false,
/*  967 */  false,
/*  968 */  false,
/*  969 */  false,
/*  970 */  false,
/*  971 */  false,
/*  972 */  false,
/*  973 */  false,
/*  974 */  false,
/*  975 */  false,
/*  976 */  false,
/*  977 */  false,
/*  978 */  false,
/*  979 */  false,
/*  980 */  false,
/*  981 */  false,
/*  982 */  false,
/*  983 */  false,
/*  984 */  false,
/*  985 */  false,
/*  986 */  false,
/*  987 */  false,
/*  988 */  false,
/*  989 */  false,
/*  990 */  false,
/*  991 */  false,
/*  992 */  false,
/*  993 */  false,
/*  994 */  false,
/*  995 */  false,
/*  996 */  false,
/*  997 */  false,
/*  998 */  false,
/*  999 */  false,
/* 1000 */  false,
/* 1001 */  false,
/* 1002 */  false,
/* 1003 */  false,
/* 1004 */  false,
/* 1005 */  false,
/* 1006 */  false,
/* 1007 */  false,
/* 1008 */  false,
/* 1009 */  false,
/* 1010 */  false,
/* 1011 */  false,
/* 1012 */  false,
/* 1013 */  false,
/* 1014 */  false,
/* 1015 */  false,
/* 1016 */  false,
/* 1017 */  false,
/* 1018 */  false,
/* 1019 */  false,
/* 1020 */  false,
/* 1021 */  false,
/* 1022 */  false,
/* 1023 */  false,
/* 1024 */  false,
/* 1025 */  false,
/* 1026 */  false,
/* 1027 */  false,
/* 1028 */  false,
/* 1029 */  false,
/* 1030 */  false,
/* 1031 */  false,
/* 1032 */  false,
/* 1033 */  false,
/* 1034 */  false,
/* 1035 */  false,
/* 1036 */  false,
/* 1037 */  false,
/* 1038 */  false,
/* 1039 */  false,
/* 1040 */  false,
/* 1041 */  false,
/* 1042 */  false,
/* 1043 */  false,
/* 1044 */  false,
/* 1045 */  false,
/* 1046 */  false,
/* 1047 */  false,
/* 1048 */  false,
/* 1049 */  false,
/* 1050 */  false,
/* 1051 */  false,
/* 1052 */  false,
/* 1053 */  false,
/* 1054 */  false,
/* 1055 */  false,
/* 1056 */  false,
/* 1057 */  false,
/* 1058 */  false,
/* 1059 */  false,
/* 1060 */  false,
/* 1061 */  false,
/* 1062 */  false,
/* 1063 */  false,
/* 1064 */  false,
/* 1065 */  false,
/* 1066 */  false,
/* 1067 */  false,
/* 1068 */  false,
/* 1069 */  false,
/* 1070 */  false,
/* 1071 */  false,
/* 1072 */  false,
/* 1073 */  false,
/* 1074 */  false,
/* 1075 */  false,
/* 1076 */  false,
/* 1077 */  false,
/* 1078 */  false,
/* 1079 */  false,
/* 1080 */  false,
/* 1081 */  false,
/* 1082 */  false,
/* 1083 */  false,
/* 1084 */  false,
/* 1085 */  false,
/* 1086 */  false,
/* 1087 */  false,
/* 1088 */  false,
/* 1089 */  false,
/* 1090 */  false,
/* 1091 */  false,
/* 1092 */  false,
/* 1093 */  false,
/* 1094 */  false,
/* 1095 */  false,
/* 1096 */  false,
/* 1097 */  false,
/* 1098 */  false,
/* 1099 */  false,
/* 1100 */  false,
/* 1101 */  false,
/* 1102 */  false,
/* 1103 */  false,
/* 1104 */  false,
/* 1105 */  false,
/* 1106 */  false,
/* 1107 */  false,
/* 1108 */  false,
/* 1109 */  false,
/* 1110 */  false,
/* 1111 */  false,
/* 1112 */  false,
/* 1113 */  false,
/* 1114 */  false,
/* 1115 */  false,
/* 1116 */  false,
/* 1117 */  false,
/* 1118 */  false,
/* 1119 */  false,
/* 1120 */  false,
/* 1121 */  false,
/* 1122 */  false,
/* 1123 */  false,
/* 1124 */  false,
/* 1125 */  false,
/* 1126 */  false,
/* 1127 */  false,
/* 1128 */  false,
/* 1129 */  false,
/* 1130 */  false,
/* 1131 */  false,
/* 1132 */  false,
/* 1133 */  false,
/* 1134 */  false,
/* 1135 */  false,
/* 1136 */  false,
/* 1137 */  false,
/* 1138 */  false,
/* 1139 */  false,
/* 1140 */  false,
/* 1141 */  false,
/* 1142 */  false,
/* 1143 */  false,
/* 1144 */  false,
/* 1145 */  false,
/* 1146 */  false,
/* 1147 */  false,
/* 1148 */  false,
/* 1149 */  false,
/* 1150 */  false,
/* 1151 */  false,
/* 1152 */  false,
/* 1153 */  false,
/* 1154 */  false,
/* 1155 */  false,
/* 1156 */  false,
/* 1157 */  false,
/* 1158 */  false,
/* 1159 */  false,
/* 1160 */  false,
/* 1161 */  false,
/* 1162 */  false,
/* 1163 */  false,
/* 1164 */  false,
/* 1165 */  false,
/* 1166 */  false,
/* 1167 */  false,
/* 1168 */  false,
/* 1169 */  false,
/* 1170 */  false,
/* 1171 */  false,
/* 1172 */  false,
/* 1173 */  false,
/* 1174 */  false,
/* 1175 */  false,
/* 1176 */  false,
/* 1177 */  false,
/* 1178 */  false,
/* 1179 */  false,
/* 1180 */  false,
/* 1181 */  false,
/* 1182 */  false,
/* 1183 */  false,
/* 1184 */  false,
/* 1185 */  false,
/* 1186 */  false,
/* 1187 */  false,
/* 1188 */  false,
/* 1189 */  false,
/* 1190 */  false,
/* 1191 */  false,
/* 1192 */  false,
/* 1193 */  false,
/* 1194 */  false,
/* 1195 */  false,
/* 1196 */  false,
/* 1197 */  false,
/* 1198 */  false,
/* 1199 */  false,
/* 1200 */  false,
/* 1201 */  false,
/* 1202 */  false,
/* 1203 */  false,
/* 1204 */  false,
/* 1205 */  false,
/* 1206 */  false,
/* 1207 */  false,
/* 1208 */  false,
/* 1209 */  false,
/* 1210 */  false,
/* 1211 */  false,
/* 1212 */  false,
/* 1213 */  false,
/* 1214 */  false,
/* 1215 */  false,
/* 1216 */  false,
/* 1217 */  false,
/* 1218 */  false,
/* 1219 */  false,
/* 1220 */  false,
/* 1221 */  false,
/* 1222 */  false,
/* 1223 */  false,
/* 1224 */  false,
/* 1225 */  false,
/* 1226 */  false,
/* 1227 */  false,
/* 1228 */  false,
/* 1229 */  false,
/* 1230 */  false,
/* 1231 */  false,
/* 1232 */  false,
/* 1233 */  false,
/* 1234 */  false,
/* 1235 */  false,
/* 1236 */  false,
/* 1237 */  false,
/* 1238 */  false,
/* 1239 */  false,
/* 1240 */  false,
/* 1241 */  false,
/* 1242 */  false,
/* 1243 */  false,
/* 1244 */  false,
/* 1245 */  false,
/* 1246 */  false,
/* 1247 */  false,
/* 1248 */  false,
/* 1249 */  false,
/* 1250 */  false,
/* 1251 */  false,
/* 1252 */  false,
/* 1253 */  false,
/* 1254 */  false,
/* 1255 */  false,
/* 1256 */  false,
/* 1257 */  false,
/* 1258 */  false,
/* 1259 */  false,
/* 1260 */  false,
/* 1261 */  false,
/* 1262 */  false,
/* 1263 */  false,
/* 1264 */  false,
/* 1265 */  false,
/* 1266 */  false,
/* 1267 */  false,
/* 1268 */  false,
/* 1269 */  false,
/* 1270 */  false,
/* 1271 */  false,
/* 1272 */  false,
/* 1273 */  false,
/* 1274 */  false,
/* 1275 */  false,
/* 1276 */  false,
/* 1277 */  false,
/* 1278 */  false,
/* 1279 */  false,
/* 1280 */  false,
/* 1281 */  false,
/* 1282 */  false,
/* 1283 */  false,
/* 1284 */  false,
/* 1285 */  false,
/* 1286 */  false,
/* 1287 */  false,
/* 1288 */  false,
/* 1289 */  false,
/* 1290 */  false,
/* 1291 */  false,
/* 1292 */  false,
/* 1293 */  false,
/* 1294 */  false,
/* 1295 */  false,
/* 1296 */  false,
/* 1297 */  false,
/* 1298 */  false,
/* 1299 */  false,
/* 1300 */  false,
/* 1301 */  false,
/* 1302 */  false,
/* 1303 */  false,
/* 1304 */  false,
/* 1305 */  false,
/* 1306 */  false,
/* 1307 */  false,
/* 1308 */  false,
/* 1309 */  false,
/* 1310 */  false,
/* 1311 */  false,
/* 1312 */  false,
/* 1313 */  false,
/* 1314 */  false,
/* 1315 */  false,
/* 1316 */  false,
/* 1317 */  false,
/* 1318 */  false,
/* 1319 */  false,
/* 1320 */  false,
/* 1321 */  false,
/* 1322 */  false,
/* 1323 */  false,
/* 1324 */  false,
/* 1325 */  false,
/* 1326 */  false,
/* 1327 */  false,
/* 1328 */  false,
/* 1329 */  false,
/* 1330 */  false,
/* 1331 */  false,
/* 1332 */  false,
/* 1333 */  false,
/* 1334 */  false,
/* 1335 */  false,
/* 1336 */  false,
/* 1337 */  false,
/* 1338 */  false,
/* 1339 */  false,
/* 1340 */  false,
/* 1341 */  false,
/* 1342 */  false,
/* 1343 */  false,
/* 1344 */  false,
/* 1345 */  false,
/* 1346 */  false,
/* 1347 */  false,
/* 1348 */  false,
/* 1349 */  false,
/* 1350 */  false,
/* 1351 */  false,
/* 1352 */  false,
/* 1353 */  false,
/* 1354 */  false,
/* 1355 */  false,
/* 1356 */  false,
/* 1357 */  false,
/* 1358 */  false,
/* 1359 */  false,
/* 1360 */  false,
/* 1361 */  false,
/* 1362 */  false,
/* 1363 */  false,
/* 1364 */  false,
/* 1365 */  false,
/* 1366 */  false,
/* 1367 */  false,
/* 1368 */  false,
/* 1369 */  false,
/* 1370 */  false,
/* 1371 */  false,
/* 1372 */  false,
/* 1373 */  false,
/* 1374 */  false,
/* 1375 */  false,
/* 1376 */  false,
/* 1377 */  false,
/* 1378 */  false,
/* 1379 */  false,
/* 1380 */  false,
/* 1381 */  false,
/* 1382 */  false,
/* 1383 */  false,
/* 1384 */  false,
/* 1385 */  false,
/* 1386 */  false,
/* 1387 */  false,
/* 1388 */  false,
/* 1389 */  false,
/* 1390 */  false,
/* 1391 */  false,
/* 1392 */  false,
/* 1393 */  false,
/* 1394 */  false,
/* 1395 */  false,
/* 1396 */  false,
/* 1397 */  false,
/* 1398 */  false,
/* 1399 */  false,
/* 1400 */  false,
/* 1401 */  false,
/* 1402 */  false,
/* 1403 */  false,
/* 1404 */  false,
/* 1405 */  false,
/* 1406 */  false,
/* 1407 */  false,
/* 1408 */  false,
/* 1409 */  false,
/* 1410 */  false,
/* 1411 */  false,
/* 1412 */  false,
/* 1413 */  false,
/* 1414 */  false,
/* 1415 */  false,
/* 1416 */  false,
/* 1417 */  false,
/* 1418 */  false,
/* 1419 */  false,
/* 1420 */  false,
/* 1421 */  false,
/* 1422 */  false,
/* 1423 */  false,
/* 1424 */  false,
/* 1425 */  false,
/* 1426 */  false,
/* 1427 */  false,
/* 1428 */  false,
/* 1429 */  false,
/* 1430 */  false,
/* 1431 */  false,
/* 1432 */  false,
/* 1433 */  false,
/* 1434 */  false,
/* 1435 */  false,
/* 1436 */  false,
/* 1437 */  false,
/* 1438 */  false,
/* 1439 */  false,
/* 1440 */  false,
/* 1441 */  false,
/* 1442 */  false,
/* 1443 */  false,
/* 1444 */  false,
/* 1445 */  false,
/* 1446 */  false,
/* 1447 */  false,
/* 1448 */  false,
/* 1449 */  false,
/* 1450 */  false,
/* 1451 */  false,
/* 1452 */  false,
/* 1453 */  false,
/* 1454 */  false,
/* 1455 */  false,
/* 1456 */  false,
/* 1457 */  false,
/* 1458 */  false,
/* 1459 */  false,
/* 1460 */  false,
/* 1461 */  false,
/* 1462 */  false,
/* 1463 */  false,
/* 1464 */  false,
/* 1465 */  false,
/* 1466 */  false,
/* 1467 */  false,
/* 1468 */  false,
/* 1469 */  false,
/* 1470 */  false,
/* 1471 */  false,
/* 1472 */  false,
/* 1473 */  false,
/* 1474 */  false,
/* 1475 */  false,
/* 1476 */  false,
/* 1477 */  false,
/* 1478 */  false,
/* 1479 */  false,
/* 1480 */  false,
/* 1481 */  false,
/* 1482 */  false,
/* 1483 */  false,
/* 1484 */  false,
/* 1485 */  false,
/* 1486 */  false,
/* 1487 */  false,
/* 1488 */  false,
/* 1489 */  false,
/* 1490 */  false,
/* 1491 */  false,
/* 1492 */  false,
/* 1493 */  false,
/* 1494 */  false,
/* 1495 */  false,
/* 1496 */  false,
/* 1497 */  false,
/* 1498 */  false,
/* 1499 */  false,
/* 1500 */  false,
/* 1501 */  false,
/* 1502 */  false,
/* 1503 */  false,
/* 1504 */  false,
/* 1505 */  false,
/* 1506 */  false,
/* 1507 */  false,
/* 1508 */  false,
/* 1509 */  false,
/* 1510 */  false,
/* 1511 */  false,
/* 1512 */  false,
/* 1513 */  false,
/* 1514 */  false,
/* 1515 */  false,
/* 1516 */  false,
/* 1517 */  false,
/* 1518 */  false,
/* 1519 */  false,
/* 1520 */  false,
/* 1521 */  false,
/* 1522 */  false,
/* 1523 */  false,
/* 1524 */  false,
/* 1525 */  false,
/* 1526 */  false,
/* 1527 */  false,
/* 1528 */  false,
/* 1529 */  false,
/* 1530 */  false,
/* 1531 */  false,
/* 1532 */  false,
/* 1533 */  false,
/* 1534 */  false,
/* 1535 */  false,
/* 1536 */  false,
/* 1537 */  false,
/* 1538 */  false,
/* 1539 */  false,
/* 1540 */  false,
/* 1541 */  false,
/* 1542 */  false,
/* 1543 */  false,
/* 1544 */  false,
/* 1545 */  false,
/* 1546 */  false,
/* 1547 */  false,
/* 1548 */  false,
/* 1549 */  false,
/* 1550 */  false,
/* 1551 */  false,
/* 1552 */  false,
/* 1553 */  false,
/* 1554 */  false,
/* 1555 */  false,
/* 1556 */  false,
/* 1557 */  false,
/* 1558 */  false,
/* 1559 */  false,
/* 1560 */  false,
/* 1561 */  false,
/* 1562 */  false,
/* 1563 */  false,
/* 1564 */  false,
/* 1565 */  false,
/* 1566 */  false,
/* 1567 */  false,
/* 1568 */  false,
// last instruction
false // no trailing comma
12490};

12492// Mapping from machine-independent opcode to boolean
12493const        char must_clone[] = {
0, // Node: 0
0, // Set: 1
0, // RegN: 2
0, // RegI: 3
0, // RegP: 4
0, // RegF: 5
0, // RegD: 6
0, // RegL: 7
0, // VecA: 8
0, // VecS: 9
0, // VecD: 10
0, // VecX: 11
0, // VecY: 12
0, // VecZ: 13
0, // RegVectMask: 14
0, // RegFlags: 15
0, // _last_machine_leaf: 16
0, // AbsD: 17
0, // AbsF: 18
0, // AbsI: 19
0, // AbsL: 20
0, // AddD: 21
0, // AddF: 22
0, // AddI: 23
0, // AddL: 24
0, // AddP: 25
0, // Allocate: 26
0, // AllocateArray: 27
0, // AndI: 28
0, // AndL: 29
0, // ArrayCopy: 30
0, // AryEq: 31
0, // AtanD: 32
1, // Binary: 33
0, // Blackhole: 34
1, // Bool: 35
0, // BoxLock: 36
0, // ReverseBytesI: 37
0, // ReverseBytesL: 38
0, // ReverseBytesUS: 39
0, // ReverseBytesS: 40
0, // CProj: 41
0, // CacheWB: 42
0, // CacheWBPreSync: 43
0, // CacheWBPostSync: 44
0, // CallDynamicJava: 45
0, // CallJava: 46
0, // CallLeaf: 47
0, // CallLeafNoFP: 48
0, // CallLeafVector: 49
0, // CallRuntime: 50
0, // CallNative: 51
0, // CallStaticJava: 52
0, // CastDD: 53
0, // CastFF: 54
0, // CastII: 55
0, // CastLL: 56
0, // CastVV: 57
0, // CastX2P: 58
0, // CastP2X: 59
0, // CastPP: 60
0, // Catch: 61
0, // CatchProj: 62
0, // CheckCastPP: 63
0, // ClearArray: 64
0, // ConstraintCast: 65
0, // CMoveD: 66
0, // CMoveVD: 67
0, // CMoveF: 68
0, // CMoveVF: 69
0, // CMoveI: 70
0, // CMoveL: 71
0, // CMoveP: 72
0, // CMoveN: 73
1, // CmpN: 74
1, // CmpD: 75
0, // CmpD3: 76
1, // CmpF: 77
0, // CmpF3: 78
1, // CmpI: 79
1, // CmpL: 80
0, // CmpL3: 81
0, // CmpLTMask: 82
1, // CmpP: 83
1, // CmpU: 84
1, // CmpUL: 85
0, // CompareAndSwapB: 86
0, // CompareAndSwapS: 87
0, // CompareAndSwapI: 88
0, // CompareAndSwapL: 89
0, // CompareAndSwapP: 90
0, // CompareAndSwapN: 91
0, // WeakCompareAndSwapB: 92
0, // WeakCompareAndSwapS: 93
0, // WeakCompareAndSwapI: 94
0, // WeakCompareAndSwapL: 95
0, // WeakCompareAndSwapP: 96
0, // WeakCompareAndSwapN: 97
0, // CompareAndExchangeB: 98
0, // CompareAndExchangeS: 99
0, // CompareAndExchangeI: 100
0, // CompareAndExchangeL: 101
0, // CompareAndExchangeP: 102
0, // CompareAndExchangeN: 103
0, // GetAndAddB: 104
0, // GetAndAddS: 105
0, // GetAndAddI: 106
0, // GetAndAddL: 107
0, // GetAndSetB: 108
0, // GetAndSetS: 109
0, // GetAndSetI: 110
0, // GetAndSetL: 111
0, // GetAndSetP: 112
0, // GetAndSetN: 113
0, // Con: 114
0, // ConN: 115
0, // ConNKlass: 116
0, // ConD: 117
0, // ConF: 118
0, // ConI: 119
0, // ConL: 120
0, // ConP: 121
0, // Conv2B: 122
0, // ConvD2F: 123
0, // ConvD2I: 124
0, // ConvD2L: 125
0, // ConvF2D: 126
0, // ConvF2I: 127
0, // ConvF2L: 128
0, // ConvI2D: 129
0, // ConvI2F: 130
0, // ConvI2L: 131
0, // ConvL2D: 132
0, // ConvL2F: 133
0, // ConvL2I: 134
0, // CountedLoop: 135
0, // CountedLoopEnd: 136
0, // OuterStripMinedLoop: 137
0, // OuterStripMinedLoopEnd: 138
0, // LongCountedLoop: 139
0, // LongCountedLoopEnd: 140
0, // CountLeadingZerosI: 141
0, // CountLeadingZerosL: 142
0, // CountTrailingZerosI: 143
0, // CountTrailingZerosL: 144
0, // CreateEx: 145
0, // DecodeN: 146
0, // DecodeNKlass: 147
0, // DivD: 148
0, // DivF: 149
0, // DivI: 150
0, // DivL: 151
0, // DivMod: 152
0, // DivModI: 153
0, // DivModL: 154
0, // EncodeISOArray: 155
0, // EncodeP: 156
0, // EncodePKlass: 157
1, // FastLock: 158
1, // FastUnlock: 159
0, // FmaD: 160
0, // FmaF: 161
0, // Goto: 162
0, // Halt: 163
0, // HasNegatives: 164
0, // If: 165
0, // RangeCheck: 166
0, // IfFalse: 167
0, // IfTrue: 168
0, // Initialize: 169
0, // JProj: 170
0, // Jump: 171
0, // JumpProj: 172
0, // LShiftI: 173
0, // LShiftL: 174
0, // LoadB: 175
0, // LoadUB: 176
0, // LoadUS: 177
0, // LoadD: 178
0, // LoadD_unaligned: 179
0, // LoadF: 180
0, // LoadI: 181
0, // LoadKlass: 182
0, // LoadNKlass: 183
0, // LoadL: 184
0, // LoadL_unaligned: 185
0, // LoadPLocked: 186
0, // LoadP: 187
0, // LoadN: 188
0, // LoadRange: 189
0, // LoadS: 190
0, // Lock: 191
0, // Loop: 192
0, // LoopLimit: 193
0, // Mach: 194
0, // MachNullCheck: 195
0, // MachProj: 196
0, // MulAddS2I: 197
0, // MaxI: 198
0, // MaxL: 199
0, // MaxD: 200
0, // MaxF: 201
0, // MemBarAcquire: 202
0, // LoadFence: 203
0, // SetVectMaskI: 204
0, // MemBarAcquireLock: 205
0, // MemBarCPUOrder: 206
0, // MemBarRelease: 207
0, // StoreFence: 208
0, // StoreStoreFence: 209
0, // MemBarReleaseLock: 210
0, // MemBarVolatile: 211
0, // MemBarStoreStore: 212
0, // MergeMem: 213
0, // MinI: 214
0, // MinL: 215
0, // MinF: 216
0, // MinD: 217
0, // ModD: 218
0, // ModF: 219
0, // ModI: 220
0, // ModL: 221
0, // MoveI2F: 222
0, // MoveF2I: 223
0, // MoveL2D: 224
0, // MoveD2L: 225
0, // MulD: 226
0, // MulF: 227
0, // MulHiL: 228
0, // UMulHiL: 229
0, // MulI: 230
0, // MulL: 231
0, // Multi: 232
0, // NegI: 233
0, // NegL: 234
0, // NegD: 235
0, // NegF: 236
0, // NeverBranch: 237
0, // OnSpinWait: 238
0, // Opaque1: 239
0, // OpaqueLoopInit: 240
0, // OpaqueLoopStride: 241
0, // Opaque2: 242
0, // Opaque3: 243
0, // Opaque4: 244
0, // ProfileBoolean: 245
0, // OrI: 246
0, // OrL: 247
1, // OverflowAddI: 248
1, // OverflowSubI: 249
1, // OverflowMulI: 250
1, // OverflowAddL: 251
1, // OverflowSubL: 252
1, // OverflowMulL: 253
0, // PCTable: 254
0, // Parm: 255
0, // PartialSubtypeCheck: 256
0, // SubTypeCheck: 257
0, // Phi: 258
0, // PopCountI: 259
0, // PopCountL: 260
0, // PopCountVI: 261
0, // PrefetchAllocation: 262
0, // Proj: 263
0, // RShiftI: 264
0, // RShiftL: 265
0, // Region: 266
0, // Rethrow: 267
0, // Return: 268
0, // Root: 269
0, // RoundDouble: 270
0, // RoundDoubleMode: 271
0, // RoundDoubleModeV: 272
0, // RoundFloat: 273
0, // RotateLeft: 274
0, // RotateLeftV: 275
0, // RotateRight: 276
0, // RotateRightV: 277
0, // SafePoint: 278
0, // SafePointScalarObject: 279
0, // ShenandoahCompareAndExchangeP: 280
0, // ShenandoahCompareAndExchangeN: 281
0, // ShenandoahCompareAndSwapN: 282
0, // ShenandoahCompareAndSwapP: 283
0, // ShenandoahWeakCompareAndSwapN: 284
0, // ShenandoahWeakCompareAndSwapP: 285
0, // ShenandoahIUBarrier: 286
0, // ShenandoahLoadReferenceBarrier: 287
0, // SCMemProj: 288
0, // CopySignD: 289
0, // CopySignF: 290
0, // SignumD: 291
0, // SignumF: 292
0, // SqrtD: 293
0, // SqrtF: 294
0, // Start: 295
0, // StartOSR: 296
0, // StoreB: 297
0, // StoreC: 298
0, // StoreCM: 299
0, // StorePConditional: 300
0, // StoreIConditional: 301
0, // StoreLConditional: 302
0, // StoreD: 303
0, // StoreF: 304
0, // StoreI: 305
0, // StoreL: 306
0, // StoreP: 307
0, // StoreN: 308
0, // StoreNKlass: 309
0, // StrComp: 310
0, // StrCompressedCopy: 311
0, // StrEquals: 312
0, // StrIndexOf: 313
0, // StrIndexOfChar: 314
0, // StrInflatedCopy: 315
0, // SubD: 316
0, // SubF: 317
0, // SubI: 318
0, // SubL: 319
0, // TailCall: 320
0, // TailJump: 321
0, // MacroLogicV: 322
0, // ThreadLocal: 323
0, // Unlock: 324
0, // URShiftB: 325
0, // URShiftS: 326
0, // URShiftI: 327
0, // URShiftL: 328
0, // XorI: 329
0, // XorL: 330
0, // Vector: 331
0, // AddVB: 332
0, // AddVS: 333
0, // AddVI: 334
0, // AddReductionVI: 335
0, // AddVL: 336
0, // AddReductionVL: 337
0, // AddVF: 338
0, // AddReductionVF: 339
0, // AddVD: 340
0, // AddReductionVD: 341
0, // SubVB: 342
0, // SubVS: 343
0, // SubVI: 344
0, // SubVL: 345
0, // SubVF: 346
0, // SubVD: 347
0, // MulVB: 348
0, // MulVS: 349
0, // MulVI: 350
0, // MulReductionVI: 351
0, // MulVL: 352
0, // MulReductionVL: 353
0, // MulVF: 354
0, // MulReductionVF: 355
0, // MulVD: 356
0, // MulReductionVD: 357
0, // MulAddVS2VI: 358
0, // FmaVD: 359
0, // FmaVF: 360
0, // DivVF: 361
0, // DivVD: 362
0, // AbsVB: 363
0, // AbsVS: 364
0, // AbsVI: 365
0, // AbsVL: 366
0, // AbsVF: 367
0, // AbsVD: 368
0, // NegVI: 369
0, // NegVF: 370
0, // NegVD: 371
0, // SqrtVD: 372
0, // SqrtVF: 373
0, // LShiftCntV: 374
0, // RShiftCntV: 375
0, // LShiftVB: 376
0, // LShiftVS: 377
0, // LShiftVI: 378
0, // LShiftVL: 379
0, // RShiftVB: 380
0, // RShiftVS: 381
0, // RShiftVI: 382
0, // RShiftVL: 383
0, // URShiftVB: 384
0, // URShiftVS: 385
0, // URShiftVI: 386
0, // URShiftVL: 387
0, // AndV: 388
0, // AndReductionV: 389
0, // OrV: 390
0, // OrReductionV: 391
0, // XorV: 392
0, // XorReductionV: 393
0, // MinV: 394
0, // MaxV: 395
0, // MinReductionV: 396
0, // MaxReductionV: 397
0, // LoadVector: 398
0, // LoadVectorGather: 399
0, // LoadVectorGatherMasked: 400
0, // StoreVector: 401
0, // StoreVectorScatter: 402
0, // StoreVectorScatterMasked: 403
0, // LoadVectorMasked: 404
0, // StoreVectorMasked: 405
0, // VectorCmpMasked: 406
0, // VectorMaskGen: 407
0, // VectorMaskOp: 408
0, // VectorMaskTrueCount: 409
0, // VectorMaskFirstTrue: 410
0, // VectorMaskLastTrue: 411
0, // VectorMaskToLong: 412
0, // VectorLongToMask: 413
0, // Pack: 414
0, // PackB: 415
0, // PackS: 416
0, // PackI: 417
0, // PackL: 418
0, // PackF: 419
0, // PackD: 420
0, // Pack2L: 421
0, // Pack2D: 422
0, // ReplicateB: 423
0, // ReplicateS: 424
0, // ReplicateI: 425
0, // ReplicateL: 426
0, // ReplicateF: 427
0, // ReplicateD: 428
0, // Extract: 429
0, // ExtractB: 430
0, // ExtractUB: 431
0, // ExtractC: 432
0, // ExtractS: 433
0, // ExtractI: 434
0, // ExtractL: 435
0, // ExtractF: 436
0, // ExtractD: 437
0, // Digit: 438
0, // LowerCase: 439
0, // UpperCase: 440
0, // Whitespace: 441
0, // VectorBox: 442
0, // VectorBoxAllocate: 443
0, // VectorUnbox: 444
0, // VectorMaskWrapper: 445
0, // VectorMaskCmp: 446
0, // VectorMaskCast: 447
0, // VectorTest: 448
0, // VectorBlend: 449
0, // VectorRearrange: 450
0, // VectorLoadMask: 451
0, // VectorLoadShuffle: 452
0, // VectorLoadConst: 453
0, // VectorStoreMask: 454
0, // VectorReinterpret: 455
0, // VectorCast: 456
0, // VectorCastB2X: 457
0, // VectorCastS2X: 458
0, // VectorCastI2X: 459
0, // VectorCastL2X: 460
0, // VectorCastF2X: 461
0, // VectorCastD2X: 462
0, // VectorInsert: 463
0, // MaskAll: 464
0, // AndVMask: 465
0, // OrVMask: 466
0 // no trailing comma // XorVMask: 467
12962};
12963//  The following instructions can cisc-spill
12964//  MoveVL2F can cisc-spill operand 1 to loadF
12965//  MoveLEG2F can cisc-spill operand 1 to loadF
12966//  MoveVL2D can cisc-spill operand 1 to loadSSD
12967//  MoveLEG2D can cisc-spill operand 1 to loadSSD
12968//  popCountI can cisc-spill operand 1 to popCountI_mem
12969//  popCountL can cisc-spill operand 1 to popCountL_mem
12970//  cmovI_reg can cisc-spill operand 4 to cmovI_mem
12971//  cmovI_regU can cisc-spill operand 4 to cmovI_memU
12972//  cmovI_regUCF can cisc-spill operand 4 to cmovI_memUCF
12973//  cmovL_reg can cisc-spill operand 4 to cmovL_mem
12974//  cmovL_regU can cisc-spill operand 4 to cmovL_memU
12975//  cmovL_regUCF can cisc-spill operand 4 to cmovL_memUCF
12976//  addI_rReg can cisc-spill operand 2 to addI_rReg_mem
12977//  addL_rReg can cisc-spill operand 2 to addL_rReg_mem
12978//  subI_rReg can cisc-spill operand 2 to subI_rReg_mem
12979//  subL_rReg can cisc-spill operand 2 to subL_rReg_mem
12980//  mulI_rReg can cisc-spill operand 2 to mulI_mem
12981//  mulI_rReg_imm can cisc-spill operand 1 to mulI_mem_imm
12982//  mulL_rReg can cisc-spill operand 2 to mulL_mem
12983//  mulL_rReg_imm can cisc-spill operand 1 to mulL_mem_imm
12984//  i2b can cisc-spill operand 1 to loadI2B
12985//  i2s can cisc-spill operand 1 to loadI2S
12986//  andI_rReg can cisc-spill operand 2 to andI_rReg_mem
12987//  andI2L_rReg_imm255 can cisc-spill operand 1 to loadI2L_immI_255
12988//  andI2L_rReg_imm65535 can cisc-spill operand 1 to loadI2L_immI_65535
12989//  andnI_rReg_rReg_rReg can cisc-spill operand 3 to andnI_rReg_rReg_mem
12990//  andnI_rReg_rReg_rReg_0 can cisc-spill operand 1 to andnI_rReg_rReg_mem_0
12991//  orI_rReg can cisc-spill operand 2 to orI_rReg_mem
12992//  xorI_rReg can cisc-spill operand 2 to xorI_rReg_mem
12993//  andL_rReg can cisc-spill operand 2 to andL_rReg_mem
12994//  andnL_rReg_rReg_rReg can cisc-spill operand 3 to andnL_rReg_rReg_mem
12995//  andnL_rReg_rReg_rReg_0 can cisc-spill operand 1 to andnL_rReg_rReg_mem_0
12996//  orL_rReg can cisc-spill operand 2 to orL_rReg_mem
12997//  xorL_rReg can cisc-spill operand 2 to xorL_rReg_mem
12998//  cmpF_cc_reg can cisc-spill operand 2 to cmpF_cc_mem
12999//  cmpF_cc_reg_CF can cisc-spill operand 2 to cmpF_cc_memCF
13000//  cmpD_cc_reg can cisc-spill operand 2 to cmpD_cc_mem
13001//  cmpD_cc_reg_CF can cisc-spill operand 2 to cmpD_cc_memCF
13002//  cmpF_reg can cisc-spill operand 2 to cmpF_mem
13003//  cmpD_reg can cisc-spill operand 2 to cmpD_mem
13004//  convF2D_reg_reg can cisc-spill operand 1 to convF2D_reg_mem
13005//  convD2F_reg_reg can cisc-spill operand 1 to convD2F_reg_mem
13006//  convL2F_reg_reg can cisc-spill operand 1 to convL2F_reg_mem
13007//  convL2D_reg_reg can cisc-spill operand 1 to convL2D_reg_mem
13008//  convI2L_reg_reg can cisc-spill operand 1 to loadI2L
13009//  convI2L_reg_reg_zex can cisc-spill operand 1 to loadUI2L
13010//  MoveF2I_reg_reg can cisc-spill operand 1 to MoveF2I_stack_reg
13011//  MoveD2L_reg_reg can cisc-spill operand 1 to MoveD2L_stack_reg
13012//  MoveI2F_reg_reg can cisc-spill operand 1 to MoveI2F_stack_reg
13013//  compI_rReg can cisc-spill operand 2 to compI_rReg_mem
13014//  compU_rReg can cisc-spill operand 2 to compU_rReg_mem
13015//  compL_rReg can cisc-spill operand 2 to compL_rReg_mem
13016//  compUL_rReg can cisc-spill operand 2 to compUL_rReg_mem
13017//  addF_reg can cisc-spill operand 2 to addF_mem
13018//  addF_reg_reg can cisc-spill operand 2 to addF_reg_mem
13019//  addD_reg can cisc-spill operand 2 to addD_mem
13020//  addD_reg_reg can cisc-spill operand 2 to addD_reg_mem
13021//  subF_reg can cisc-spill operand 2 to subF_mem
13022//  subF_reg_reg can cisc-spill operand 2 to subF_reg_mem
13023//  subD_reg can cisc-spill operand 2 to subD_mem
13024//  subD_reg_reg can cisc-spill operand 2 to subD_reg_mem
13025//  mulF_reg can cisc-spill operand 2 to mulF_mem
13026//  mulF_reg_reg can cisc-spill operand 2 to mulF_reg_mem
13027//  mulD_reg can cisc-spill operand 2 to mulD_mem
13028//  mulD_reg_reg can cisc-spill operand 2 to mulD_reg_mem
13029//  divF_reg can cisc-spill operand 2 to divF_mem
13030//  divF_reg_reg can cisc-spill operand 2 to divF_reg_mem
13031//  divD_reg can cisc-spill operand 2 to divD_mem
13032//  divD_reg_reg can cisc-spill operand 2 to divD_reg_mem
13033//  roundD_reg can cisc-spill operand 1 to roundD_mem
13034//  ReplI_reg can cisc-spill operand 1 to ReplI_mem
13035//  ReplL_reg can cisc-spill operand 1 to ReplL_mem
13036//  ReplF_reg can cisc-spill operand 1 to ReplF_mem
13037//  ReplD_reg can cisc-spill operand 1 to ReplD_mem



13041// An array of character pointers to machine register names.
13042const char *Matcher::regName[REG_COUNT559] = {
"R10",
"R10_H",
"R11",
"R11_H",
"R8",
"R8_H",
"R9",
"R9_H",
"R12",
"R12_H",
"RCX",
"RCX_H",
"RBX",
"RBX_H",
"RDI",
"RDI_H",
"RDX",
"RDX_H",
"RSI",
"RSI_H",
"RAX",
"RAX_H",
"RBP",
"RBP_H",
"R13",
"R13_H",
"R14",
"R14_H",
"R15",
"R15_H",
"RSP",
"RSP_H",
"XMM0",
"XMM0b",
"XMM0c",
"XMM0d",
"XMM0e",
"XMM0f",
"XMM0g",
"XMM0h",
"XMM0i",
"XMM0j",
"XMM0k",
"XMM0l",
"XMM0m",
"XMM0n",
"XMM0o",
"XMM0p",
"XMM1",
"XMM1b",
"XMM1c",
"XMM1d",
"XMM1e",
"XMM1f",
"XMM1g",
"XMM1h",
"XMM1i",
"XMM1j",
"XMM1k",
"XMM1l",
"XMM1m",
"XMM1n",
"XMM1o",
"XMM1p",
"XMM2",
"XMM2b",
"XMM2c",
"XMM2d",
"XMM2e",
"XMM2f",
"XMM2g",
"XMM2h",
"XMM2i",
"XMM2j",
"XMM2k",
"XMM2l",
"XMM2m",
"XMM2n",
"XMM2o",
"XMM2p",
"XMM3",
"XMM3b",
"XMM3c",
"XMM3d",
"XMM3e",
"XMM3f",
"XMM3g",
"XMM3h",
"XMM3i",
"XMM3j",
"XMM3k",
"XMM3l",
"XMM3m",
"XMM3n",
"XMM3o",
"XMM3p",
"XMM4",
"XMM4b",
"XMM4c",
"XMM4d",
"XMM4e",
"XMM4f",
"XMM4g",
"XMM4h",
"XMM4i",
"XMM4j",
"XMM4k",
"XMM4l",
"XMM4m",
"XMM4n",
"XMM4o",
"XMM4p",
"XMM5",
"XMM5b",
"XMM5c",
"XMM5d",
"XMM5e",
"XMM5f",
"XMM5g",
"XMM5h",
"XMM5i",
"XMM5j",
"XMM5k",
"XMM5l",
"XMM5m",
"XMM5n",
"XMM5o",
"XMM5p",
"XMM6",
"XMM6b",
"XMM6c",
"XMM6d",
"XMM6e",
"XMM6f",
"XMM6g",
"XMM6h",
"XMM6i",
"XMM6j",
"XMM6k",
"XMM6l",
"XMM6m",
"XMM6n",
"XMM6o",
"XMM6p",
"XMM7",
"XMM7b",
"XMM7c",
"XMM7d",
"XMM7e",
"XMM7f",
"XMM7g",
"XMM7h",
"XMM7i",
"XMM7j",
"XMM7k",
"XMM7l",
"XMM7m",
"XMM7n",
"XMM7o",
"XMM7p",
"XMM8",
"XMM8b",
"XMM8c",
"XMM8d",
"XMM8e",
"XMM8f",
"XMM8g",
"XMM8h",
"XMM8i",
"XMM8j",
"XMM8k",
"XMM8l",
"XMM8m",
"XMM8n",
"XMM8o",
"XMM8p",
"XMM9",
"XMM9b",
"XMM9c",
"XMM9d",
"XMM9e",
"XMM9f",
"XMM9g",
"XMM9h",
"XMM9i",
"XMM9j",
"XMM9k",
"XMM9l",
"XMM9m",
"XMM9n",
"XMM9o",
"XMM9p",
"XMM10",
"XMM10b",
"XMM10c",
"XMM10d",
"XMM10e",
"XMM10f",
"XMM10g",
"XMM10h",
"XMM10i",
"XMM10j",
"XMM10k",
"XMM10l",
"XMM10m",
"XMM10n",
"XMM10o",
"XMM10p",
"XMM11",
"XMM11b",
"XMM11c",
"XMM11d",
"XMM11e",
"XMM11f",
"XMM11g",
"XMM11h",
"XMM11i",
"XMM11j",
"XMM11k",
"XMM11l",
"XMM11m",
"XMM11n",
"XMM11o",
"XMM11p",
"XMM12",
"XMM12b",
"XMM12c",
"XMM12d",
"XMM12e",
"XMM12f",
"XMM12g",
"XMM12h",
"XMM12i",
"XMM12j",
"XMM12k",
"XMM12l",
"XMM12m",
"XMM12n",
"XMM12o",
"XMM12p",
"XMM13",
"XMM13b",
"XMM13c",
"XMM13d",
"XMM13e",
"XMM13f",
"XMM13g",
"XMM13h",
"XMM13i",
"XMM13j",
"XMM13k",
"XMM13l",
"XMM13m",
"XMM13n",
"XMM13o",
"XMM13p",
"XMM14",
"XMM14b",
"XMM14c",
"XMM14d",
"XMM14e",
"XMM14f",
"XMM14g",
"XMM14h",
"XMM14i",
"XMM14j",
"XMM14k",
"XMM14l",
"XMM14m",
"XMM14n",
"XMM14o",
"XMM14p",
"XMM15",
"XMM15b",
"XMM15c",
"XMM15d",
"XMM15e",
"XMM15f",
"XMM15g",
"XMM15h",
"XMM15i",
"XMM15j",
"XMM15k",
"XMM15l",
"XMM15m",
"XMM15n",
"XMM15o",
"XMM15p",
"XMM16",
"XMM16b",
"XMM16c",
"XMM16d",
"XMM16e",
"XMM16f",
"XMM16g",
"XMM16h",
"XMM16i",
"XMM16j",
"XMM16k",
"XMM16l",
"XMM16m",
"XMM16n",
"XMM16o",
"XMM16p",
"XMM17",
"XMM17b",
"XMM17c",
"XMM17d",
"XMM17e",
"XMM17f",
"XMM17g",
"XMM17h",
"XMM17i",
"XMM17j",
"XMM17k",
"XMM17l",
"XMM17m",
"XMM17n",
"XMM17o",
"XMM17p",
"XMM18",
"XMM18b",
"XMM18c",
"XMM18d",
"XMM18e",
"XMM18f",
"XMM18g",
"XMM18h",
"XMM18i",
"XMM18j",
"XMM18k",
"XMM18l",
"XMM18m",
"XMM18n",
"XMM18o",
"XMM18p",
"XMM19",
"XMM19b",
"XMM19c",
"XMM19d",
"XMM19e",
"XMM19f",
"XMM19g",
"XMM19h",
"XMM19i",
"XMM19j",
"XMM19k",
"XMM19l",
"XMM19m",
"XMM19n",
"XMM19o",
"XMM19p",
"XMM20",
"XMM20b",
"XMM20c",
"XMM20d",
"XMM20e",
"XMM20f",
"XMM20g",
"XMM20h",
"XMM20i",
"XMM20j",
"XMM20k",
"XMM20l",
"XMM20m",
"XMM20n",
"XMM20o",
"XMM20p",
"XMM21",
"XMM21b",
"XMM21c",
"XMM21d",
"XMM21e",
"XMM21f",
"XMM21g",
"XMM21h",
"XMM21i",
"XMM21j",
"XMM21k",
"XMM21l",
"XMM21m",
"XMM21n",
"XMM21o",
"XMM21p",
"XMM22",
"XMM22b",
"XMM22c",
"XMM22d",
"XMM22e",
"XMM22f",
"XMM22g",
"XMM22h",
"XMM22i",
"XMM22j",
"XMM22k",
"XMM22l",
"XMM22m",
"XMM22n",
"XMM22o",
"XMM22p",
"XMM23",
"XMM23b",
"XMM23c",
"XMM23d",
"XMM23e",
"XMM23f",
"XMM23g",
"XMM23h",
"XMM23i",
"XMM23j",
"XMM23k",
"XMM23l",
"XMM23m",
"XMM23n",
"XMM23o",
"XMM23p",
"XMM24",
"XMM24b",
"XMM24c",
"XMM24d",
"XMM24e",
"XMM24f",
"XMM24g",
"XMM24h",
"XMM24i",
"XMM24j",
"XMM24k",
"XMM24l",
"XMM24m",
"XMM24n",
"XMM24o",
"XMM24p",
"XMM25",
"XMM25b",
"XMM25c",
"XMM25d",
"XMM25e",
"XMM25f",
"XMM25g",
"XMM25h",
"XMM25i",
"XMM25j",
"XMM25k",
"XMM25l",
"XMM25m",
"XMM25n",
"XMM25o",
"XMM25p",
"XMM26",
"XMM26b",
"XMM26c",
"XMM26d",
"XMM26e",
"XMM26f",
"XMM26g",
"XMM26h",
"XMM26i",
"XMM26j",
"XMM26k",
"XMM26l",
"XMM26m",
"XMM26n",
"XMM26o",
"XMM26p",
"XMM27",
"XMM27b",
"XMM27c",
"XMM27d",
"XMM27e",
"XMM27f",
"XMM27g",
"XMM27h",
"XMM27i",
"XMM27j",
"XMM27k",
"XMM27l",
"XMM27m",
"XMM27n",
"XMM27o",
"XMM27p",
"XMM28",
"XMM28b",
"XMM28c",
"XMM28d",
"XMM28e",
"XMM28f",
"XMM28g",
"XMM28h",
"XMM28i",
"XMM28j",
"XMM28k",
"XMM28l",
"XMM28m",
"XMM28n",
"XMM28o",
"XMM28p",
"XMM29",
"XMM29b",
"XMM29c",
"XMM29d",
"XMM29e",
"XMM29f",
"XMM29g",
"XMM29h",
"XMM29i",
"XMM29j",
"XMM29k",
"XMM29l",
"XMM29m",
"XMM29n",
"XMM29o",
"XMM29p",
"XMM30",
"XMM30b",
"XMM30c",
"XMM30d",
"XMM30e",
"XMM30f",
"XMM30g",
"XMM30h",
"XMM30i",
"XMM30j",
"XMM30k",
"XMM30l",
"XMM30m",
"XMM30n",
"XMM30o",
"XMM30p",
"XMM31",
"XMM31b",
"XMM31c",
"XMM31d",
"XMM31e",
"XMM31f",
"XMM31g",
"XMM31h",
"XMM31i",
"XMM31j",
"XMM31k",
"XMM31l",
"XMM31m",
"XMM31n",
"XMM31o",
"XMM31p",
"K7",
"K7_H",
"K6",
"K6_H",
"K5",
"K5_H",
"K4",
"K4_H",
"K3",
"K3_H",
"K2",
"K2_H",
"K1",
"K1_H",
"RFLAGS" // no trailing comma
13602};

13604// An array of character pointers to machine register names.
13605const VMReg OptoReg::opto2vm[REG_COUNT559] = {
r10->as_VMReg(),
r10->as_VMReg()->next(),
r11->as_VMReg(),
r11->as_VMReg()->next(),
r8->as_VMReg(),
r8->as_VMReg()->next(),
r9->as_VMReg(),
r9->as_VMReg()->next(),
r12->as_VMReg(),
r12->as_VMReg()->next(),
rcx->as_VMReg(),
rcx->as_VMReg()->next(),
rbx->as_VMReg(),
rbx->as_VMReg()->next(),
rdi->as_VMReg(),
rdi->as_VMReg()->next(),
rdx->as_VMReg(),
rdx->as_VMReg()->next(),
rsi->as_VMReg(),
rsi->as_VMReg()->next(),
rax->as_VMReg(),
rax->as_VMReg()->next(),
rbp->as_VMReg(),
rbp->as_VMReg()->next(),
r13->as_VMReg(),
r13->as_VMReg()->next(),
r14->as_VMReg(),
r14->as_VMReg()->next(),
r15->as_VMReg(),
r15->as_VMReg()->next(),
rsp->as_VMReg(),
rsp->as_VMReg()->next(),
xmm0->as_VMReg(),
xmm0->as_VMReg()->next(1),
xmm0->as_VMReg()->next(2),
xmm0->as_VMReg()->next(3),
xmm0->as_VMReg()->next(4),
xmm0->as_VMReg()->next(5),
xmm0->as_VMReg()->next(6),
xmm0->as_VMReg()->next(7),
xmm0->as_VMReg()->next(8),
xmm0->as_VMReg()->next(9),
xmm0->as_VMReg()->next(10),
xmm0->as_VMReg()->next(11),
xmm0->as_VMReg()->next(12),
xmm0->as_VMReg()->next(13),
xmm0->as_VMReg()->next(14),
xmm0->as_VMReg()->next(15),
xmm1->as_VMReg(),
xmm1->as_VMReg()->next(1),
xmm1->as_VMReg()->next(2),
xmm1->as_VMReg()->next(3),
xmm1->as_VMReg()->next(4),
xmm1->as_VMReg()->next(5),
xmm1->as_VMReg()->next(6),
xmm1->as_VMReg()->next(7),
xmm1->as_VMReg()->next(8),
xmm1->as_VMReg()->next(9),
xmm1->as_VMReg()->next(10),
xmm1->as_VMReg()->next(11),
xmm1->as_VMReg()->next(12),
xmm1->as_VMReg()->next(13),
xmm1->as_VMReg()->next(14),
xmm1->as_VMReg()->next(15),
xmm2->as_VMReg(),
xmm2->as_VMReg()->next(1),
xmm2->as_VMReg()->next(2),
xmm2->as_VMReg()->next(3),
xmm2->as_VMReg()->next(4),
xmm2->as_VMReg()->next(5),
xmm2->as_VMReg()->next(6),
xmm2->as_VMReg()->next(7),
xmm2->as_VMReg()->next(8),
xmm2->as_VMReg()->next(9),
xmm2->as_VMReg()->next(10),
xmm2->as_VMReg()->next(11),
xmm2->as_VMReg()->next(12),
xmm2->as_VMReg()->next(13),
xmm2->as_VMReg()->next(14),
xmm2->as_VMReg()->next(15),
xmm3->as_VMReg(),
xmm3->as_VMReg()->next(1),
xmm3->as_VMReg()->next(2),
xmm3->as_VMReg()->next(3),
xmm3->as_VMReg()->next(4),
xmm3->as_VMReg()->next(5),
xmm3->as_VMReg()->next(6),
xmm3->as_VMReg()->next(7),
xmm3->as_VMReg()->next(8),
xmm3->as_VMReg()->next(9),
xmm3->as_VMReg()->next(10),
xmm3->as_VMReg()->next(11),
xmm3->as_VMReg()->next(12),
xmm3->as_VMReg()->next(13),
xmm3->as_VMReg()->next(14),
xmm3->as_VMReg()->next(15),
xmm4->as_VMReg(),
xmm4->as_VMReg()->next(1),
xmm4->as_VMReg()->next(2),
xmm4->as_VMReg()->next(3),
xmm4->as_VMReg()->next(4),
xmm4->as_VMReg()->next(5),
xmm4->as_VMReg()->next(6),
xmm4->as_VMReg()->next(7),
xmm4->as_VMReg()->next(8),
xmm4->as_VMReg()->next(9),
xmm4->as_VMReg()->next(10),
xmm4->as_VMReg()->next(11),
xmm4->as_VMReg()->next(12),
xmm4->as_VMReg()->next(13),
xmm4->as_VMReg()->next(14),
xmm4->as_VMReg()->next(15),
xmm5->as_VMReg(),
xmm5->as_VMReg()->next(1),
xmm5->as_VMReg()->next(2),
xmm5->as_VMReg()->next(3),
xmm5->as_VMReg()->next(4),
xmm5->as_VMReg()->next(5),
xmm5->as_VMReg()->next(6),
xmm5->as_VMReg()->next(7),
xmm5->as_VMReg()->next(8),
xmm5->as_VMReg()->next(9),
xmm5->as_VMReg()->next(10),
xmm5->as_VMReg()->next(11),
xmm5->as_VMReg()->next(12),
xmm5->as_VMReg()->next(13),
xmm5->as_VMReg()->next(14),
xmm5->as_VMReg()->next(15),
xmm6->as_VMReg(),
xmm6->as_VMReg()->next(1),
xmm6->as_VMReg()->next(2),
xmm6->as_VMReg()->next(3),
xmm6->as_VMReg()->next(4),
xmm6->as_VMReg()->next(5),
xmm6->as_VMReg()->next(6),
xmm6->as_VMReg()->next(7),
xmm6->as_VMReg()->next(8),
xmm6->as_VMReg()->next(9),
xmm6->as_VMReg()->next(10),
xmm6->as_VMReg()->next(11),
xmm6->as_VMReg()->next(12),
xmm6->as_VMReg()->next(13),
xmm6->as_VMReg()->next(14),
xmm6->as_VMReg()->next(15),
xmm7->as_VMReg(),
xmm7->as_VMReg()->next(1),
xmm7->as_VMReg()->next(2),
xmm7->as_VMReg()->next(3),
xmm7->as_VMReg()->next(4),
xmm7->as_VMReg()->next(5),
xmm7->as_VMReg()->next(6),
xmm7->as_VMReg()->next(7),
xmm7->as_VMReg()->next(8),
xmm7->as_VMReg()->next(9),
xmm7->as_VMReg()->next(10),
xmm7->as_VMReg()->next(11),
xmm7->as_VMReg()->next(12),
xmm7->as_VMReg()->next(13),
xmm7->as_VMReg()->next(14),
xmm7->as_VMReg()->next(15),
xmm8->as_VMReg(),
xmm8->as_VMReg()->next(1),
xmm8->as_VMReg()->next(2),
xmm8->as_VMReg()->next(3),
xmm8->as_VMReg()->next(4),
xmm8->as_VMReg()->next(5),
xmm8->as_VMReg()->next(6),
xmm8->as_VMReg()->next(7),
xmm8->as_VMReg()->next(8),
xmm8->as_VMReg()->next(9),
xmm8->as_VMReg()->next(10),
xmm8->as_VMReg()->next(11),
xmm8->as_VMReg()->next(12),
xmm8->as_VMReg()->next(13),
xmm8->as_VMReg()->next(14),
xmm8->as_VMReg()->next(15),
xmm9->as_VMReg(),
xmm9->as_VMReg()->next(1),
xmm9->as_VMReg()->next(2),
xmm9->as_VMReg()->next(3),
xmm9->as_VMReg()->next(4),
xmm9->as_VMReg()->next(5),
xmm9->as_VMReg()->next(6),
xmm9->as_VMReg()->next(7),
xmm9->as_VMReg()->next(8),
xmm9->as_VMReg()->next(9),
xmm9->as_VMReg()->next(10),
xmm9->as_VMReg()->next(11),
xmm9->as_VMReg()->next(12),
xmm9->as_VMReg()->next(13),
xmm9->as_VMReg()->next(14),
xmm9->as_VMReg()->next(15),
xmm10->as_VMReg(),
xmm10->as_VMReg()->next(1),
xmm10->as_VMReg()->next(2),
xmm10->as_VMReg()->next(3),
xmm10->as_VMReg()->next(4),
xmm10->as_VMReg()->next(5),
xmm10->as_VMReg()->next(6),
xmm10->as_VMReg()->next(7),
xmm10->as_VMReg()->next(8),
xmm10->as_VMReg()->next(9),
xmm10->as_VMReg()->next(10),
xmm10->as_VMReg()->next(11),
xmm10->as_VMReg()->next(12),
xmm10->as_VMReg()->next(13),
xmm10->as_VMReg()->next(14),
xmm10->as_VMReg()->next(15),
xmm11->as_VMReg(),
xmm11->as_VMReg()->next(1),
xmm11->as_VMReg()->next(2),
xmm11->as_VMReg()->next(3),
xmm11->as_VMReg()->next(4),
xmm11->as_VMReg()->next(5),
xmm11->as_VMReg()->next(6),
xmm11->as_VMReg()->next(7),
xmm11->as_VMReg()->next(8),
xmm11->as_VMReg()->next(9),
xmm11->as_VMReg()->next(10),
xmm11->as_VMReg()->next(11),
xmm11->as_VMReg()->next(12),
xmm11->as_VMReg()->next(13),
xmm11->as_VMReg()->next(14),
xmm11->as_VMReg()->next(15),
xmm12->as_VMReg(),
xmm12->as_VMReg()->next(1),
xmm12->as_VMReg()->next(2),
xmm12->as_VMReg()->next(3),
xmm12->as_VMReg()->next(4),
xmm12->as_VMReg()->next(5),
xmm12->as_VMReg()->next(6),
xmm12->as_VMReg()->next(7),
xmm12->as_VMReg()->next(8),
xmm12->as_VMReg()->next(9),
xmm12->as_VMReg()->next(10),
xmm12->as_VMReg()->next(11),
xmm12->as_VMReg()->next(12),
xmm12->as_VMReg()->next(13),
xmm12->as_VMReg()->next(14),
xmm12->as_VMReg()->next(15),
xmm13->as_VMReg(),
xmm13->as_VMReg()->next(1),
xmm13->as_VMReg()->next(2),
xmm13->as_VMReg()->next(3),
xmm13->as_VMReg()->next(4),
xmm13->as_VMReg()->next(5),
xmm13->as_VMReg()->next(6),
xmm13->as_VMReg()->next(7),
xmm13->as_VMReg()->next(8),
xmm13->as_VMReg()->next(9),
xmm13->as_VMReg()->next(10),
xmm13->as_VMReg()->next(11),
xmm13->as_VMReg()->next(12),
xmm13->as_VMReg()->next(13),
xmm13->as_VMReg()->next(14),
xmm13->as_VMReg()->next(15),
xmm14->as_VMReg(),
xmm14->as_VMReg()->next(1),
xmm14->as_VMReg()->next(2),
xmm14->as_VMReg()->next(3),
xmm14->as_VMReg()->next(4),
xmm14->as_VMReg()->next(5),
xmm14->as_VMReg()->next(6),
xmm14->as_VMReg()->next(7),
xmm14->as_VMReg()->next(8),
xmm14->as_VMReg()->next(9),
xmm14->as_VMReg()->next(10),
xmm14->as_VMReg()->next(11),
xmm14->as_VMReg()->next(12),
xmm14->as_VMReg()->next(13),
xmm14->as_VMReg()->next(14),
xmm14->as_VMReg()->next(15),
xmm15->as_VMReg(),
xmm15->as_VMReg()->next(1),
xmm15->as_VMReg()->next(2),
xmm15->as_VMReg()->next(3),
xmm15->as_VMReg()->next(4),
xmm15->as_VMReg()->next(5),
xmm15->as_VMReg()->next(6),
xmm15->as_VMReg()->next(7),
xmm15->as_VMReg()->next(8),
xmm15->as_VMReg()->next(9),
xmm15->as_VMReg()->next(10),
xmm15->as_VMReg()->next(11),
xmm15->as_VMReg()->next(12),
xmm15->as_VMReg()->next(13),
xmm15->as_VMReg()->next(14),
xmm15->as_VMReg()->next(15),
xmm16->as_VMReg(),
xmm16->as_VMReg()->next(1),
xmm16->as_VMReg()->next(2),
xmm16->as_VMReg()->next(3),
xmm16->as_VMReg()->next(4),
xmm16->as_VMReg()->next(5),
xmm16->as_VMReg()->next(6),
xmm16->as_VMReg()->next(7),
xmm16->as_VMReg()->next(8),
xmm16->as_VMReg()->next(9),
xmm16->as_VMReg()->next(10),
xmm16->as_VMReg()->next(11),
xmm16->as_VMReg()->next(12),
xmm16->as_VMReg()->next(13),
xmm16->as_VMReg()->next(14),
xmm16->as_VMReg()->next(15),
xmm17->as_VMReg(),
xmm17->as_VMReg()->next(1),
xmm17->as_VMReg()->next(2),
xmm17->as_VMReg()->next(3),
xmm17->as_VMReg()->next(4),
xmm17->as_VMReg()->next(5),
xmm17->as_VMReg()->next(6),
xmm17->as_VMReg()->next(7),
xmm17->as_VMReg()->next(8),
xmm17->as_VMReg()->next(9),
xmm17->as_VMReg()->next(10),
xmm17->as_VMReg()->next(11),
xmm17->as_VMReg()->next(12),
xmm17->as_VMReg()->next(13),
xmm17->as_VMReg()->next(14),
xmm17->as_VMReg()->next(15),
xmm18->as_VMReg(),
xmm18->as_VMReg()->next(1),
xmm18->as_VMReg()->next(2),
xmm18->as_VMReg()->next(3),
xmm18->as_VMReg()->next(4),
xmm18->as_VMReg()->next(5),
xmm18->as_VMReg()->next(6),
xmm18->as_VMReg()->next(7),
xmm18->as_VMReg()->next(8),
xmm18->as_VMReg()->next(9),
xmm18->as_VMReg()->next(10),
xmm18->as_VMReg()->next(11),
xmm18->as_VMReg()->next(12),
xmm18->as_VMReg()->next(13),
xmm18->as_VMReg()->next(14),
xmm18->as_VMReg()->next(15),
xmm19->as_VMReg(),
xmm19->as_VMReg()->next(1),
xmm19->as_VMReg()->next(2),
xmm19->as_VMReg()->next(3),
xmm19->as_VMReg()->next(4),
xmm19->as_VMReg()->next(5),
xmm19->as_VMReg()->next(6),
xmm19->as_VMReg()->next(7),
xmm19->as_VMReg()->next(8),
xmm19->as_VMReg()->next(9),
xmm19->as_VMReg()->next(10),
xmm19->as_VMReg()->next(11),
xmm19->as_VMReg()->next(12),
xmm19->as_VMReg()->next(13),
xmm19->as_VMReg()->next(14),
xmm19->as_VMReg()->next(15),
xmm20->as_VMReg(),
xmm20->as_VMReg()->next(1),
xmm20->as_VMReg()->next(2),
xmm20->as_VMReg()->next(3),
xmm20->as_VMReg()->next(4),
xmm20->as_VMReg()->next(5),
xmm20->as_VMReg()->next(6),
xmm20->as_VMReg()->next(7),
xmm20->as_VMReg()->next(8),
xmm20->as_VMReg()->next(9),
xmm20->as_VMReg()->next(10),
xmm20->as_VMReg()->next(11),
xmm20->as_VMReg()->next(12),
xmm20->as_VMReg()->next(13),
xmm20->as_VMReg()->next(14),
xmm20->as_VMReg()->next(15),
xmm21->as_VMReg(),
xmm21->as_VMReg()->next(1),
xmm21->as_VMReg()->next(2),
xmm21->as_VMReg()->next(3),
xmm21->as_VMReg()->next(4),
xmm21->as_VMReg()->next(5),
xmm21->as_VMReg()->next(6),
xmm21->as_VMReg()->next(7),
xmm21->as_VMReg()->next(8),
xmm21->as_VMReg()->next(9),
xmm21->as_VMReg()->next(10),
xmm21->as_VMReg()->next(11),
xmm21->as_VMReg()->next(12),
xmm21->as_VMReg()->next(13),
xmm21->as_VMReg()->next(14),
xmm21->as_VMReg()->next(15),
xmm22->as_VMReg(),
xmm22->as_VMReg()->next(1),
xmm22->as_VMReg()->next(2),
xmm22->as_VMReg()->next(3),
xmm22->as_VMReg()->next(4),
xmm22->as_VMReg()->next(5),
xmm22->as_VMReg()->next(6),
xmm22->as_VMReg()->next(7),
xmm22->as_VMReg()->next(8),
xmm22->as_VMReg()->next(9),
xmm22->as_VMReg()->next(10),
xmm22->as_VMReg()->next(11),
xmm22->as_VMReg()->next(12),
xmm22->as_VMReg()->next(13),
xmm22->as_VMReg()->next(14),
xmm22->as_VMReg()->next(15),
xmm23->as_VMReg(),
xmm23->as_VMReg()->next(1),
xmm23->as_VMReg()->next(2),
xmm23->as_VMReg()->next(3),
xmm23->as_VMReg()->next(4),
xmm23->as_VMReg()->next(5),
xmm23->as_VMReg()->next(6),
xmm23->as_VMReg()->next(7),
xmm23->as_VMReg()->next(8),
xmm23->as_VMReg()->next(9),
xmm23->as_VMReg()->next(10),
xmm23->as_VMReg()->next(11),
xmm23->as_VMReg()->next(12),
xmm23->as_VMReg()->next(13),
xmm23->as_VMReg()->next(14),
xmm23->as_VMReg()->next(15),
xmm24->as_VMReg(),
xmm24->as_VMReg()->next(1),
xmm24->as_VMReg()->next(2),
xmm24->as_VMReg()->next(3),
xmm24->as_VMReg()->next(4),
xmm24->as_VMReg()->next(5),
xmm24->as_VMReg()->next(6),
xmm24->as_VMReg()->next(7),
xmm24->as_VMReg()->next(8),
xmm24->as_VMReg()->next(9),
xmm24->as_VMReg()->next(10),
xmm24->as_VMReg()->next(11),
xmm24->as_VMReg()->next(12),
xmm24->as_VMReg()->next(13),
xmm24->as_VMReg()->next(14),
xmm24->as_VMReg()->next(15),
xmm25->as_VMReg(),
xmm25->as_VMReg()->next(1),
xmm25->as_VMReg()->next(2),
xmm25->as_VMReg()->next(3),
xmm25->as_VMReg()->next(4),
xmm25->as_VMReg()->next(5),
xmm25->as_VMReg()->next(6),
xmm25->as_VMReg()->next(7),
xmm25->as_VMReg()->next(8),
xmm25->as_VMReg()->next(9),
xmm25->as_VMReg()->next(10),
xmm25->as_VMReg()->next(11),
xmm25->as_VMReg()->next(12),
xmm25->as_VMReg()->next(13),
xmm25->as_VMReg()->next(14),
xmm25->as_VMReg()->next(15),
xmm26->as_VMReg(),
xmm26->as_VMReg()->next(1),
xmm26->as_VMReg()->next(2),
xmm26->as_VMReg()->next(3),
xmm26->as_VMReg()->next(4),
xmm26->as_VMReg()->next(5),
xmm26->as_VMReg()->next(6),
xmm26->as_VMReg()->next(7),
xmm26->as_VMReg()->next(8),
xmm26->as_VMReg()->next(9),
xmm26->as_VMReg()->next(10),
xmm26->as_VMReg()->next(11),
xmm26->as_VMReg()->next(12),
xmm26->as_VMReg()->next(13),
xmm26->as_VMReg()->next(14),
xmm26->as_VMReg()->next(15),
xmm27->as_VMReg(),
xmm27->as_VMReg()->next(1),
xmm27->as_VMReg()->next(2),
xmm27->as_VMReg()->next(3),
xmm27->as_VMReg()->next(4),
xmm27->as_VMReg()->next(5),
xmm27->as_VMReg()->next(6),
xmm27->as_VMReg()->next(7),
xmm27->as_VMReg()->next(8),
xmm27->as_VMReg()->next(9),
xmm27->as_VMReg()->next(10),
xmm27->as_VMReg()->next(11),
xmm27->as_VMReg()->next(12),
xmm27->as_VMReg()->next(13),
xmm27->as_VMReg()->next(14),
xmm27->as_VMReg()->next(15),
xmm28->as_VMReg(),
xmm28->as_VMReg()->next(1),
xmm28->as_VMReg()->next(2),
xmm28->as_VMReg()->next(3),
xmm28->as_VMReg()->next(4),
xmm28->as_VMReg()->next(5),
xmm28->as_VMReg()->next(6),
xmm28->as_VMReg()->next(7),
xmm28->as_VMReg()->next(8),
xmm28->as_VMReg()->next(9),
xmm28->as_VMReg()->next(10),
xmm28->as_VMReg()->next(11),
xmm28->as_VMReg()->next(12),
xmm28->as_VMReg()->next(13),
xmm28->as_VMReg()->next(14),
xmm28->as_VMReg()->next(15),
xmm29->as_VMReg(),
xmm29->as_VMReg()->next(1),
xmm29->as_VMReg()->next(2),
xmm29->as_VMReg()->next(3),
xmm29->as_VMReg()->next(4),
xmm29->as_VMReg()->next(5),
xmm29->as_VMReg()->next(6),
xmm29->as_VMReg()->next(7),
xmm29->as_VMReg()->next(8),
xmm29->as_VMReg()->next(9),
xmm29->as_VMReg()->next(10),
xmm29->as_VMReg()->next(11),
xmm29->as_VMReg()->next(12),
xmm29->as_VMReg()->next(13),
xmm29->as_VMReg()->next(14),
xmm29->as_VMReg()->next(15),
xmm30->as_VMReg(),
xmm30->as_VMReg()->next(1),
xmm30->as_VMReg()->next(2),
xmm30->as_VMReg()->next(3),
xmm30->as_VMReg()->next(4),
xmm30->as_VMReg()->next(5),
xmm30->as_VMReg()->next(6),
xmm30->as_VMReg()->next(7),
xmm30->as_VMReg()->next(8),
xmm30->as_VMReg()->next(9),
xmm30->as_VMReg()->next(10),
xmm30->as_VMReg()->next(11),
xmm30->as_VMReg()->next(12),
xmm30->as_VMReg()->next(13),
xmm30->as_VMReg()->next(14),
xmm30->as_VMReg()->next(15),
xmm31->as_VMReg(),
xmm31->as_VMReg()->next(1),
xmm31->as_VMReg()->next(2),
xmm31->as_VMReg()->next(3),
xmm31->as_VMReg()->next(4),
xmm31->as_VMReg()->next(5),
xmm31->as_VMReg()->next(6),
xmm31->as_VMReg()->next(7),
xmm31->as_VMReg()->next(8),
xmm31->as_VMReg()->next(9),
xmm31->as_VMReg()->next(10),
xmm31->as_VMReg()->next(11),
xmm31->as_VMReg()->next(12),
xmm31->as_VMReg()->next(13),
xmm31->as_VMReg()->next(14),
xmm31->as_VMReg()->next(15),
k7->as_VMReg(),
k7->as_VMReg()->next(),
k6->as_VMReg(),
k6->as_VMReg()->next(),
k5->as_VMReg(),
k5->as_VMReg()->next(),
k4->as_VMReg(),
k4->as_VMReg()->next(),
k3->as_VMReg(),
k3->as_VMReg()->next(),
k2->as_VMReg(),
k2->as_VMReg()->next(),
k1->as_VMReg(),
k1->as_VMReg()->next(),
VMRegImpl::Bad() // no trailing comma
};

OptoReg::Name OptoReg::vm2opto[ConcreteRegisterImpl::number_of_registers];

14169// An array of the machine register encode values
14170const unsigned char Matcher::_regEncode[REG_COUNT559] = {
(unsigned char)'\xA',  // R10
(unsigned char)'\xA',  // R10_H
(unsigned char)'\xB',  // R11
(unsigned char)'\xB',  // R11_H
(unsigned char)'\x8',  // R8
(unsigned char)'\x8',  // R8_H
(unsigned char)'\x9',  // R9
(unsigned char)'\x9',  // R9_H
(unsigned char)'\xC',  // R12
(unsigned char)'\xC',  // R12_H
(unsigned char)'\x1',  // RCX
(unsigned char)'\x1',  // RCX_H
(unsigned char)'\x3',  // RBX
(unsigned char)'\x3',  // RBX_H
(unsigned char)'\x7',  // RDI
(unsigned char)'\x7',  // RDI_H
(unsigned char)'\x2',  // RDX
(unsigned char)'\x2',  // RDX_H
(unsigned char)'\x6',  // RSI
(unsigned char)'\x6',  // RSI_H
(unsigned char)'\x0',  // RAX
(unsigned char)'\x0',  // RAX_H
(unsigned char)'\x5',  // RBP
(unsigned char)'\x5',  // RBP_H
(unsigned char)'\xD',  // R13
(unsigned char)'\xD',  // R13_H
(unsigned char)'\xE',  // R14
(unsigned char)'\xE',  // R14_H
(unsigned char)'\xF',  // R15
(unsigned char)'\xF',  // R15_H
(unsigned char)'\x4',  // RSP
(unsigned char)'\x4',  // RSP_H
(unsigned char)'\x0',  // XMM0
(unsigned char)'\x0',  // XMM0b
(unsigned char)'\x0',  // XMM0c
(unsigned char)'\x0',  // XMM0d
(unsigned char)'\x0',  // XMM0e
(unsigned char)'\x0',  // XMM0f
(unsigned char)'\x0',  // XMM0g
(unsigned char)'\x0',  // XMM0h
(unsigned char)'\x0',  // XMM0i
(unsigned char)'\x0',  // XMM0j
(unsigned char)'\x0',  // XMM0k
(unsigned char)'\x0',  // XMM0l
(unsigned char)'\x0',  // XMM0m
(unsigned char)'\x0',  // XMM0n
(unsigned char)'\x0',  // XMM0o
(unsigned char)'\x0',  // XMM0p
(unsigned char)'\x1',  // XMM1
(unsigned char)'\x1',  // XMM1b
(unsigned char)'\x1',  // XMM1c
(unsigned char)'\x1',  // XMM1d
(unsigned char)'\x1',  // XMM1e
(unsigned char)'\x1',  // XMM1f
(unsigned char)'\x1',  // XMM1g
(unsigned char)'\x1',  // XMM1h
(unsigned char)'\x1',  // XMM1i
(unsigned char)'\x1',  // XMM1j
(unsigned char)'\x1',  // XMM1k
(unsigned char)'\x1',  // XMM1l
(unsigned char)'\x1',  // XMM1m
(unsigned char)'\x1',  // XMM1n
(unsigned char)'\x1',  // XMM1o
(unsigned char)'\x1',  // XMM1p
(unsigned char)'\x2',  // XMM2
(unsigned char)'\x2',  // XMM2b
(unsigned char)'\x2',  // XMM2c
(unsigned char)'\x2',  // XMM2d
(unsigned char)'\x2',  // XMM2e
(unsigned char)'\x2',  // XMM2f
(unsigned char)'\x2',  // XMM2g
(unsigned char)'\x2',  // XMM2h
(unsigned char)'\x2',  // XMM2i
(unsigned char)'\x2',  // XMM2j
(unsigned char)'\x2',  // XMM2k
(unsigned char)'\x2',  // XMM2l
(unsigned char)'\x2',  // XMM2m
(unsigned char)'\x2',  // XMM2n
(unsigned char)'\x2',  // XMM2o
(unsigned char)'\x2',  // XMM2p
(unsigned char)'\x3',  // XMM3
(unsigned char)'\x3',  // XMM3b
(unsigned char)'\x3',  // XMM3c
(unsigned char)'\x3',  // XMM3d
(unsigned char)'\x3',  // XMM3e
(unsigned char)'\x3',  // XMM3f
(unsigned char)'\x3',  // XMM3g
(unsigned char)'\x3',  // XMM3h
(unsigned char)'\x3',  // XMM3i
(unsigned char)'\x3',  // XMM3j
(unsigned char)'\x3',  // XMM3k
(unsigned char)'\x3',  // XMM3l
(unsigned char)'\x3',  // XMM3m
(unsigned char)'\x3',  // XMM3n
(unsigned char)'\x3',  // XMM3o
(unsigned char)'\x3',  // XMM3p
(unsigned char)'\x4',  // XMM4
(unsigned char)'\x4',  // XMM4b
(unsigned char)'\x4',  // XMM4c
(unsigned char)'\x4',  // XMM4d
(unsigned char)'\x4',  // XMM4e
(unsigned char)'\x4',  // XMM4f
(unsigned char)'\x4',  // XMM4g
(unsigned char)'\x4',  // XMM4h
(unsigned char)'\x4',  // XMM4i
(unsigned char)'\x4',  // XMM4j
(unsigned char)'\x4',  // XMM4k
(unsigned char)'\x4',  // XMM4l
(unsigned char)'\x4',  // XMM4m
(unsigned char)'\x4',  // XMM4n
(unsigned char)'\x4',  // XMM4o
(unsigned char)'\x4',  // XMM4p
(unsigned char)'\x5',  // XMM5
(unsigned char)'\x5',  // XMM5b
(unsigned char)'\x5',  // XMM5c
(unsigned char)'\x5',  // XMM5d
(unsigned char)'\x5',  // XMM5e
(unsigned char)'\x5',  // XMM5f
(unsigned char)'\x5',  // XMM5g
(unsigned char)'\x5',  // XMM5h
(unsigned char)'\x5',  // XMM5i
(unsigned char)'\x5',  // XMM5j
(unsigned char)'\x5',  // XMM5k
(unsigned char)'\x5',  // XMM5l
(unsigned char)'\x5',  // XMM5m
(unsigned char)'\x5',  // XMM5n
(unsigned char)'\x5',  // XMM5o
(unsigned char)'\x5',  // XMM5p
(unsigned char)'\x6',  // XMM6
(unsigned char)'\x6',  // XMM6b
(unsigned char)'\x6',  // XMM6c
(unsigned char)'\x6',  // XMM6d
(unsigned char)'\x6',  // XMM6e
(unsigned char)'\x6',  // XMM6f
(unsigned char)'\x6',  // XMM6g
(unsigned char)'\x6',  // XMM6h
(unsigned char)'\x6',  // XMM6i
(unsigned char)'\x6',  // XMM6j
(unsigned char)'\x6',  // XMM6k
(unsigned char)'\x6',  // XMM6l
(unsigned char)'\x6',  // XMM6m
(unsigned char)'\x6',  // XMM6n
(unsigned char)'\x6',  // XMM6o
(unsigned char)'\x6',  // XMM6p
(unsigned char)'\x7',  // XMM7
(unsigned char)'\x7',  // XMM7b
(unsigned char)'\x7',  // XMM7c
(unsigned char)'\x7',  // XMM7d
(unsigned char)'\x7',  // XMM7e
(unsigned char)'\x7',  // XMM7f
(unsigned char)'\x7',  // XMM7g
(unsigned char)'\x7',  // XMM7h
(unsigned char)'\x7',  // XMM7i
(unsigned char)'\x7',  // XMM7j
(unsigned char)'\x7',  // XMM7k
(unsigned char)'\x7',  // XMM7l
(unsigned char)'\x7',  // XMM7m
(unsigned char)'\x7',  // XMM7n
(unsigned char)'\x7',  // XMM7o
(unsigned char)'\x7',  // XMM7p
(unsigned char)'\x8',  // XMM8
(unsigned char)'\x8',  // XMM8b
(unsigned char)'\x8',  // XMM8c
(unsigned char)'\x8',  // XMM8d
(unsigned char)'\x8',  // XMM8e
(unsigned char)'\x8',  // XMM8f
(unsigned char)'\x8',  // XMM8g
(unsigned char)'\x8',  // XMM8h
(unsigned char)'\x8',  // XMM8i
(unsigned char)'\x8',  // XMM8j
(unsigned char)'\x8',  // XMM8k
(unsigned char)'\x8',  // XMM8l
(unsigned char)'\x8',  // XMM8m
(unsigned char)'\x8',  // XMM8n
(unsigned char)'\x8',  // XMM8o
(unsigned char)'\x8',  // XMM8p
(unsigned char)'\x9',  // XMM9
(unsigned char)'\x9',  // XMM9b
(unsigned char)'\x9',  // XMM9c
(unsigned char)'\x9',  // XMM9d
(unsigned char)'\x9',  // XMM9e
(unsigned char)'\x9',  // XMM9f
(unsigned char)'\x9',  // XMM9g
(unsigned char)'\x9',  // XMM9h
(unsigned char)'\x9',  // XMM9i
(unsigned char)'\x9',  // XMM9j
(unsigned char)'\x9',  // XMM9k
(unsigned char)'\x9',  // XMM9l
(unsigned char)'\x9',  // XMM9m
(unsigned char)'\x9',  // XMM9n
(unsigned char)'\x9',  // XMM9o
(unsigned char)'\x9',  // XMM9p
(unsigned char)'\xA',  // XMM10
(unsigned char)'\xA',  // XMM10b
(unsigned char)'\xA',  // XMM10c
(unsigned char)'\xA',  // XMM10d
(unsigned char)'\xA',  // XMM10e
(unsigned char)'\xA',  // XMM10f
(unsigned char)'\xA',  // XMM10g
(unsigned char)'\xA',  // XMM10h
(unsigned char)'\xA',  // XMM10i
(unsigned char)'\xA',  // XMM10j
(unsigned char)'\xA',  // XMM10k
(unsigned char)'\xA',  // XMM10l
(unsigned char)'\xA',  // XMM10m
(unsigned char)'\xA',  // XMM10n
(unsigned char)'\xA',  // XMM10o
(unsigned char)'\xA',  // XMM10p
(unsigned char)'\xB',  // XMM11
(unsigned char)'\xB',  // XMM11b
(unsigned char)'\xB',  // XMM11c
(unsigned char)'\xB',  // XMM11d
(unsigned char)'\xB',  // XMM11e
(unsigned char)'\xB',  // XMM11f
(unsigned char)'\xB',  // XMM11g
(unsigned char)'\xB',  // XMM11h
(unsigned char)'\xB',  // XMM11i
(unsigned char)'\xB',  // XMM11j
(unsigned char)'\xB',  // XMM11k
(unsigned char)'\xB',  // XMM11l
(unsigned char)'\xB',  // XMM11m
(unsigned char)'\xB',  // XMM11n
(unsigned char)'\xB',  // XMM11o
(unsigned char)'\xB',  // XMM11p
(unsigned char)'\xC',  // XMM12
(unsigned char)'\xC',  // XMM12b
(unsigned char)'\xC',  // XMM12c
(unsigned char)'\xC',  // XMM12d
(unsigned char)'\xC',  // XMM12e
(unsigned char)'\xC',  // XMM12f
(unsigned char)'\xC',  // XMM12g
(unsigned char)'\xC',  // XMM12h
(unsigned char)'\xC',  // XMM12i
(unsigned char)'\xC',  // XMM12j
(unsigned char)'\xC',  // XMM12k
(unsigned char)'\xC',  // XMM12l
(unsigned char)'\xC',  // XMM12m
(unsigned char)'\xC',  // XMM12n
(unsigned char)'\xC',  // XMM12o
(unsigned char)'\xC',  // XMM12p
(unsigned char)'\xD',  // XMM13
(unsigned char)'\xD',  // XMM13b
(unsigned char)'\xD',  // XMM13c
(unsigned char)'\xD',  // XMM13d
(unsigned char)'\xD',  // XMM13e
(unsigned char)'\xD',  // XMM13f
(unsigned char)'\xD',  // XMM13g
(unsigned char)'\xD',  // XMM13h
(unsigned char)'\xD',  // XMM13i
(unsigned char)'\xD',  // XMM13j
(unsigned char)'\xD',  // XMM13k
(unsigned char)'\xD',  // XMM13l
(unsigned char)'\xD',  // XMM13m
(unsigned char)'\xD',  // XMM13n
(unsigned char)'\xD',  // XMM13o
(unsigned char)'\xD',  // XMM13p
(unsigned char)'\xE',  // XMM14
(unsigned char)'\xE',  // XMM14b
(unsigned char)'\xE',  // XMM14c
(unsigned char)'\xE',  // XMM14d
(unsigned char)'\xE',  // XMM14e
(unsigned char)'\xE',  // XMM14f
(unsigned char)'\xE',  // XMM14g
(unsigned char)'\xE',  // XMM14h
(unsigned char)'\xE',  // XMM14i
(unsigned char)'\xE',  // XMM14j
(unsigned char)'\xE',  // XMM14k
(unsigned char)'\xE',  // XMM14l
(unsigned char)'\xE',  // XMM14m
(unsigned char)'\xE',  // XMM14n
(unsigned char)'\xE',  // XMM14o
(unsigned char)'\xE',  // XMM14p
(unsigned char)'\xF',  // XMM15
(unsigned char)'\xF',  // XMM15b
(unsigned char)'\xF',  // XMM15c
(unsigned char)'\xF',  // XMM15d
(unsigned char)'\xF',  // XMM15e
(unsigned char)'\xF',  // XMM15f
(unsigned char)'\xF',  // XMM15g
(unsigned char)'\xF',  // XMM15h
(unsigned char)'\xF',  // XMM15i
(unsigned char)'\xF',  // XMM15j
(unsigned char)'\xF',  // XMM15k
(unsigned char)'\xF',  // XMM15l
(unsigned char)'\xF',  // XMM15m
(unsigned char)'\xF',  // XMM15n
(unsigned char)'\xF',  // XMM15o
(unsigned char)'\xF',  // XMM15p
(unsigned char)'\x10',  // XMM16
(unsigned char)'\x10',  // XMM16b
(unsigned char)'\x10',  // XMM16c
(unsigned char)'\x10',  // XMM16d
(unsigned char)'\x10',  // XMM16e
(unsigned char)'\x10',  // XMM16f
(unsigned char)'\x10',  // XMM16g
(unsigned char)'\x10',  // XMM16h
(unsigned char)'\x10',  // XMM16i
(unsigned char)'\x10',  // XMM16j
(unsigned char)'\x10',  // XMM16k
(unsigned char)'\x10',  // XMM16l
(unsigned char)'\x10',  // XMM16m
(unsigned char)'\x10',  // XMM16n
(unsigned char)'\x10',  // XMM16o
(unsigned char)'\x10',  // XMM16p
(unsigned char)'\x11',  // XMM17
(unsigned char)'\x11',  // XMM17b
(unsigned char)'\x11',  // XMM17c
(unsigned char)'\x11',  // XMM17d
(unsigned char)'\x11',  // XMM17e
(unsigned char)'\x11',  // XMM17f
(unsigned char)'\x11',  // XMM17g
(unsigned char)'\x11',  // XMM17h
(unsigned char)'\x11',  // XMM17i
(unsigned char)'\x11',  // XMM17j
(unsigned char)'\x11',  // XMM17k
(unsigned char)'\x11',  // XMM17l
(unsigned char)'\x11',  // XMM17m
(unsigned char)'\x11',  // XMM17n
(unsigned char)'\x11',  // XMM17o
(unsigned char)'\x11',  // XMM17p
(unsigned char)'\x12',  // XMM18
(unsigned char)'\x12',  // XMM18b
(unsigned char)'\x12',  // XMM18c
(unsigned char)'\x12',  // XMM18d
(unsigned char)'\x12',  // XMM18e
(unsigned char)'\x12',  // XMM18f
(unsigned char)'\x12',  // XMM18g
(unsigned char)'\x12',  // XMM18h
(unsigned char)'\x12',  // XMM18i
(unsigned char)'\x12',  // XMM18j
(unsigned char)'\x12',  // XMM18k
(unsigned char)'\x12',  // XMM18l
(unsigned char)'\x12',  // XMM18m
(unsigned char)'\x12',  // XMM18n
(unsigned char)'\x12',  // XMM18o
(unsigned char)'\x12',  // XMM18p
(unsigned char)'\x13',  // XMM19
(unsigned char)'\x13',  // XMM19b
(unsigned char)'\x13',  // XMM19c
(unsigned char)'\x13',  // XMM19d
(unsigned char)'\x13',  // XMM19e
(unsigned char)'\x13',  // XMM19f
(unsigned char)'\x13',  // XMM19g
(unsigned char)'\x13',  // XMM19h
(unsigned char)'\x13',  // XMM19i
(unsigned char)'\x13',  // XMM19j
(unsigned char)'\x13',  // XMM19k
(unsigned char)'\x13',  // XMM19l
(unsigned char)'\x13',  // XMM19m
(unsigned char)'\x13',  // XMM19n
(unsigned char)'\x13',  // XMM19o
(unsigned char)'\x13',  // XMM19p
(unsigned char)'\x14',  // XMM20
(unsigned char)'\x14',  // XMM20b
(unsigned char)'\x14',  // XMM20c
(unsigned char)'\x14',  // XMM20d
(unsigned char)'\x14',  // XMM20e
(unsigned char)'\x14',  // XMM20f
(unsigned char)'\x14',  // XMM20g
(unsigned char)'\x14',  // XMM20h
(unsigned char)'\x14',  // XMM20i
(unsigned char)'\x14',  // XMM20j
(unsigned char)'\x14',  // XMM20k
(unsigned char)'\x14',  // XMM20l
(unsigned char)'\x14',  // XMM20m
(unsigned char)'\x14',  // XMM20n
(unsigned char)'\x14',  // XMM20o
(unsigned char)'\x14',  // XMM20p
(unsigned char)'\x15',  // XMM21
(unsigned char)'\x15',  // XMM21b
(unsigned char)'\x15',  // XMM21c
(unsigned char)'\x15',  // XMM21d
(unsigned char)'\x15',  // XMM21e
(unsigned char)'\x15',  // XMM21f
(unsigned char)'\x15',  // XMM21g
(unsigned char)'\x15',  // XMM21h
(unsigned char)'\x15',  // XMM21i
(unsigned char)'\x15',  // XMM21j
(unsigned char)'\x15',  // XMM21k
(unsigned char)'\x15',  // XMM21l
(unsigned char)'\x15',  // XMM21m
(unsigned char)'\x15',  // XMM21n
(unsigned char)'\x15',  // XMM21o
(unsigned char)'\x15',  // XMM21p
(unsigned char)'\x16',  // XMM22
(unsigned char)'\x16',  // XMM22b
(unsigned char)'\x16',  // XMM22c
(unsigned char)'\x16',  // XMM22d
(unsigned char)'\x16',  // XMM22e
(unsigned char)'\x16',  // XMM22f
(unsigned char)'\x16',  // XMM22g
(unsigned char)'\x16',  // XMM22h
(unsigned char)'\x16',  // XMM22i
(unsigned char)'\x16',  // XMM22j
(unsigned char)'\x16',  // XMM22k
(unsigned char)'\x16',  // XMM22l
(unsigned char)'\x16',  // XMM22m
(unsigned char)'\x16',  // XMM22n
(unsigned char)'\x16',  // XMM22o
(unsigned char)'\x16',  // XMM22p
(unsigned char)'\x17',  // XMM23
(unsigned char)'\x17',  // XMM23b
(unsigned char)'\x17',  // XMM23c
(unsigned char)'\x17',  // XMM23d
(unsigned char)'\x17',  // XMM23e
(unsigned char)'\x17',  // XMM23f
(unsigned char)'\x17',  // XMM23g
(unsigned char)'\x17',  // XMM23h
(unsigned char)'\x17',  // XMM23i
(unsigned char)'\x17',  // XMM23j
(unsigned char)'\x17',  // XMM23k
(unsigned char)'\x17',  // XMM23l
(unsigned char)'\x17',  // XMM23m
(unsigned char)'\x17',  // XMM23n
(unsigned char)'\x17',  // XMM23o
(unsigned char)'\x17',  // XMM23p
(unsigned char)'\x18',  // XMM24
(unsigned char)'\x18',  // XMM24b
(unsigned char)'\x18',  // XMM24c
(unsigned char)'\x18',  // XMM24d
(unsigned char)'\x18',  // XMM24e
(unsigned char)'\x18',  // XMM24f
(unsigned char)'\x18',  // XMM24g
(unsigned char)'\x18',  // XMM24h
(unsigned char)'\x18',  // XMM24i
(unsigned char)'\x18',  // XMM24j
(unsigned char)'\x18',  // XMM24k
(unsigned char)'\x18',  // XMM24l
(unsigned char)'\x18',  // XMM24m
(unsigned char)'\x18',  // XMM24n
(unsigned char)'\x18',  // XMM24o
(unsigned char)'\x18',  // XMM24p
(unsigned char)'\x19',  // XMM25
(unsigned char)'\x19',  // XMM25b
(unsigned char)'\x19',  // XMM25c
(unsigned char)'\x19',  // XMM25d
(unsigned char)'\x19',  // XMM25e
(unsigned char)'\x19',  // XMM25f
(unsigned char)'\x19',  // XMM25g
(unsigned char)'\x19',  // XMM25h
(unsigned char)'\x19',  // XMM25i
(unsigned char)'\x19',  // XMM25j
(unsigned char)'\x19',  // XMM25k
(unsigned char)'\x19',  // XMM25l
(unsigned char)'\x19',  // XMM25m
(unsigned char)'\x19',  // XMM25n
(unsigned char)'\x19',  // XMM25o
(unsigned char)'\x19',  // XMM25p
(unsigned char)'\x1A',  // XMM26
(unsigned char)'\x1A',  // XMM26b
(unsigned char)'\x1A',  // XMM26c
(unsigned char)'\x1A',  // XMM26d
(unsigned char)'\x1A',  // XMM26e
(unsigned char)'\x1A',  // XMM26f
(unsigned char)'\x1A',  // XMM26g
(unsigned char)'\x1A',  // XMM26h
(unsigned char)'\x1A',  // XMM26i
(unsigned char)'\x1A',  // XMM26j
(unsigned char)'\x1A',  // XMM26k
(unsigned char)'\x1A',  // XMM26l
(unsigned char)'\x1A',  // XMM26m
(unsigned char)'\x1A',  // XMM26n
(unsigned char)'\x1A',  // XMM26o
(unsigned char)'\x1A',  // XMM26p
(unsigned char)'\x1B',  // XMM27
(unsigned char)'\x1B',  // XMM27b
(unsigned char)'\x1B',  // XMM27c
(unsigned char)'\x1B',  // XMM27d
(unsigned char)'\x1B',  // XMM27e
(unsigned char)'\x1B',  // XMM27f
(unsigned char)'\x1B',  // XMM27g
(unsigned char)'\x1B',  // XMM27h
(unsigned char)'\x1B',  // XMM27i
(unsigned char)'\x1B',  // XMM27j
(unsigned char)'\x1B',  // XMM27k
(unsigned char)'\x1B',  // XMM27l
(unsigned char)'\x1B',  // XMM27m
(unsigned char)'\x1B',  // XMM27n
(unsigned char)'\x1B',  // XMM27o
(unsigned char)'\x1B',  // XMM27p
(unsigned char)'\x1C',  // XMM28
(unsigned char)'\x1C',  // XMM28b
(unsigned char)'\x1C',  // XMM28c
(unsigned char)'\x1C',  // XMM28d
(unsigned char)'\x1C',  // XMM28e
(unsigned char)'\x1C',  // XMM28f
(unsigned char)'\x1C',  // XMM28g
(unsigned char)'\x1C',  // XMM28h
(unsigned char)'\x1C',  // XMM28i
(unsigned char)'\x1C',  // XMM28j
(unsigned char)'\x1C',  // XMM28k
(unsigned char)'\x1C',  // XMM28l
(unsigned char)'\x1C',  // XMM28m
(unsigned char)'\x1C',  // XMM28n
(unsigned char)'\x1C',  // XMM28o
(unsigned char)'\x1C',  // XMM28p
(unsigned char)'\x1D',  // XMM29
(unsigned char)'\x1D',  // XMM29b
(unsigned char)'\x1D',  // XMM29c
(unsigned char)'\x1D',  // XMM29d
(unsigned char)'\x1D',  // XMM29e
(unsigned char)'\x1D',  // XMM29f
(unsigned char)'\x1D',  // XMM29g
(unsigned char)'\x1D',  // XMM29h
(unsigned char)'\x1D',  // XMM29i
(unsigned char)'\x1D',  // XMM29j
(unsigned char)'\x1D',  // XMM29k
(unsigned char)'\x1D',  // XMM29l
(unsigned char)'\x1D',  // XMM29m
(unsigned char)'\x1D',  // XMM29n
(unsigned char)'\x1D',  // XMM29o
(unsigned char)'\x1D',  // XMM29p
(unsigned char)'\x1E',  // XMM30
(unsigned char)'\x1E',  // XMM30b
(unsigned char)'\x1E',  // XMM30c
(unsigned char)'\x1E',  // XMM30d
(unsigned char)'\x1E',  // XMM30e
(unsigned char)'\x1E',  // XMM30f
(unsigned char)'\x1E',  // XMM30g
(unsigned char)'\x1E',  // XMM30h
(unsigned char)'\x1E',  // XMM30i
(unsigned char)'\x1E',  // XMM30j
(unsigned char)'\x1E',  // XMM30k
(unsigned char)'\x1E',  // XMM30l
(unsigned char)'\x1E',  // XMM30m
(unsigned char)'\x1E',  // XMM30n
(unsigned char)'\x1E',  // XMM30o
(unsigned char)'\x1E',  // XMM30p
(unsigned char)'\x1F',  // XMM31
(unsigned char)'\x1F',  // XMM31b
(unsigned char)'\x1F',  // XMM31c
(unsigned char)'\x1F',  // XMM31d
(unsigned char)'\x1F',  // XMM31e
(unsigned char)'\x1F',  // XMM31f
(unsigned char)'\x1F',  // XMM31g
(unsigned char)'\x1F',  // XMM31h
(unsigned char)'\x1F',  // XMM31i
(unsigned char)'\x1F',  // XMM31j
(unsigned char)'\x1F',  // XMM31k
(unsigned char)'\x1F',  // XMM31l
(unsigned char)'\x1F',  // XMM31m
(unsigned char)'\x1F',  // XMM31n
(unsigned char)'\x1F',  // XMM31o
(unsigned char)'\x1F',  // XMM31p
(unsigned char)'\x7',  // K7
(unsigned char)'\x7',  // K7_H
(unsigned char)'\x6',  // K6
(unsigned char)'\x6',  // K6_H
(unsigned char)'\x5',  // K5
(unsigned char)'\x5',  // K5_H
(unsigned char)'\x4',  // K4
(unsigned char)'\x4',  // K4_H
(unsigned char)'\x3',  // K3
(unsigned char)'\x3',  // K3_H
(unsigned char)'\x2',  // K2
(unsigned char)'\x2',  // K2_H
(unsigned char)'\x1',  // K1
(unsigned char)'\x1',  // K1_H
(unsigned char)'\x10' // no trailing comma  // RFLAGS
14730};


14733//------------------Define classes derived from MachOper---------------------
14734MachOper  *labelOper::clone() const {
return  new labelOper(_label, _block_num);
14736}
14737uint labelOper::opcode() const { return LABEL; }

14739const RegMask *sRegIOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14739, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
14742}

14744const RegMask *sRegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14744, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
14747}

14749const RegMask *sRegFOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14749, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
14752}

14754const RegMask *sRegDOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14754, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
14757}

14759const RegMask *sRegLOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14759, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
14762}

14764MachOper  *methodOper::clone() const {
return  new methodOper(_method);
14766}
14767uint methodOper::opcode() const { return METHOD; }

14769const RegMask *kRegOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14769, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTMASK_REG_mask();
14772}

14774const RegMask *kReg_K1Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14774, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTMASK_REG_K1_mask();
14777}

14779const RegMask *kReg_K2Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14779, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTMASK_REG_K2_mask();
14782}

14784const RegMask *kReg_K3Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14784, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTMASK_REG_K3_mask();
14787}

14789const RegMask *kReg_K4Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14789, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTMASK_REG_K4_mask();
14792}

14794const RegMask *kReg_K5Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14794, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTMASK_REG_K5_mask();
14797}

14799const RegMask *kReg_K6Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14799, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTMASK_REG_K6_mask();
14802}

14804const RegMask *kReg_K7Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14804, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTMASK_REG_K7_mask();
14807}

14809const RegMask *rRegIOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14809, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_REG_mask();
14812}

14814const RegMask *rax_RegIOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14814, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_RAX_REG_mask();
14817}

14819const RegMask *rbx_RegIOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14819, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_RBX_REG_mask();
14822}

14824const RegMask *rcx_RegIOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14824, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_RCX_REG_mask();
14827}

14829const RegMask *rdx_RegIOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14829, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_RDX_REG_mask();
14832}

14834const RegMask *rdi_RegIOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14834, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_RDI_REG_mask();
14837}

14839const RegMask *no_rax_rdx_RegIOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14839, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_NO_RAX_RDX_REG_mask();
14842}

14844const RegMask *any_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14844, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &ANY_REG_mask();
14847}

14849const RegMask *rRegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14849, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_REG_mask();
14852}

14854const RegMask *rRegNOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14854, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_REG_mask();
14857}

14859const RegMask *no_rax_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14859, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_NO_RAX_REG_mask();
14862}

14864const RegMask *no_rbp_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14864, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_REG_NO_RBP_mask();
14867}

14869const RegMask *no_rax_rbx_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14869, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_NO_RAX_RBX_REG_mask();
14872}

14874const RegMask *rax_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14874, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_RAX_REG_mask();
14877}

14879const RegMask *rax_RegNOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14879, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_RAX_REG_mask();
14882}

14884const RegMask *rbx_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14884, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_RBX_REG_mask();
14887}

14889const RegMask *rsi_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14889, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_RSI_REG_mask();
14892}

14894const RegMask *rbp_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14894, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_RBP_REG_mask();
14897}

14899const RegMask *rdi_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14899, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_RDI_REG_mask();
14902}

14904const RegMask *r15_RegPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14904, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_R15_REG_mask();
14907}

14909const RegMask *rRegLOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14909, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &LONG_REG_mask();
14912}

14914const RegMask *no_rax_rdx_RegLOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14914, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &LONG_NO_RAX_RDX_REG_mask();
14917}

14919const RegMask *no_rax_RegLOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14919, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &LONG_NO_RAX_RDX_REG_mask();
14922}

14924const RegMask *rax_RegLOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14924, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &LONG_RAX_REG_mask();
14927}

14929const RegMask *rcx_RegLOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14929, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &LONG_RCX_REG_mask();
14932}

14934const RegMask *rdx_RegLOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14934, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &LONG_RDX_REG_mask();
14937}

14939const RegMask *rFlagsRegOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14939, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_FLAGS_mask();
14942}

14944const RegMask *rFlagsRegUOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14944, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_FLAGS_mask();
14947}

14949const RegMask *rFlagsRegUCFOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14949, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_FLAGS_mask();
14952}

14954const RegMask *regFOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14954, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &FLOAT_REG_mask();
14957}

14959const RegMask *legRegFOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14959, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &FLOAT_REG_LEGACY_mask();
14962}

14964const RegMask *vlRegFOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14964, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &FLOAT_REG_VL_mask();
14967}

14969const RegMask *regDOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14969, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &DOUBLE_REG_mask();
14972}

14974const RegMask *legRegDOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14974, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &DOUBLE_REG_LEGACY_mask();
14977}

14979const RegMask *vlRegDOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14979, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &DOUBLE_REG_VL_mask();
14982}

14984const RegMask *indirectOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14984, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &PTR_REG_mask();
14987}

14989const RegMask *indOffset8Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14989, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &ANY_REG_mask();
14992}

14994const RegMask *indOffset32Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14994, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &ANY_REG_mask();
14997}

14999const RegMask *indIndexOffsetOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 14999, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &ANY_REG_mask();
case 1: return &LONG_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15004); ::breakpoint(); } while (0);
return NULL__null;
15007}

15009const RegMask *indIndexOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15009, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &ANY_REG_mask();
case 1: return &LONG_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15014); ::breakpoint(); } while (0);
return NULL__null;
15017}

15019const RegMask *indIndexScaleOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15019, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &ANY_REG_mask();
case 1: return &LONG_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15024); ::breakpoint(); } while (0);
return NULL__null;
15027}

15029const RegMask *indPosIndexScaleOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15029, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &ANY_REG_mask();
case 1: return &INT_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15034); ::breakpoint(); } while (0);
return NULL__null;
15037}

15039const RegMask *indIndexScaleOffsetOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15039, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &ANY_REG_mask();
case 1: return &LONG_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15044); ::breakpoint(); } while (0);
return NULL__null;
15047}

15049const RegMask *indPosIndexOffsetOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15049, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &ANY_REG_mask();
case 1: return &INT_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15054); ::breakpoint(); } while (0);
return NULL__null;
15057}

15059const RegMask *indPosIndexScaleOffsetOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15059, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &ANY_REG_mask();
case 1: return &INT_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15064); ::breakpoint(); } while (0);
return NULL__null;
15067}

15069const RegMask *indCompressedOopOffsetOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15069, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_REG_mask();
15072}

15074const RegMask *indirectNarrowOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15074, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_REG_mask();
15077}

15079const RegMask *indOffset8NarrowOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15079, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_REG_mask();
15082}

15084const RegMask *indOffset32NarrowOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15084, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_REG_mask();
15087}

15089const RegMask *indIndexOffsetNarrowOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15089, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &INT_REG_mask();
case 1: return &LONG_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15094); ::breakpoint(); } while (0);
return NULL__null;
15097}

15099const RegMask *indIndexNarrowOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15099, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &INT_REG_mask();
case 1: return &LONG_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15104); ::breakpoint(); } while (0);
return NULL__null;
15107}

15109const RegMask *indIndexScaleNarrowOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15109, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &INT_REG_mask();
case 1: return &LONG_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15114); ::breakpoint(); } while (0);
return NULL__null;
15117}

15119const RegMask *indIndexScaleOffsetNarrowOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15119, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
switch (index) {
case 0: return &INT_REG_mask();
case 1: return &LONG_REG_mask();
}
ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"ad_x86.cpp", 15124); ::breakpoint(); } while (0);
return NULL__null;
15127}

15129const RegMask *indPosIndexOffsetNarrowOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15129, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_REG_mask();
15132}

15134const RegMask *indPosIndexScaleOffsetNarrowOper::in_RegMask(int index) const {
assert(0 <= index && index < 2, "index out of range")do { if (!(0 <= index && index < 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15134, "assert(" "0 <= index && index < 2"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &INT_REG_mask();
15137}

15139const RegMask *stackSlotPOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15139, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
15142}

15144const RegMask *stackSlotIOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15144, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
15147}

15149const RegMask *stackSlotFOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15149, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
15152}

15154const RegMask *stackSlotDOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15154, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
15157}

15159const RegMask *stackSlotLOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15159, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &(Compile::current()->FIRST_STACK_mask());
15162}

15164const RegMask *rxmm0Oper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15164, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &XMM0_REG_mask();
15167}

15169const RegMask *vecOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15169, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &RegMask::Empty;
15172}

15174const RegMask *legVecOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15174, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &RegMask::Empty;
15177}

15179const RegMask *vecSOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15179, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORS_REG_VLBWDQ_mask();
15182}

15184const RegMask *legVecSOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15184, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORS_REG_LEGACY_mask();
15187}

15189const RegMask *vecDOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15189, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORD_REG_VLBWDQ_mask();
15192}

15194const RegMask *legVecDOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15194, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORD_REG_LEGACY_mask();
15197}

15199const RegMask *vecXOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15199, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORX_REG_VLBWDQ_mask();
15202}

15204const RegMask *legVecXOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15204, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORX_REG_LEGACY_mask();
15207}

15209const RegMask *vecYOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15209, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORY_REG_VLBWDQ_mask();
15212}

15214const RegMask *legVecYOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15214, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORY_REG_LEGACY_mask();
15217}

15219const RegMask *vecZOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15219, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORZ_REG_mask();
15222}

15224const RegMask *legVecZOper::in_RegMask(int index) const {
assert(0 <= index && index < 1, "index out of range")do { if (!(0 <= index && index < 1)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 15224, "assert(" "0 <= index && index < 1"
 ") failed", "index out of range"); ::breakpoint(); } } while
 (0);
return &VECTORZ_REG_LEGACY_mask();
15227}

15229//------------------Define members for classes derived from MachNode----------

15231void MoveVL2FNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_VL_mask();
15233}

15235// Build CISC version of this instruction
15236MachNode *MoveVL2FNode::cisc_version(int offset) {
loadFNode *node = new loadFNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15245}


15248void MoveLEG2FNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_LEGACY_mask();
15250}

15252// Build CISC version of this instruction
15253MachNode *MoveLEG2FNode::cisc_version(int offset) {
loadFNode *node = new loadFNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15262}


15265void MoveVL2DNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_VL_mask();
15267}

15269// Build CISC version of this instruction
15270MachNode *MoveVL2DNode::cisc_version(int offset) {
loadSSDNode *node = new loadSSDNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15279}


15282void MoveLEG2DNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_LEGACY_mask();
15284}

15286// Build CISC version of this instruction
15287MachNode *MoveLEG2DNode::cisc_version(int offset) {
loadSSDNode *node = new loadSSDNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15296}


15299void popCountINode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15301}

15303// Build CISC version of this instruction
15304MachNode *popCountINode::cisc_version(int offset) {
popCountI_memNode *node = new popCountI_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15313}


15316void popCountLNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15318}

15320// Build CISC version of this instruction
15321MachNode *popCountLNode::cisc_version(int offset) {
popCountL_memNode *node = new popCountL_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15330}


15333void cmovI_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15335}

15337// Build CISC version of this instruction
15338MachNode *cmovI_regNode::cisc_version(int offset) {
cmovI_memNode *node = new cmovI_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15347}


15350void cmovI_regUNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15352}

15354// Build CISC version of this instruction
15355MachNode *cmovI_regUNode::cisc_version(int offset) {
cmovI_memUNode *node = new cmovI_memUNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15364}


15367void cmovI_regUCFNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15369}

15371// Build CISC version of this instruction
15372MachNode *cmovI_regUCFNode::cisc_version(int offset) {
cmovI_memUCFNode *node = new cmovI_memUCFNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15381}


15384void cmovL_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15386}

15388// Build CISC version of this instruction
15389MachNode *cmovL_regNode::cisc_version(int offset) {
cmovL_memNode *node = new cmovL_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15398}


15401void cmovL_regUNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15403}

15405// Build CISC version of this instruction
15406MachNode *cmovL_regUNode::cisc_version(int offset) {
cmovL_memUNode *node = new cmovL_memUNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15415}


15418void cmovL_regUCFNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15420}

15422// Build CISC version of this instruction
15423MachNode *cmovL_regUCFNode::cisc_version(int offset) {
cmovL_memUCFNode *node = new cmovL_memUCFNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15432}


15435void addI_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15437}

15439// Build CISC version of this instruction
15440MachNode *addI_rRegNode::cisc_version(int offset) {
addI_rReg_memNode *node = new addI_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15449}


15452void addL_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15454}

15456// Build CISC version of this instruction
15457MachNode *addL_rRegNode::cisc_version(int offset) {
addL_rReg_memNode *node = new addL_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15466}


15469void subI_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15471}

15473// Build CISC version of this instruction
15474MachNode *subI_rRegNode::cisc_version(int offset) {
subI_rReg_memNode *node = new subI_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15483}


15486void subL_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15488}

15490// Build CISC version of this instruction
15491MachNode *subL_rRegNode::cisc_version(int offset) {
subL_rReg_memNode *node = new subL_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15500}


15503void mulI_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15505}

15507// Build CISC version of this instruction
15508MachNode *mulI_rRegNode::cisc_version(int offset) {
mulI_memNode *node = new mulI_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15517}


15520void mulI_rReg_immNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15522}

15524// Build CISC version of this instruction
15525MachNode *mulI_rReg_immNode::cisc_version(int offset) {
mulI_mem_immNode *node = new mulI_mem_immNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15534}


15537void mulL_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15539}

15541// Build CISC version of this instruction
15542MachNode *mulL_rRegNode::cisc_version(int offset) {
mulL_memNode *node = new mulL_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15551}


15554void mulL_rReg_immNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15556}

15558// Build CISC version of this instruction
15559MachNode *mulL_rReg_immNode::cisc_version(int offset) {
mulL_mem_immNode *node = new mulL_mem_immNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15568}


15571void i2bNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15573}

15575// Build CISC version of this instruction
15576MachNode *i2bNode::cisc_version(int offset) {
loadI2BNode *node = new loadI2BNode();
node->_num_opnds = 3;

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15586}


15589void i2sNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15591}

15593// Build CISC version of this instruction
15594MachNode *i2sNode::cisc_version(int offset) {
loadI2SNode *node = new loadI2SNode();
node->_num_opnds = 3;

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15604}


15607void andI_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15609}

15611// Build CISC version of this instruction
15612MachNode *andI_rRegNode::cisc_version(int offset) {
andI_rReg_memNode *node = new andI_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15621}


15624void andI2L_rReg_imm255Node::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15626}

15628// Build CISC version of this instruction
15629MachNode *andI2L_rReg_imm255Node::cisc_version(int offset) {
loadI2L_immI_255Node *node = new loadI2L_immI_255Node();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15638}


15641void andI2L_rReg_imm65535Node::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15643}

15645// Build CISC version of this instruction
15646MachNode *andI2L_rReg_imm65535Node::cisc_version(int offset) {
loadI2L_immI_65535Node *node = new loadI2L_immI_65535Node();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15655}


15658void andnI_rReg_rReg_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15660}

15662// Build CISC version of this instruction
15663MachNode *andnI_rReg_rReg_rRegNode::cisc_version(int offset) {
andnI_rReg_rReg_memNode *node = new andnI_rReg_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15672}


15675void andnI_rReg_rReg_rReg_0Node::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15677}

15679// Build CISC version of this instruction
15680MachNode *andnI_rReg_rReg_rReg_0Node::cisc_version(int offset) {
andnI_rReg_rReg_mem_0Node *node = new andnI_rReg_rReg_mem_0Node();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15689}


15692void orI_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15694}

15696// Build CISC version of this instruction
15697MachNode *orI_rRegNode::cisc_version(int offset) {
orI_rReg_memNode *node = new orI_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15706}


15709void xorI_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15711}

15713// Build CISC version of this instruction
15714MachNode *xorI_rRegNode::cisc_version(int offset) {
xorI_rReg_memNode *node = new xorI_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15723}


15726void andL_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15728}

15730// Build CISC version of this instruction
15731MachNode *andL_rRegNode::cisc_version(int offset) {
andL_rReg_memNode *node = new andL_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15740}


15743void andnL_rReg_rReg_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15745}

15747// Build CISC version of this instruction
15748MachNode *andnL_rReg_rReg_rRegNode::cisc_version(int offset) {
andnL_rReg_rReg_memNode *node = new andnL_rReg_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15757}


15760void andnL_rReg_rReg_rReg_0Node::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15762}

15764// Build CISC version of this instruction
15765MachNode *andnL_rReg_rReg_rReg_0Node::cisc_version(int offset) {
andnL_rReg_rReg_mem_0Node *node = new andnL_rReg_rReg_mem_0Node();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15774}


15777void orL_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15779}

15781// Build CISC version of this instruction
15782MachNode *orL_rRegNode::cisc_version(int offset) {
orL_rReg_memNode *node = new orL_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15791}


15794void xorL_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15796}

15798// Build CISC version of this instruction
15799MachNode *xorL_rRegNode::cisc_version(int offset) {
xorL_rReg_memNode *node = new xorL_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15808}


15811void cmpF_cc_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
15813}

15815// Build CISC version of this instruction
15816MachNode *cmpF_cc_regNode::cisc_version(int offset) {
cmpF_cc_memNode *node = new cmpF_cc_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15825}


15828void cmpF_cc_reg_CFNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
15830}

15832// Build CISC version of this instruction
15833MachNode *cmpF_cc_reg_CFNode::cisc_version(int offset) {
cmpF_cc_memCFNode *node = new cmpF_cc_memCFNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15842}


15845void cmpD_cc_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
15847}

15849// Build CISC version of this instruction
15850MachNode *cmpD_cc_regNode::cisc_version(int offset) {
cmpD_cc_memNode *node = new cmpD_cc_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15859}


15862void cmpD_cc_reg_CFNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
15864}

15866// Build CISC version of this instruction
15867MachNode *cmpD_cc_reg_CFNode::cisc_version(int offset) {
cmpD_cc_memCFNode *node = new cmpD_cc_memCFNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15876}


15879void cmpF_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
15881}

15883// Build CISC version of this instruction
15884MachNode *cmpF_regNode::cisc_version(int offset) {
cmpF_memNode *node = new cmpF_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15893}


15896void cmpD_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
15898}

15900// Build CISC version of this instruction
15901MachNode *cmpD_regNode::cisc_version(int offset) {
cmpD_memNode *node = new cmpD_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15910}


15913void convF2D_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
15915}

15917// Build CISC version of this instruction
15918MachNode *convF2D_reg_regNode::cisc_version(int offset) {
convF2D_reg_memNode *node = new convF2D_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15927}


15930void convD2F_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
15932}

15934// Build CISC version of this instruction
15935MachNode *convD2F_reg_regNode::cisc_version(int offset) {
convD2F_reg_memNode *node = new convD2F_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15944}


15947void convL2F_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15949}

15951// Build CISC version of this instruction
15952MachNode *convL2F_reg_regNode::cisc_version(int offset) {
convL2F_reg_memNode *node = new convL2F_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15961}


15964void convL2D_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
15966}

15968// Build CISC version of this instruction
15969MachNode *convL2D_reg_regNode::cisc_version(int offset) {
convL2D_reg_memNode *node = new convL2D_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15978}


15981void convI2L_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
15983}

15985// Build CISC version of this instruction
15986MachNode *convI2L_reg_regNode::cisc_version(int offset) {
loadI2LNode *node = new loadI2LNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
15995}


15998void convI2L_reg_reg_zexNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
16000}

16002// Build CISC version of this instruction
16003MachNode *convI2L_reg_reg_zexNode::cisc_version(int offset) {
loadUI2LNode *node = new loadUI2LNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16012}


16015void MoveF2I_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
16017}

16019// Build CISC version of this instruction
16020MachNode *MoveF2I_reg_regNode::cisc_version(int offset) {
MoveF2I_stack_regNode *node = new MoveF2I_stack_regNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16029}


16032void MoveD2L_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
16034}

16036// Build CISC version of this instruction
16037MachNode *MoveD2L_reg_regNode::cisc_version(int offset) {
MoveD2L_stack_regNode *node = new MoveD2L_stack_regNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16046}


16049void MoveI2F_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
16051}

16053// Build CISC version of this instruction
16054MachNode *MoveI2F_reg_regNode::cisc_version(int offset) {
MoveI2F_stack_regNode *node = new MoveI2F_stack_regNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16063}


16066void compI_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
16068}

16070// Build CISC version of this instruction
16071MachNode *compI_rRegNode::cisc_version(int offset) {
compI_rReg_memNode *node = new compI_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16080}


16083void compU_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
16085}

16087// Build CISC version of this instruction
16088MachNode *compU_rRegNode::cisc_version(int offset) {
compU_rReg_memNode *node = new compU_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16097}


16100void compL_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
16102}

16104// Build CISC version of this instruction
16105MachNode *compL_rRegNode::cisc_version(int offset) {
compL_rReg_memNode *node = new compL_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16114}


16117void compUL_rRegNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
16119}

16121// Build CISC version of this instruction
16122MachNode *compUL_rRegNode::cisc_version(int offset) {
compUL_rReg_memNode *node = new compUL_rReg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16131}

16133// Build short branch version of this instruction
16134MachNode *jmpDirNode::short_branch_version() {
jmpDir_shortNode *node = new jmpDir_shortNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
return node;
16140}

16142// Build short branch version of this instruction
16143MachNode *jmpConNode::short_branch_version() {
jmpCon_shortNode *node = new jmpCon_shortNode();
node->_prob = _prob;
node->_fcnt = _fcnt;

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
return node;
16151}

16153// Build short branch version of this instruction
16154MachNode *jmpLoopEndNode::short_branch_version() {
jmpLoopEnd_shortNode *node = new jmpLoopEnd_shortNode();
node->_prob = _prob;
node->_fcnt = _fcnt;

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
return node;
16162}

16164// Build short branch version of this instruction
16165MachNode *jmpLoopEndUNode::short_branch_version() {
jmpLoopEndU_shortNode *node = new jmpLoopEndU_shortNode();
node->_prob = _prob;
node->_fcnt = _fcnt;

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
return node;
16173}

16175// Build short branch version of this instruction
16176MachNode *jmpLoopEndUCFNode::short_branch_version() {
jmpLoopEndUCF_shortNode *node = new jmpLoopEndUCF_shortNode();
node->_prob = _prob;
node->_fcnt = _fcnt;

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
return node;
16184}

16186// Build short branch version of this instruction
16187MachNode *jmpConUNode::short_branch_version() {
jmpConU_shortNode *node = new jmpConU_shortNode();
node->_prob = _prob;
node->_fcnt = _fcnt;

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
return node;
16195}

16197// Build short branch version of this instruction
16198MachNode *jmpConUCFNode::short_branch_version() {
jmpConUCF_shortNode *node = new jmpConUCF_shortNode();
node->_prob = _prob;
node->_fcnt = _fcnt;

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
return node;
16206}

16208// Build short branch version of this instruction
16209MachNode *jmpConUCF2Node::short_branch_version() {
jmpConUCF2_shortNode *node = new jmpConUCF2_shortNode();
node->_prob = _prob;
node->_fcnt = _fcnt;

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
return node;
16217}


16220void addF_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
16222}

16224// Build CISC version of this instruction
16225MachNode *addF_regNode::cisc_version(int offset) {
addF_memNode *node = new addF_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16234}


16237void addF_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
16239}

16241// Build CISC version of this instruction
16242MachNode *addF_reg_regNode::cisc_version(int offset) {
addF_reg_memNode *node = new addF_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16251}


16254void addD_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
16256}

16258// Build CISC version of this instruction
16259MachNode *addD_regNode::cisc_version(int offset) {
addD_memNode *node = new addD_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16268}


16271void addD_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
16273}

16275// Build CISC version of this instruction
16276MachNode *addD_reg_regNode::cisc_version(int offset) {
addD_reg_memNode *node = new addD_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16285}


16288void subF_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
16290}

16292// Build CISC version of this instruction
16293MachNode *subF_regNode::cisc_version(int offset) {
subF_memNode *node = new subF_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16302}


16305void subF_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
16307}

16309// Build CISC version of this instruction
16310MachNode *subF_reg_regNode::cisc_version(int offset) {
subF_reg_memNode *node = new subF_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16319}


16322void subD_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
16324}

16326// Build CISC version of this instruction
16327MachNode *subD_regNode::cisc_version(int offset) {
subD_memNode *node = new subD_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16336}


16339void subD_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
16341}

16343// Build CISC version of this instruction
16344MachNode *subD_reg_regNode::cisc_version(int offset) {
subD_reg_memNode *node = new subD_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16353}


16356void mulF_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
16358}

16360// Build CISC version of this instruction
16361MachNode *mulF_regNode::cisc_version(int offset) {
mulF_memNode *node = new mulF_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16370}


16373void mulF_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
16375}

16377// Build CISC version of this instruction
16378MachNode *mulF_reg_regNode::cisc_version(int offset) {
mulF_reg_memNode *node = new mulF_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16387}


16390void mulD_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
16392}

16394// Build CISC version of this instruction
16395MachNode *mulD_regNode::cisc_version(int offset) {
mulD_memNode *node = new mulD_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16404}


16407void mulD_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
16409}

16411// Build CISC version of this instruction
16412MachNode *mulD_reg_regNode::cisc_version(int offset) {
mulD_reg_memNode *node = new mulD_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16421}


16424void divF_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
16426}

16428// Build CISC version of this instruction
16429MachNode *divF_regNode::cisc_version(int offset) {
divF_memNode *node = new divF_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16438}


16441void divF_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_mask();
16443}

16445// Build CISC version of this instruction
16446MachNode *divF_reg_regNode::cisc_version(int offset) {
divF_reg_memNode *node = new divF_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16455}


16458void divD_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
16460}

16462// Build CISC version of this instruction
16463MachNode *divD_regNode::cisc_version(int offset) {
divD_memNode *node = new divD_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16472}


16475void divD_reg_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_mask();
16477}

16479// Build CISC version of this instruction
16480MachNode *divD_reg_regNode::cisc_version(int offset) {
divD_reg_memNode *node = new divD_reg_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16489}


16492void roundD_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_LEGACY_mask();
16494}

16496// Build CISC version of this instruction
16497MachNode *roundD_regNode::cisc_version(int offset) {
roundD_memNode *node = new roundD_memNode();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16506}


16509void ReplI_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_INT_REG_mask();
16511}

16513// Build CISC version of this instruction
16514MachNode *ReplI_regNode::cisc_version(int offset) {
ReplI_memNode *node = new ReplI_memNode();
node->_bottom_type = bottom_type();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16524}


16527void ReplL_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_LONG_REG_mask();
16529}

16531// Build CISC version of this instruction
16532MachNode *ReplL_regNode::cisc_version(int offset) {
ReplL_memNode *node = new ReplL_memNode();
node->_bottom_type = bottom_type();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16542}


16545void ReplF_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_FLOAT_REG_VL_mask();
16547}

16549// Build CISC version of this instruction
16550MachNode *ReplF_regNode::cisc_version(int offset) {
ReplF_memNode *node = new ReplF_memNode();
node->_bottom_type = bottom_type();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16560}


16563void ReplD_regNode::use_cisc_RegMask() {
_cisc_RegMask = &STACK_OR_DOUBLE_REG_VL_mask();
16565}

16567// Build CISC version of this instruction
16568MachNode *ReplD_regNode::cisc_version(int offset) {
ReplD_memNode *node = new ReplD_memNode();
node->_bottom_type = bottom_type();

// Copy _idx, inputs and operands to new node
fill_new_machnode(node);
// Construct operand to access [stack_pointer + offset]
node->set_opnd_array(cisc_operand(), new indOffset32Oper(offset));

return node;
16578}


16581// Copy _idx, inputs and operands to new node
16582void MachNode::fill_new_machnode(MachNode* node) const {
// New node must use same node index
node->set_idx( _idx );
// Copy machine-independent inputs
for( uint j = 0; j < req(); j++ ) {
  node->add_req(in(j));
}
// Copy my operands, except for cisc position
int nopnds = num_opnds();
assert( node->num_opnds() == (uint)nopnds, "Must have same number of operands")do { if (!(node->num_opnds() == (uint)nopnds)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 16590, "assert(" "node->num_opnds() == (uint)nopnds"
 ") failed", "Must have same number of operands"); ::breakpoint
(); } } while (0);
MachOper **to = node->_opnds;
for( int i = 0; i < nopnds; i++ ) {
  if( i != cisc_operand() ) 
    to[i] = _opnds[i]->clone();
}
16597}

16599void jmpDirNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(1));
oper->_label     = label;
oper->_block_num = block_num;
16603}
16604void jmpDirNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(1));
*label = oper->_label;
*block_num = oper->_block_num;
16608}
16609void jmpConNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16613}
16614void jmpConNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16618}
16619void jmpLoopEndNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16623}
16624void jmpLoopEndNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16628}
16629void jmpLoopEndUNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16633}
16634void jmpLoopEndUNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16638}
16639void jmpLoopEndUCFNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16643}
16644void jmpLoopEndUCFNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16648}
16649void jmpLoopEnd_and_restoreMaskNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(4));
oper->_label     = label;
oper->_block_num = block_num;
16653}
16654void jmpLoopEnd_and_restoreMaskNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(4));
*label = oper->_label;
*block_num = oper->_block_num;
16658}
16659void jmpLoopEndU_and_restoreMaskNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(4));
oper->_label     = label;
oper->_block_num = block_num;
16663}
16664void jmpLoopEndU_and_restoreMaskNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(4));
*label = oper->_label;
*block_num = oper->_block_num;
16668}
16669void jmpLoopEndUCF_and_restoreMaskNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(4));
oper->_label     = label;
oper->_block_num = block_num;
16673}
16674void jmpLoopEndUCF_and_restoreMaskNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(4));
*label = oper->_label;
*block_num = oper->_block_num;
16678}
16679void jmpConUNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16683}
16684void jmpConUNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16688}
16689void jmpConUCFNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16693}
16694void jmpConUCFNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16698}
16699void jmpConUCF2Node::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16703}
16704void jmpConUCF2Node::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16708}
16709void jmpDir_shortNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(1));
oper->_label     = label;
oper->_block_num = block_num;
16713}
16714void jmpDir_shortNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(1));
*label = oper->_label;
*block_num = oper->_block_num;
16718}
16719void jmpCon_shortNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16723}
16724void jmpCon_shortNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16728}
16729void jmpLoopEnd_shortNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16733}
16734void jmpLoopEnd_shortNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16738}
16739void jmpLoopEndU_shortNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16743}
16744void jmpLoopEndU_shortNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16748}
16749void jmpLoopEndUCF_shortNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16753}
16754void jmpLoopEndUCF_shortNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16758}
16759void jmpConU_shortNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16763}
16764void jmpConU_shortNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16768}
16769void jmpConUCF_shortNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16773}
16774void jmpConUCF_shortNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16778}
16779void jmpConUCF2_shortNode::label_set( Label* label, uint block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
oper->_label     = label;
oper->_block_num = block_num;
16783}
16784void jmpConUCF2_shortNode::save_label( Label** label, uint* block_num ) {
labelOper* oper  = (labelOper*)(opnd_array(3));
*label = oper->_label;
*block_num = oper->_block_num;
16788}
16789void CallStaticJavaDirectNode::method_set( intptr_t method ) {
((methodOper*)opnd_array(1))->_method = method;
16791}

16793void CallDynamicJavaDirectNode::method_set( intptr_t method ) {
((methodOper*)opnd_array(1))->_method = method;
16795}

16797void CallRuntimeDirectNode::method_set( intptr_t method ) {
((methodOper*)opnd_array(1))->_method = method;
16799}

16801void CallLeafDirectNode::method_set( intptr_t method ) {
((methodOper*)opnd_array(1))->_method = method;
16803}

16805void CallLeafDirectVectorNode::method_set( intptr_t method ) {
((methodOper*)opnd_array(1))->_method = method;
16807}

16809void CallNativeDirectNode::method_set( intptr_t method ) {
((methodOper*)opnd_array(1))->_method = method;
16811}

16813void CallLeafNoFPDirectNode::method_set( intptr_t method ) {
((methodOper*)opnd_array(1))->_method = method;
16815}

16817int loadBNode::reloc() const {
return 1;
16819}

16821int loadB2LNode::reloc() const {
return 1;
16823}

16825int loadUBNode::reloc() const {
return 1;
16827}

16829int loadUB2LNode::reloc() const {
return 1;
16831}

16833int loadUB2L_immINode::reloc() const {
return 1;
16835}

16837int loadSNode::reloc() const {
return 1;
16839}

16841int loadS2BNode::reloc() const {
return 1;
16843}

16845int loadS2LNode::reloc() const {
return 1;
16847}

16849int loadUSNode::reloc() const {
return 1;
16851}

16853int loadUS2BNode::reloc() const {
return 1;
16855}

16857int loadUS2LNode::reloc() const {
return 1;
16859}

16861int loadUS2L_immI_255Node::reloc() const {
return 1;
16863}

16865int loadUS2L_immINode::reloc() const {
return 1;
16867}

16869int loadINode::reloc() const {
return 1;
16871}

16873int loadI2BNode::reloc() const {
return 1;
16875}

16877int loadI2UBNode::reloc() const {
return 1;
16879}

16881int loadI2SNode::reloc() const {
return 1;
16883}

16885int loadI2USNode::reloc() const {
return 1;
16887}

16889int loadI2LNode::reloc() const {
return 1;
16891}

16893int loadI2L_immI_255Node::reloc() const {
return 1;
16895}

16897int loadI2L_immI_65535Node::reloc() const {
return 1;
16899}

16901int loadI2L_immU31Node::reloc() const {
return 1;
16903}

16905int loadUI2LNode::reloc() const {
return 1;
16907}

16909int loadLNode::reloc() const {
return 1;
16911}

16913int loadRangeNode::reloc() const {
return 1;
16915}

16917int loadPNode::reloc() const {
return 1;
16919}

16921int loadNNode::reloc() const {
return 1;
16923}

16925int loadKlassNode::reloc() const {
return 1;
16927}

16929int loadNKlassNode::reloc() const {
return 1;
16931}

16933int loadFNode::reloc() const {
return 1;
16935}

16937int loadD_partialNode::reloc() const {
return 1;
16939}

16941int loadDNode::reloc() const {
return 1;
16943}

16945int loadConPNode::reloc() const {
return 1;
16947}

16949int loadConP0Node::reloc() const {
return 1;
16951}

16953int loadConP31Node::reloc() const {
return 1;
16955}

16957int loadConFNode::reloc() const {
return 2;
16959}

16961int loadConF0Node::reloc() const {
return 2;
16963}

16965int loadConDNode::reloc() const {
return 2;
16967}

16969int loadConD0Node::reloc() const {
return 2;
16971}

16973int prefetchAllocNode::reloc() const {
return 1;
16975}

16977int prefetchAllocNTANode::reloc() const {
return 1;
16979}

16981int prefetchAllocT0Node::reloc() const {
return 1;
16983}

16985int prefetchAllocT2Node::reloc() const {
return 1;
16987}

16989int storeBNode::reloc() const {
return 2;
16991}

16993int storeCNode::reloc() const {
return 2;
16995}

16997int storeINode::reloc() const {
return 2;
16999}

17001int storeLNode::reloc() const {
return 2;
17003}

17005int storePNode::reloc() const {
return 2;
17007}

17009int storeImmP0Node::reloc() const {
return 3;
17011}

17013int storeImmPNode::reloc() const {
return 3;
17015}

17017int storeNNode::reloc() const {
return 2;
17019}

17021int storeNKlassNode::reloc() const {
return 2;
17023}

17025int storeImmN0Node::reloc() const {
return 2;
17027}

17029int storeImmNNode::reloc() const {
return 2;
17031}

17033int storeImmNKlassNode::reloc() const {
return 2;
17035}

17037int storeImmI0Node::reloc() const {
return 2;
17039}

17041int storeImmINode::reloc() const {
return 2;
17043}

17045int storeImmL0Node::reloc() const {
return 2;
17047}

17049int storeImmLNode::reloc() const {
return 2;
17051}

17053int storeImmC0Node::reloc() const {
return 2;
17055}

17057int storeImmI16Node::reloc() const {
return 2;
17059}

17061int storeImmB0Node::reloc() const {
return 2;
17063}

17065int storeImmBNode::reloc() const {
return 2;
17067}

17069int storeImmCM0_regNode::reloc() const {
return 2;
17071}

17073int storeImmCM0Node::reloc() const {
return 2;
17075}

17077int storeFNode::reloc() const {
return 2;
17079}

17081int storeF0Node::reloc() const {
return 3;
17083}

17085int storeF_immNode::reloc() const {
return 3;
17087}

17089int storeDNode::reloc() const {
return 2;
17091}

17093int storeD0_immNode::reloc() const {
return 3;
17095}

17097int storeD0Node::reloc() const {
return 3;
17099}

17101int popCountI_memNode::reloc() const {
return 1;
17103}

17105int popCountL_memNode::reloc() const {
return 1;
17107}

17109int cmovI_memNode::reloc() const {
return 1;
17111}

17113int cmovI_memUNode::reloc() const {
return 1;
17115}

17117int cmovI_memUCFNode::reloc() const {
return 1;
17119}

17121int cmovL_memNode::reloc() const {
return 1;
17123}

17125int cmovL_memUNode::reloc() const {
return 1;
17127}

17129int cmovL_memUCFNode::reloc() const {
return 1;
17131}

17133int addI_rReg_memNode::reloc() const {
return 1;
17135}

17137int addI_rReg_mem_0Node::reloc() const {
return 1;
17139}

17141int addI_mem_rRegNode::reloc() const {
return 3;
17143}

17145int addI_mem_rReg_0Node::reloc() const {
return 3;
17147}

17149int addI_mem_immNode::reloc() const {
return 3;
17151}

17153int incI_memNode::reloc() const {
return 3;
17155}

17157int decI_memNode::reloc() const {
return 3;
17159}

17161int addL_rReg_memNode::reloc() const {
return 1;
17163}

17165int addL_rReg_mem_0Node::reloc() const {
return 1;
17167}

17169int addL_mem_rRegNode::reloc() const {
return 3;
17171}

17173int addL_mem_rReg_0Node::reloc() const {
return 3;
17175}

17177int addL_mem_immNode::reloc() const {
return 3;
17179}

17181int incL_memNode::reloc() const {
return 3;
17183}

17185int decL_memNode::reloc() const {
return 3;
17187}

17189int loadPLockedNode::reloc() const {
return 1;
17191}

17193int storePConditionalNode::reloc() const {
return 1;
17195}

17197int storeIConditionalNode::reloc() const {
return 1;
17199}

17201int storeLConditionalNode::reloc() const {
return 1;
17203}

17205int compareAndSwapPNode::reloc() const {
return 1;
17207}

17209int compareAndSwapP_0Node::reloc() const {
return 1;
17211}

17213int compareAndSwapLNode::reloc() const {
return 1;
17215}

17217int compareAndSwapL_0Node::reloc() const {
return 1;
17219}

17221int compareAndSwapINode::reloc() const {
return 1;
17223}

17225int compareAndSwapI_0Node::reloc() const {
return 1;
17227}

17229int compareAndSwapBNode::reloc() const {
return 1;
17231}

17233int compareAndSwapB_0Node::reloc() const {
return 1;
17235}

17237int compareAndSwapSNode::reloc() const {
return 1;
17239}

17241int compareAndSwapS_0Node::reloc() const {
return 1;
17243}

17245int compareAndSwapNNode::reloc() const {
return 1;
17247}

17249int compareAndSwapN_0Node::reloc() const {
return 1;
17251}

17253int compareAndExchangeBNode::reloc() const {
return 1;
17255}

17257int compareAndExchangeSNode::reloc() const {
return 1;
17259}

17261int compareAndExchangeINode::reloc() const {
return 1;
17263}

17265int compareAndExchangeLNode::reloc() const {
return 1;
17267}

17269int compareAndExchangeNNode::reloc() const {
return 1;
17271}

17273int compareAndExchangePNode::reloc() const {
return 1;
17275}

17277int xaddB_no_resNode::reloc() const {
return 1;
17279}

17281int xaddBNode::reloc() const {
return 1;
17283}

17285int xaddS_no_resNode::reloc() const {
return 1;
17287}

17289int xaddSNode::reloc() const {
return 1;
17291}

17293int xaddI_no_resNode::reloc() const {
return 1;
17295}

17297int xaddINode::reloc() const {
return 1;
17299}

17301int xaddL_no_resNode::reloc() const {
return 1;
17303}

17305int xaddLNode::reloc() const {
return 1;
17307}

17309int xchgBNode::reloc() const {
return 1;
17311}

17313int xchgSNode::reloc() const {
return 1;
17315}

17317int xchgINode::reloc() const {
return 1;
17319}

17321int xchgLNode::reloc() const {
return 1;
17323}

17325int xchgPNode::reloc() const {
return 1;
17327}

17329int xchgNNode::reloc() const {
return 1;
17331}

17333int subI_rReg_memNode::reloc() const {
return 1;
17335}

17337int subI_mem_rRegNode::reloc() const {
return 3;
17339}

17341int subI_mem_immNode::reloc() const {
return 3;
17343}

17345int subL_rReg_memNode::reloc() const {
return 1;
17347}

17349int subL_mem_rRegNode::reloc() const {
return 3;
17351}

17353int subL_mem_immNode::reloc() const {
return 3;
17355}

17357int negI_memNode::reloc() const {
return 3;
17359}

17361int negL_memNode::reloc() const {
return 3;
17363}

17365int mulI_memNode::reloc() const {
return 1;
17367}

17369int mulI_mem_0Node::reloc() const {
return 1;
17371}

17373int mulI_mem_immNode::reloc() const {
return 1;
17375}

17377int mulL_memNode::reloc() const {
return 1;
17379}

17381int mulL_mem_0Node::reloc() const {
return 1;
17383}

17385int mulL_mem_immNode::reloc() const {
return 1;
17387}

17389int salI_mem_1Node::reloc() const {
return 3;
17391}

17393int salI_mem_immNode::reloc() const {
return 3;
17395}

17397int salI_mem_CLNode::reloc() const {
return 3;
17399}

17401int sarI_mem_1Node::reloc() const {
return 3;
17403}

17405int sarI_mem_immNode::reloc() const {
return 3;
17407}

17409int sarI_mem_CLNode::reloc() const {
return 3;
17411}

17413int shrI_mem_1Node::reloc() const {
return 3;
17415}

17417int shrI_mem_immNode::reloc() const {
return 3;
17419}

17421int shrI_mem_CLNode::reloc() const {
return 3;
17423}

17425int salL_mem_1Node::reloc() const {
return 3;
17427}

17429int salL_mem_immNode::reloc() const {
return 3;
17431}

17433int salL_mem_CLNode::reloc() const {
return 3;
17435}

17437int sarL_mem_1Node::reloc() const {
return 3;
17439}

17441int sarL_mem_immNode::reloc() const {
return 3;
17443}

17445int sarL_mem_CLNode::reloc() const {
return 3;
17447}

17449int shrL_mem_1Node::reloc() const {
return 3;
17451}

17453int shrL_mem_immNode::reloc() const {
return 3;
17455}

17457int shrL_mem_CLNode::reloc() const {
return 3;
17459}

17461int andI_rReg_memNode::reloc() const {
return 1;
17463}

17465int andI_rReg_mem_0Node::reloc() const {
return 1;
17467}

17469int andB_mem_rRegNode::reloc() const {
return 3;
17471}

17473int andB_mem_rReg_0Node::reloc() const {
return 3;
17475}

17477int andI_mem_rRegNode::reloc() const {
return 3;
17479}

17481int andI_mem_rReg_0Node::reloc() const {
return 3;
17483}

17485int andI_mem_immNode::reloc() const {
return 3;
17487}

17489int andnI_rReg_rReg_memNode::reloc() const {
return 1;
17491}

17493int andnI_rReg_rReg_mem_0Node::reloc() const {
return 1;
17495}

17497int blsiI_rReg_memNode::reloc() const {
return 2;
17499}

17501int blsiI_rReg_mem_0Node::reloc() const {
return 2;
17503}

17505int blsmskI_rReg_memNode::reloc() const {
return 2;
17507}

17509int blsmskI_rReg_mem_0Node::reloc() const {
return 2;
17511}

17513int blsrI_rReg_memNode::reloc() const {
return 2;
17515}

17517int blsrI_rReg_mem_0Node::reloc() const {
return 2;
17519}

17521int orI_rReg_memNode::reloc() const {
return 1;
17523}

17525int orI_rReg_mem_0Node::reloc() const {
return 1;
17527}

17529int orB_mem_rRegNode::reloc() const {
return 3;
17531}

17533int orB_mem_rReg_0Node::reloc() const {
return 3;
17535}

17537int orI_mem_rRegNode::reloc() const {
return 3;
17539}

17541int orI_mem_rReg_0Node::reloc() const {
return 3;
17543}

17545int orI_mem_immNode::reloc() const {
return 3;
17547}

17549int xorI_rReg_memNode::reloc() const {
return 1;
17551}

17553int xorI_rReg_mem_0Node::reloc() const {
return 1;
17555}

17557int xorB_mem_rRegNode::reloc() const {
return 3;
17559}

17561int xorB_mem_rReg_0Node::reloc() const {
return 3;
17563}

17565int xorI_mem_rRegNode::reloc() const {
return 3;
17567}

17569int xorI_mem_rReg_0Node::reloc() const {
return 3;
17571}

17573int xorI_mem_immNode::reloc() const {
return 3;
17575}

17577int andL_rReg_memNode::reloc() const {
return 1;
17579}

17581int andL_rReg_mem_0Node::reloc() const {
return 1;
17583}

17585int andL_mem_rRegNode::reloc() const {
return 3;
17587}

17589int andL_mem_rReg_0Node::reloc() const {
return 3;
17591}

17593int andL_mem_immNode::reloc() const {
return 3;
17595}

17597int btrL_mem_immNode::reloc() const {
return 3;
17599}

17601int andnL_rReg_rReg_memNode::reloc() const {
return 1;
17603}

17605int andnL_rReg_rReg_mem_0Node::reloc() const {
return 1;
17607}

17609int blsiL_rReg_memNode::reloc() const {
return 2;
17611}

17613int blsiL_rReg_mem_0Node::reloc() const {
return 2;
17615}

17617int blsmskL_rReg_memNode::reloc() const {
return 2;
17619}

17621int blsmskL_rReg_mem_0Node::reloc() const {
return 2;
17623}

17625int blsrL_rReg_memNode::reloc() const {
return 2;
17627}

17629int blsrL_rReg_mem_0Node::reloc() const {
return 2;
17631}

17633int orL_rReg_memNode::reloc() const {
return 1;
17635}

17637int orL_rReg_mem_0Node::reloc() const {
return 1;
17639}

17641int orL_mem_rRegNode::reloc() const {
return 3;
17643}

17645int orL_mem_rReg_0Node::reloc() const {
return 3;
17647}

17649int orL_mem_immNode::reloc() const {
return 3;
17651}

17653int btsL_mem_immNode::reloc() const {
return 3;
17655}

17657int xorL_rReg_memNode::reloc() const {
return 1;
17659}

17661int xorL_rReg_mem_0Node::reloc() const {
return 1;
17663}

17665int xorL_mem_rRegNode::reloc() const {
return 3;
17667}

17669int xorL_mem_rReg_0Node::reloc() const {
return 3;
17671}

17673int xorL_mem_immNode::reloc() const {
return 3;
17675}

17677int cmpF_cc_memNode::reloc() const {
return 1;
17679}

17681int cmpF_cc_memCFNode::reloc() const {
return 1;
17683}

17685int cmpF_cc_immNode::reloc() const {
return 1;
17687}

17689int cmpF_cc_immCFNode::reloc() const {
return 1;
17691}

17693int cmpD_cc_memNode::reloc() const {
return 1;
17695}

17697int cmpD_cc_memCFNode::reloc() const {
return 1;
17699}

17701int cmpD_cc_immNode::reloc() const {
return 1;
17703}

17705int cmpD_cc_immCFNode::reloc() const {
return 1;
17707}

17709int cmpF_memNode::reloc() const {
return 1;
17711}

17713int cmpF_immNode::reloc() const {
return 1;
17715}

17717int cmpD_memNode::reloc() const {
return 1;
17719}

17721int cmpD_immNode::reloc() const {
return 1;
17723}

17725int convF2D_reg_memNode::reloc() const {
return 1;
17727}

17729int convD2F_reg_memNode::reloc() const {
return 1;
17731}

17733int convI2F_reg_memNode::reloc() const {
return 1;
17735}

17737int convI2D_reg_memNode::reloc() const {
return 1;
17739}

17741int convL2F_reg_memNode::reloc() const {
return 1;
17743}

17745int convL2D_reg_memNode::reloc() const {
return 1;
17747}

17749int convI2L_reg_mem_zexNode::reloc() const {
return 1;
17751}

17753int compI_rReg_memNode::reloc() const {
return 1;
17755}

17757int testI_reg_memNode::reloc() const {
return 1;
17759}

17761int testI_reg_mem_0Node::reloc() const {
return 1;
17763}

17765int compU_rReg_memNode::reloc() const {
return 1;
17767}

17769int compP_rReg_memNode::reloc() const {
return 1;
17771}

17773int compP_mem_rRegNode::reloc() const {
return 1;
17775}

17777int testP_regNode::reloc() const {
return 1;
17779}

17781int testP_memNode::reloc() const {
return 2;
17783}

17785int testP_mem_reg0Node::reloc() const {
return 2;
17787}

17789int compN_rReg_memNode::reloc() const {
return 1;
17791}

17793int compN_mem_immNode::reloc() const {
return 1;
17795}

17797int compN_mem_imm_klassNode::reloc() const {
return 1;
17799}

17801int testN_memNode::reloc() const {
return 1;
17803}

17805int testN_mem_reg0Node::reloc() const {
return 1;
17807}

17809int compL_rReg_memNode::reloc() const {
return 1;
17811}

17813int testL_reg_memNode::reloc() const {
return 1;
17815}

17817int testL_reg_mem_0Node::reloc() const {
return 1;
17819}

17821int testL_reg_mem2Node::reloc() const {
return 1;
17823}

17825int testL_reg_mem2_0Node::reloc() const {
return 1;
17827}

17829int compUL_rReg_memNode::reloc() const {
return 1;
17831}

17833int compB_mem_immNode::reloc() const {
return 1;
17835}

17837int testUB_mem_immNode::reloc() const {
return 1;
17839}

17841int testB_mem_immNode::reloc() const {
return 1;
17843}

17845int partialSubtypeCheck_vs_ZeroNode::reloc() const {
return 1;
17847}

17849int safePoint_poll_tlsNode::reloc() const {
return 1;
17851}

17853int CallStaticJavaDirectNode::reloc() const {
return 1;
17855}

17857int CallDynamicJavaDirectNode::reloc() const {
return 1;
17859}

17861int CallRuntimeDirectNode::reloc() const {
return 1;
17863}

17865int CallLeafDirectNode::reloc() const {
return 1;
17867}

17869int CallLeafDirectVectorNode::reloc() const {
return 1;
17871}

17873int CallNativeDirectNode::reloc() const {
return 1;
17875}

17877int CallLeafNoFPDirectNode::reloc() const {
return 1;
17879}

17881int RetNode::reloc() const {
return 1;
17883}

17885int TailCalljmpIndNode::reloc() const {
return 1;
17887}

17889int tailjmpIndNode::reloc() const {
return 1;
17891}

17893int RethrowExceptionNode::reloc() const {
return 1;
17895}

17897int addF_memNode::reloc() const {
return 1;
17899}

17901int addF_mem_0Node::reloc() const {
return 1;
17903}

17905int addF_immNode::reloc() const {
return 1;
17907}

17909int addF_reg_memNode::reloc() const {
return 1;
17911}

17913int addF_reg_mem_0Node::reloc() const {
return 1;
17915}

17917int addF_reg_immNode::reloc() const {
return 1;
17919}

17921int addD_memNode::reloc() const {
return 1;
17923}

17925int addD_mem_0Node::reloc() const {
return 1;
17927}

17929int addD_immNode::reloc() const {
return 1;
17931}

17933int addD_reg_memNode::reloc() const {
return 1;
17935}

17937int addD_reg_mem_0Node::reloc() const {
return 1;
17939}

17941int addD_reg_immNode::reloc() const {
return 1;
17943}

17945int subF_memNode::reloc() const {
return 1;
17947}

17949int subF_immNode::reloc() const {
return 1;
17951}

17953int subF_reg_memNode::reloc() const {
return 1;
17955}

17957int subF_reg_immNode::reloc() const {
return 1;
17959}

17961int subD_memNode::reloc() const {
return 1;
17963}

17965int subD_immNode::reloc() const {
return 1;
17967}

17969int subD_reg_memNode::reloc() const {
return 1;
17971}

17973int subD_reg_immNode::reloc() const {
return 1;
17975}

17977int mulF_memNode::reloc() const {
return 1;
17979}

17981int mulF_mem_0Node::reloc() const {
return 1;
17983}

17985int mulF_immNode::reloc() const {
return 1;
17987}

17989int mulF_reg_memNode::reloc() const {
return 1;
17991}

17993int mulF_reg_mem_0Node::reloc() const {
return 1;
17995}

17997int mulF_reg_immNode::reloc() const {
return 1;
17999}

18001int mulD_memNode::reloc() const {
return 1;
18003}

18005int mulD_mem_0Node::reloc() const {
return 1;
18007}

18009int mulD_immNode::reloc() const {
return 1;
18011}

18013int mulD_reg_memNode::reloc() const {
return 1;
18015}

18017int mulD_reg_mem_0Node::reloc() const {
return 1;
18019}

18021int mulD_reg_immNode::reloc() const {
return 1;
18023}

18025int divF_memNode::reloc() const {
return 1;
18027}

18029int divF_immNode::reloc() const {
return 1;
18031}

18033int divF_reg_memNode::reloc() const {
return 1;
18035}

18037int divF_reg_immNode::reloc() const {
return 1;
18039}

18041int divD_memNode::reloc() const {
return 1;
18043}

18045int divD_immNode::reloc() const {
return 1;
18047}

18049int divD_reg_memNode::reloc() const {
return 1;
18051}

18053int divD_reg_immNode::reloc() const {
return 1;
18055}

18057int roundD_memNode::reloc() const {
return 1;
18059}

18061int roundD_immNode::reloc() const {
return 1;
18063}

18065int vroundD_memNode::reloc() const {
return 1;
18067}

18069int vround8D_memNode::reloc() const {
return 1;
18071}

18073int loadVNode::reloc() const {
return 1;
18075}

18077int storeVNode::reloc() const {
return 2;
18079}

18081int gatherNode::reloc() const {
return 1;
18083}

18085int evgatherNode::reloc() const {
return 1;
18087}

18089int evgather_maskedNode::reloc() const {
return 1;
18091}

18093int scatterNode::reloc() const {
return 2;
18095}

18097int scatter_maskedNode::reloc() const {
return 2;
18099}

18101int ReplB_memNode::reloc() const {
return 1;
18103}

18105int ReplS_memNode::reloc() const {
return 1;
18107}

18109int ReplI_memNode::reloc() const {
return 1;
18111}

18113int ReplL_memNode::reloc() const {
return 1;
18115}

18117int ReplF_memNode::reloc() const {
return 1;
18119}

18121int ReplF_zeroNode::reloc() const {
return 1;
18123}

18125int ReplD_memNode::reloc() const {
return 1;
18127}

18129int ReplD_zeroNode::reloc() const {
return 1;
18131}

18133int minmax_reduction2FNode::reloc() const {
return 1;
18135}

18137int minmax_reduction2F_0Node::reloc() const {
return 1;
18139}

18141int minmax_reductionFNode::reloc() const {
return 1;
18143}

18145int minmax_reductionF_0Node::reloc() const {
return 1;
18147}

18149int minmax_reduction2DNode::reloc() const {
return 1;
18151}

18153int minmax_reduction2D_0Node::reloc() const {
return 1;
18155}

18157int minmax_reductionDNode::reloc() const {
return 1;
18159}

18161int minmax_reductionD_0Node::reloc() const {
return 1;
18163}

18165int vaddB_memNode::reloc() const {
return 1;
18167}

18169int vaddB_mem_0Node::reloc() const {
return 1;
18171}

18173int vaddS_memNode::reloc() const {
return 1;
18175}

18177int vaddS_mem_0Node::reloc() const {
return 1;
18179}

18181int vaddI_memNode::reloc() const {
return 1;
18183}

18185int vaddI_mem_0Node::reloc() const {
return 1;
18187}

18189int vaddL_memNode::reloc() const {
return 1;
18191}

18193int vaddL_mem_0Node::reloc() const {
return 1;
18195}

18197int vaddF_memNode::reloc() const {
return 1;
18199}

18201int vaddF_mem_0Node::reloc() const {
return 1;
18203}

18205int vaddD_memNode::reloc() const {
return 1;
18207}

18209int vaddD_mem_0Node::reloc() const {
return 1;
18211}

18213int vsubB_memNode::reloc() const {
return 1;
18215}

18217int vsubS_memNode::reloc() const {
return 1;
18219}

18221int vsubI_memNode::reloc() const {
return 1;
18223}

18225int vsubL_memNode::reloc() const {
return 1;
18227}

18229int vsubF_memNode::reloc() const {
return 1;
18231}

18233int vsubD_memNode::reloc() const {
return 1;
18235}

18237int vmulS_memNode::reloc() const {
return 1;
18239}

18241int vmulS_mem_0Node::reloc() const {
return 1;
18243}

18245int vmulI_memNode::reloc() const {
return 1;
18247}

18249int vmulI_mem_0Node::reloc() const {
return 1;
18251}

18253int vmulL_memNode::reloc() const {
return 1;
18255}

18257int vmulL_mem_0Node::reloc() const {
return 1;
18259}

18261int vmulF_memNode::reloc() const {
return 1;
18263}

18265int vmulF_mem_0Node::reloc() const {
return 1;
18267}

18269int vmulD_memNode::reloc() const {
return 1;
18271}

18273int vmulD_mem_0Node::reloc() const {
return 1;
18275}

18277int vdivF_memNode::reloc() const {
return 1;
18279}

18281int vdivD_memNode::reloc() const {
return 1;
18283}

18285int copySignD_immNode::reloc() const {
return 1;
18287}

18289int vsqrtF_memNode::reloc() const {
return 1;
18291}

18293int vsqrtD_memNode::reloc() const {
return 1;
18295}

18297int vand_memNode::reloc() const {
return 1;
18299}

18301int vand_mem_0Node::reloc() const {
return 1;
18303}

18305int vor_memNode::reloc() const {
return 1;
18307}

18309int vor_mem_0Node::reloc() const {
return 1;
18311}

18313int vxor_memNode::reloc() const {
return 1;
18315}

18317int vxor_mem_0Node::reloc() const {
return 1;
18319}

18321int vfmaF_memNode::reloc() const {
return 1;
18323}

18325int vfmaD_memNode::reloc() const {
return 1;
18327}

18329int vpternlog_memNode::reloc() const {
return 1;
18331}

18333int vmasked_load64Node::reloc() const {
return 1;
18335}

18337int vmasked_store64Node::reloc() const {
return 2;
18339}

18341int vadd_mem_maskedNode::reloc() const {
return 1;
18343}

18345int vadd_mem_masked_0Node::reloc() const {
return 1;
18347}

18349int vadd_mem_masked_1Node::reloc() const {
return 1;
18351}

18353int vadd_mem_masked_2Node::reloc() const {
return 1;
18355}

18357int vadd_mem_masked_3Node::reloc() const {
return 1;
18359}

18361int vadd_mem_masked_4Node::reloc() const {
return 1;
18363}

18365int vxor_mem_maskedNode::reloc() const {
return 1;
18367}

18369int vor_mem_maskedNode::reloc() const {
return 1;
18371}

18373int vand_mem_maskedNode::reloc() const {
return 1;
18375}

18377int vsub_mem_maskedNode::reloc() const {
return 1;
18379}

18381int vsub_mem_masked_0Node::reloc() const {
return 1;
18383}

18385int vsub_mem_masked_1Node::reloc() const {
return 1;
18387}

18389int vsub_mem_masked_2Node::reloc() const {
return 1;
18391}

18393int vsub_mem_masked_3Node::reloc() const {
return 1;
18395}

18397int vsub_mem_masked_4Node::reloc() const {
return 1;
18399}

18401int vmul_mem_maskedNode::reloc() const {
return 1;
18403}

18405int vmul_mem_masked_0Node::reloc() const {
return 1;
18407}

18409int vmul_mem_masked_1Node::reloc() const {
return 1;
18411}

18413int vmul_mem_masked_2Node::reloc() const {
return 1;
18415}

18417int vmul_mem_masked_3Node::reloc() const {
return 1;
18419}

18421int vdiv_mem_maskedNode::reloc() const {
return 1;
18423}

18425int vdiv_mem_masked_0Node::reloc() const {
return 1;
18427}

18429int vlshift_mem_maskedNode::reloc() const {
return 1;
18431}

18433int vlshift_mem_masked_0Node::reloc() const {
return 1;
18435}

18437int vlshift_mem_masked_1Node::reloc() const {
return 1;
18439}

18441int vrshift_mem_maskedNode::reloc() const {
return 1;
18443}

18445int vrshift_mem_masked_0Node::reloc() const {
return 1;
18447}

18449int vrshift_mem_masked_1Node::reloc() const {
return 1;
18451}

18453int vurshift_mem_maskedNode::reloc() const {
return 1;
18455}

18457int vurshift_mem_masked_0Node::reloc() const {
return 1;
18459}

18461int vurshift_mem_masked_1Node::reloc() const {
return 1;
18463}

18465int vmaxv_mem_maskedNode::reloc() const {
return 1;
18467}

18469int vminv_mem_maskedNode::reloc() const {
return 1;
18471}

18473int vfma_mem_maskedNode::reloc() const {
return 1;
18475}

18477int vfma_mem_masked_0Node::reloc() const {
return 1;
18479}

18481int compareAndSwapP_shenandoahNode::reloc() const {
return 1;
18483}

18485int compareAndSwapP_shenandoah_0Node::reloc() const {
return 1;
18487}

18489int compareAndSwapN_shenandoahNode::reloc() const {
return 1;
18491}

18493int compareAndSwapN_shenandoah_0Node::reloc() const {
return 1;
18495}

18497int compareAndExchangeN_shenandoahNode::reloc() const {
return 1;
18499}

18501int compareAndExchangeP_shenandoahNode::reloc() const {
return 1;
18503}

18505int zLoadPNode::reloc() const {
return 1;
18507}

18509int zCompareAndExchangePNode::reloc() const {
return 1;
18511}

18513int zCompareAndSwapPNode::reloc() const {
return 1;
18515}

18517int zCompareAndSwapP_0Node::reloc() const {
return 1;
18519}

18521int zXChgPNode::reloc() const {
return 1;
18523}


18526void MoveF2VLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

18534#line 4828 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 4829); ::breakpoint(); } while (0);

18538#line 18538 "ad_x86.cpp"
}
18540}

18542void MoveF2LEGNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

18550#line 4838 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 4839); ::breakpoint(); } while (0);

18554#line 18554 "ad_x86.cpp"
}
18556}

18558void MoveVL2FNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

18566#line 4848 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 4849); ::breakpoint(); } while (0);

18570#line 18570 "ad_x86.cpp"
}
18572}

18574void MoveLEG2FNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

18582#line 4858 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 4859); ::breakpoint(); } while (0);

18586#line 18586 "ad_x86.cpp"
}
18588}

18590void MoveD2VLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

18598#line 4868 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 4869); ::breakpoint(); } while (0);

18602#line 18602 "ad_x86.cpp"
}
18604}

18606void MoveD2LEGNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

18614#line 4878 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 4879); ::breakpoint(); } while (0);

18618#line 18618 "ad_x86.cpp"
}
18620}

18622void MoveVL2DNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

18630#line 4888 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 4889); ::breakpoint(); } while (0);

18634#line 18634 "ad_x86.cpp"
}
18636}

18638void MoveLEG2DNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

18646#line 4898 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 4899); ::breakpoint(); } while (0);

18650#line 18650 "ad_x86.cpp"
}
18652}

18654void loadBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18662#line 4915 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movsbl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18666#line 18666 "ad_x86.cpp"
}
18668}

18670void loadB2LNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18678#line 4930 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movsbq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18682#line 18682 "ad_x86.cpp"
}
18684}

18686void loadUBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18694#line 4945 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18698#line 18698 "ad_x86.cpp"
}
18700}

18702void loadUB2LNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18710#line 4960 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzbq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18714#line 18714 "ad_x86.cpp"
}
18716}

18718void loadUB2L_immINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

18727#line 4974 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rdst = opnd_array(0)->as_Register(ra_,this)/* dst */;
  ___masm. movzbq(Rdst, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. andl(Rdst, opnd_array(2)->constant()& right_n_bits(8)((((8) >= BitsPerWord) ? 0 : (OneBit << (8))) - 1));

18733#line 18733 "ad_x86.cpp"
}
18735}

18737void loadSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18745#line 4990 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movswl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18749#line 18749 "ad_x86.cpp"
}
18751}

18753void loadS2BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// twentyfour
{
  C2_MacroAssembler _masm(&cbuf);

18762#line 5003 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movsbl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18766#line 18766 "ad_x86.cpp"
}
18768}

18770void loadS2LNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18778#line 5017 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movswq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18782#line 18782 "ad_x86.cpp"
}
18784}

18786void loadUSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18794#line 5032 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzwl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18798#line 18798 "ad_x86.cpp"
}
18800}

18802void loadUS2BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// twentyfour
{
  C2_MacroAssembler _masm(&cbuf);

18811#line 5045 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movsbl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18815#line 18815 "ad_x86.cpp"
}
18817}

18819void loadUS2LNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18827#line 5059 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzwq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18831#line 18831 "ad_x86.cpp"
}
18833}

18835void loadUS2L_immI_255Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

18844#line 5071 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzbq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18848#line 18848 "ad_x86.cpp"
}
18850}

18852void loadUS2L_immINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

18861#line 5084 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rdst = opnd_array(0)->as_Register(ra_,this)/* dst */;
  ___masm. movzwq(Rdst, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. andl(Rdst, opnd_array(2)->constant()& right_n_bits(16)((((16) >= BitsPerWord) ? 0 : (OneBit << (16))) - 1));

18867#line 18867 "ad_x86.cpp"
}
18869}

18871void loadINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18879#line 5100 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18883#line 18883 "ad_x86.cpp"
}
18885}

18887void loadI2BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// twentyfour
{
  C2_MacroAssembler _masm(&cbuf);

18896#line 5113 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movsbl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18900#line 18900 "ad_x86.cpp"
}
18902}

18904void loadI2UBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

18913#line 5125 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18917#line 18917 "ad_x86.cpp"
}
18919}

18921void loadI2SNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// sixteen
{
  C2_MacroAssembler _masm(&cbuf);

18930#line 5137 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movswl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18934#line 18934 "ad_x86.cpp"
}
18936}

18938void loadI2USNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

18947#line 5149 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzwl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18951#line 18951 "ad_x86.cpp"
}
18953}

18955void loadI2LNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

18963#line 5163 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movslq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18967#line 18967 "ad_x86.cpp"
}
18969}

18971void loadI2L_immI_255Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

18980#line 5175 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzbq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

18984#line 18984 "ad_x86.cpp"
}
18986}

18988void loadI2L_immI_65535Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

18997#line 5186 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzwq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19001#line 19001 "ad_x86.cpp"
}
19003}

19005void loadI2L_immU31Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

19014#line 5199 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rdst = opnd_array(0)->as_Register(ra_,this)/* dst */;
  ___masm. movl(Rdst, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. andl(Rdst, opnd_array(2)->constant());

19020#line 19020 "ad_x86.cpp"
}
19022}

19024void loadUI2LNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

19033#line 5215 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19037#line 19037 "ad_x86.cpp"
}
19039}

19041void loadLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19049#line 5230 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19053#line 19053 "ad_x86.cpp"
}
19055}

19057void loadRangeNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19065#line 5244 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19069#line 19069 "ad_x86.cpp"
}
19071}

19073void loadPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19081#line 5258 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19085#line 19085 "ad_x86.cpp"
}
19087}

19089void loadNNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19097#line 5271 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

   ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
 
19101#line 19101 "ad_x86.cpp"
}
19103}

19105void loadKlassNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19113#line 5285 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19117#line 19117 "ad_x86.cpp"
}
19119}

19121void loadNKlassNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19129#line 5298 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19133#line 19133 "ad_x86.cpp"
}
19135}

19137void loadFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19145#line 5311 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movflt(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19149#line 19149 "ad_x86.cpp"
}
19151}

19153void loadD_partialNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19161#line 5325 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdbl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19165#line 19165 "ad_x86.cpp"
}
19167}

19169void loadDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19177#line 5338 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdbl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19181#line 19181 "ad_x86.cpp"
}
19183}

19185void maxF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
{
  C2_MacroAssembler _masm(&cbuf);

19197#line 5364 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  int vector_len = Assembler::AVX_128bit;
  ___masm. vblendvps(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, vector_len);
  ___masm. vblendvps(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, vector_len);
  ___masm. vmaxss(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */);
  ___masm. vcmpps(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, Assembler::_false, vector_len);
  ___masm. vblendvps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, vector_len);

19206#line 19206 "ad_x86.cpp"
}
19208}

19210void maxF_reduction_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// xmmt
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

19221#line 5381 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_fp_min_max(_masm, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* xmmt */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */,
                  false /*min*/, true /*single*/);

19226#line 19226 "ad_x86.cpp"
}
19228}

19230void maxD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
{
  C2_MacroAssembler _masm(&cbuf);

19242#line 5400 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  int vector_len = Assembler::AVX_128bit;
  ___masm. vblendvpd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, vector_len);
  ___masm. vblendvpd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, vector_len);
  ___masm. vmaxsd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */);
  ___masm. vcmppd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, Assembler::_false, vector_len);
  ___masm. vblendvpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, vector_len);

19251#line 19251 "ad_x86.cpp"
}
19253}

19255void maxD_reduction_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// xmmt
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

19266#line 5417 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_fp_min_max(_masm, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* xmmt */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */,
                  false /*min*/, false /*single*/);

19271#line 19271 "ad_x86.cpp"
}
19273}

19275void minF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
{
  C2_MacroAssembler _masm(&cbuf);

19287#line 5436 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  int vector_len = Assembler::AVX_128bit;
  ___masm. vblendvps(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, vector_len);
  ___masm. vblendvps(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, vector_len);
  ___masm. vminss(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */);
  ___masm. vcmpps(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, Assembler::_false, vector_len);
  ___masm. vblendvps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, vector_len);

19296#line 19296 "ad_x86.cpp"
}
19298}

19300void minF_reduction_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// xmmt
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

19311#line 5453 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_fp_min_max(_masm, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* xmmt */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */,
                  true /*min*/, true /*single*/);

19316#line 19316 "ad_x86.cpp"
}
19318}

19320void minD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
{
  C2_MacroAssembler _masm(&cbuf);

19332#line 5472 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  int vector_len = Assembler::AVX_128bit;
  ___masm. vblendvpd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, vector_len);
  ___masm. vblendvpd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, vector_len);
  ___masm. vminsd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */);
  ___masm. vcmppd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, Assembler::_false, vector_len);
  ___masm. vblendvpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, vector_len);

19341#line 19341 "ad_x86.cpp"
}
19343}

19345void minD_reduction_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// xmmt
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

19356#line 5489 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_fp_min_max(_masm, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* xmmt */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */,
                  true /*min*/, false /*single*/);

19361#line 19361 "ad_x86.cpp"
}
19363}

19365void leaP8Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19373#line 5503 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19377#line 19377 "ad_x86.cpp"
}
19379}

19381void leaP32Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19389#line 5515 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19393#line 19393 "ad_x86.cpp"
}
19395}

19397void leaPIdxOffNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19405#line 5527 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19409#line 19409 "ad_x86.cpp"
}
19411}

19413void leaPIdxScaleNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19421#line 5539 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19425#line 19425 "ad_x86.cpp"
}
19427}

19429void leaPPosIdxScaleNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19437#line 5551 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19441#line 19441 "ad_x86.cpp"
}
19443}

19445void leaPIdxScaleOffNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19453#line 5563 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19457#line 19457 "ad_x86.cpp"
}
19459}

19461void leaPPosIdxOffNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19469#line 5575 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19473#line 19473 "ad_x86.cpp"
}
19475}

19477void leaPPosIdxScaleOffNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19485#line 5587 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19489#line 19489 "ad_x86.cpp"
}
19491}

19493void leaPCompressedOopOffsetNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19501#line 5601 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19505#line 19505 "ad_x86.cpp"
}
19507}

19509void leaP8NarrowNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19517#line 5614 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19521#line 19521 "ad_x86.cpp"
}
19523}

19525void leaP32NarrowNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19533#line 5627 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19537#line 19537 "ad_x86.cpp"
}
19539}

19541void leaPIdxOffNarrowNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19549#line 5640 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19553#line 19553 "ad_x86.cpp"
}
19555}

19557void leaPIdxScaleNarrowNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19565#line 5653 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19569#line 19569 "ad_x86.cpp"
}
19571}

19573void leaPIdxScaleOffNarrowNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19581#line 5666 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19585#line 19585 "ad_x86.cpp"
}
19587}

19589void leaPPosIdxOffNarrowNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19597#line 5679 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19601#line 19601 "ad_x86.cpp"
}
19603}

19605void leaPPosIdxScaleOffNarrowNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

19613#line 5692 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

19617#line 19617 "ad_x86.cpp"
}
19619}

19621void loadConINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19629#line 5703 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->constant());

19633#line 19633 "ad_x86.cpp"
}
19635}

19637void loadConI0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19645#line 5716 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

19649#line 19649 "ad_x86.cpp"
}
19651}

19653void loadConLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19661#line 5728 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. mov64(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->constantL());

19665#line 19665 "ad_x86.cpp"
}
19667}

19669void loadConL0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19677#line 5741 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

19681#line 19681 "ad_x86.cpp"
}
19683}

19685void loadConUL32Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19693#line 5753 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->constantL());

19697#line 19697 "ad_x86.cpp"
}
19699}

19701void loadConL32Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19709#line 5765 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->constantL());

19713#line 19713 "ad_x86.cpp"
}
19715}

19717void loadConPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
{
  C2_MacroAssembler _masm(&cbuf);

19725#line 5775 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. mov64(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->constant(), opnd_array(1)->constant_reloc(), RELOC_IMM64Assembler::imm_operand);

19729#line 19729 "ad_x86.cpp"
}
19731}

19733void loadConP0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19741#line 5788 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

19745#line 19745 "ad_x86.cpp"
}
19747}

19749void loadConP31Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19757#line 5801 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->constant());

19761#line 19761 "ad_x86.cpp"
}
19763}

19765void loadConFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
{
  C2_MacroAssembler _masm(&cbuf);

19773#line 5811 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movflt(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

19777#line 19777 "ad_x86.cpp"
}
19779}

19781void loadConFNode::eval_constant(Compile* C) {
{

19784#line 5812 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(1));
19786#line 19786 "ad_x86.cpp"
}
19788}
19789void loadConN0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19797#line 5821 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

19801#line 19801 "ad_x86.cpp"
}
19803}

19805void loadConNNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19813#line 5832 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  address con = (address)opnd_array(1)->constant();
  if (con == NULL__null) {
    ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 5835); ::breakpoint(); } while (0);
  } else {
    ___masm. set_narrow_oop(opnd_array(0)->as_Register(ra_,this)/* dst */, (jobject)opnd_array(1)->constant());
  }

19822#line 19822 "ad_x86.cpp"
}
19824}

19826void loadConNKlassNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19834#line 5848 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  address con = (address)opnd_array(1)->constant();
  if (con == NULL__null) {
    ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 5851); ::breakpoint(); } while (0);
  } else {
    ___masm. set_narrow_klass(opnd_array(0)->as_Register(ra_,this)/* dst */, (Klass*)opnd_array(1)->constant());
  }

19843#line 19843 "ad_x86.cpp"
}
19845}

19847void loadConF0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19855#line 5865 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);

19859#line 19859 "ad_x86.cpp"
}
19861}

19863void loadConDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
{
  C2_MacroAssembler _masm(&cbuf);

19871#line 5876 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdbl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

19875#line 19875 "ad_x86.cpp"
}
19877}

19879void loadConDNode::eval_constant(Compile* C) {
{

19882#line 5877 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(1));
19884#line 19884 "ad_x86.cpp"
}
19886}
19887void loadConD0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

19895#line 5888 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorpd (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);

19899#line 19899 "ad_x86.cpp"
}
19901}

19903void loadSSINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{

19910#line 2493 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(0)->reg(ra_,this)/* dst */ < 8) {
    if (opnd_array(1)->base(ra_,this,idx1) < 8) {
      if (opnd_array(1)->index(ra_,this,idx1) >= 8) {
        emit_opcode(cbuf, Assembler::REX_X);
      }
    } else {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_B);
      } else {
        emit_opcode(cbuf, Assembler::REX_XB);
      }
    }
  } else {
    if (opnd_array(1)->base(ra_,this,idx1) < 8) {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_R);
      } else {
        emit_opcode(cbuf, Assembler::REX_RX);
      }
    } else {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_RB);
      } else {
        emit_opcode(cbuf, Assembler::REX_RXB);
      }
    }
  }

19940#line 19940 "ad_x86.cpp"
}
{

19944#line 1852 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, (0x8B /*primary()*/));

19948#line 19948 "ad_x86.cpp"
}
{

19952#line 2557 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // High registers handle in encode_RegMem
  int reg = opnd_array(0)->reg(ra_,this)/* dst */;
  int base = opnd_array(1)->base(ra_,this,idx1);
  int index = opnd_array(1)->index(ra_,this,idx1);
  int scale = opnd_array(1)->scale();
  int disp = opnd_array(1)->disp(ra_,this,idx1);
  relocInfo::relocType disp_reloc = opnd_array(1)->disp_reloc();

  encode_RegMem(cbuf, reg, base, index, scale, disp, disp_reloc);

19964#line 19964 "ad_x86.cpp"
}
19966}

19968void loadSSLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{

19975#line 2524 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(0)->reg(ra_,this)/* dst */ < 8) {
    if (opnd_array(1)->base(ra_,this,idx1) < 8) {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_W);
      } else {
        emit_opcode(cbuf, Assembler::REX_WX);
      }
    } else {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_WB);
      } else {
        emit_opcode(cbuf, Assembler::REX_WXB);
      }
    }
  } else {
    if (opnd_array(1)->base(ra_,this,idx1) < 8) {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_WR);
      } else {
        emit_opcode(cbuf, Assembler::REX_WRX);
      }
    } else {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_WRB);
      } else {
        emit_opcode(cbuf, Assembler::REX_WRXB);
      }
    }
  }

20007#line 20007 "ad_x86.cpp"
}
{

20011#line 1852 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, (0x8B /*primary()*/));

20015#line 20015 "ad_x86.cpp"
}
{

20019#line 2557 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // High registers handle in encode_RegMem
  int reg = opnd_array(0)->reg(ra_,this)/* dst */;
  int base = opnd_array(1)->base(ra_,this,idx1);
  int index = opnd_array(1)->index(ra_,this,idx1);
  int scale = opnd_array(1)->scale();
  int disp = opnd_array(1)->disp(ra_,this,idx1);
  relocInfo::relocType disp_reloc = opnd_array(1)->disp_reloc();

  encode_RegMem(cbuf, reg, base, index, scale, disp, disp_reloc);

20031#line 20031 "ad_x86.cpp"
}
20033}

20035void loadSSPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{

20042#line 2524 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(0)->reg(ra_,this)/* dst */ < 8) {
    if (opnd_array(1)->base(ra_,this,idx1) < 8) {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_W);
      } else {
        emit_opcode(cbuf, Assembler::REX_WX);
      }
    } else {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_WB);
      } else {
        emit_opcode(cbuf, Assembler::REX_WXB);
      }
    }
  } else {
    if (opnd_array(1)->base(ra_,this,idx1) < 8) {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_WR);
      } else {
        emit_opcode(cbuf, Assembler::REX_WRX);
      }
    } else {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_WRB);
      } else {
        emit_opcode(cbuf, Assembler::REX_WRXB);
      }
    }
  }

20074#line 20074 "ad_x86.cpp"
}
{

20078#line 1852 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, (0x8B /*primary()*/));

20082#line 20082 "ad_x86.cpp"
}
{

20086#line 2557 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // High registers handle in encode_RegMem
  int reg = opnd_array(0)->reg(ra_,this)/* dst */;
  int base = opnd_array(1)->base(ra_,this,idx1);
  int index = opnd_array(1)->index(ra_,this,idx1);
  int scale = opnd_array(1)->scale();
  int disp = opnd_array(1)->disp(ra_,this,idx1);
  relocInfo::relocType disp_reloc = opnd_array(1)->disp_reloc();

  encode_RegMem(cbuf, reg, base, index, scale, disp, disp_reloc);

20098#line 20098 "ad_x86.cpp"
}
20100}

20102void loadSSFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20110#line 5933 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movflt(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address(rsp, opnd_array(1)->disp(ra_,this,idx1)));

20114#line 20114 "ad_x86.cpp"
}
20116}

20118void loadSSDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20126#line 5946 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdbl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address(rsp, opnd_array(1)->disp(ra_,this,idx1)));

20130#line 20130 "ad_x86.cpp"
}
20132}

20134void prefetchAllocNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

20142#line 5961 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. prefetchw(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

20146#line 20146 "ad_x86.cpp"
}
20148}

20150void prefetchAllocNTANode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

20158#line 5973 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. prefetchnta(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

20162#line 20162 "ad_x86.cpp"
}
20164}

20166void prefetchAllocT0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

20174#line 5985 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. prefetcht0(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

20178#line 20178 "ad_x86.cpp"
}
20180}

20182void prefetchAllocT2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

20190#line 5997 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. prefetcht2(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

20194#line 20194 "ad_x86.cpp"
}
20196}

20198void storeBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20207#line 6012 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

20211#line 20211 "ad_x86.cpp"
}
20213}

20215void storeCNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20224#line 6025 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movw(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

20228#line 20228 "ad_x86.cpp"
}
20230}

20232void storeINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20241#line 6038 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

20245#line 20245 "ad_x86.cpp"
}
20247}

20249void storeLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20258#line 6051 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

20262#line 20262 "ad_x86.cpp"
}
20264}

20266void storePNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20275#line 6064 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

20279#line 20279 "ad_x86.cpp"
}
20281}

20283void storeImmP0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

20292#line 6077 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), r12);

20296#line 20296 "ad_x86.cpp"
}
20298}

20300void storeImmPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20309#line 6090 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

20313#line 20313 "ad_x86.cpp"
}
20315}

20317void storeNNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20326#line 6103 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

20330#line 20330 "ad_x86.cpp"
}
20332}

20334void storeNKlassNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20343#line 6115 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

20347#line 20347 "ad_x86.cpp"
}
20349}

20351void storeImmN0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

20360#line 6128 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), r12);

20364#line 20364 "ad_x86.cpp"
}
20366}

20368void storeImmNNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20377#line 6140 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  address con = (address)opnd_array(2)->constant();
  if (con == NULL__null) {
    ___masm. movl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), (int32_t)0);
  } else {
    ___masm. set_narrow_oop(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), (jobject)opnd_array(2)->constant());
  }

20386#line 20386 "ad_x86.cpp"
}
20388}

20390void storeImmNKlassNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20399#line 6157 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. set_narrow_klass(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), (Klass*)opnd_array(2)->constant());

20403#line 20403 "ad_x86.cpp"
}
20405}

20407void storeImmI0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

20416#line 6171 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), r12);

20420#line 20420 "ad_x86.cpp"
}
20422}

20424void storeImmINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20433#line 6183 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

20437#line 20437 "ad_x86.cpp"
}
20439}

20441void storeImmL0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

20450#line 6197 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), r12);

20454#line 20454 "ad_x86.cpp"
}
20456}

20458void storeImmLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20467#line 6209 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constantL());

20471#line 20471 "ad_x86.cpp"
}
20473}

20475void storeImmC0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

20484#line 6223 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movw(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), r12);

20488#line 20488 "ad_x86.cpp"
}
20490}

20492void storeImmI16Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20501#line 6236 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movw(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

20505#line 20505 "ad_x86.cpp"
}
20507}

20509void storeImmB0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

20518#line 6250 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), r12);

20522#line 20522 "ad_x86.cpp"
}
20524}

20526void storeImmBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20535#line 6262 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

20539#line 20539 "ad_x86.cpp"
}
20541}

20543void storeImmCM0_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

20552#line 6276 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), r12);

20556#line 20556 "ad_x86.cpp"
}
20558}

20560void storeImmCM0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20569#line 6288 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

20573#line 20573 "ad_x86.cpp"
}
20575}

20577void storeFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20586#line 6301 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movflt(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

20590#line 20590 "ad_x86.cpp"
}
20592}

20594void storeF0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

20603#line 6315 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), r12);

20607#line 20607 "ad_x86.cpp"
}
20609}

20611void storeF_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20620#line 6327 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), jint_cast(opnd_array(2)->constantF()));

20624#line 20624 "ad_x86.cpp"
}
20626}

20628void storeDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20637#line 6340 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdbl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

20641#line 20641 "ad_x86.cpp"
}
20643}

20645void storeD0_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20654#line 6354 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constantD());

20658#line 20658 "ad_x86.cpp"
}
20660}

20662void storeD0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

20671#line 6367 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), r12);

20675#line 20675 "ad_x86.cpp"
}
20677}

20679void storeSSINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{

20686#line 2493 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(1)->reg(ra_,this,idx1)/* src */ < 8) {
    if (opnd_array(0)->base(ra_,this,idx0) < 8) {
      if (opnd_array(0)->index(ra_,this,idx0) >= 8) {
        emit_opcode(cbuf, Assembler::REX_X);
      }
    } else {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_B);
      } else {
        emit_opcode(cbuf, Assembler::REX_XB);
      }
    }
  } else {
    if (opnd_array(0)->base(ra_,this,idx0) < 8) {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_R);
      } else {
        emit_opcode(cbuf, Assembler::REX_RX);
      }
    } else {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_RB);
      } else {
        emit_opcode(cbuf, Assembler::REX_RXB);
      }
    }
  }

20716#line 20716 "ad_x86.cpp"
}
{

20720#line 1852 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, (0x89 /*primary()*/));

20724#line 20724 "ad_x86.cpp"
}
{

20728#line 2557 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // High registers handle in encode_RegMem
  int reg = opnd_array(1)->reg(ra_,this,idx1)/* src */;
  int base = opnd_array(0)->base(ra_,this,idx0);
  int index = opnd_array(0)->index(ra_,this,idx0);
  int scale = opnd_array(0)->scale();
  int disp = opnd_array(0)->disp(ra_,this,0);
  relocInfo::relocType disp_reloc = opnd_array(0)->disp_reloc();

  encode_RegMem(cbuf, reg, base, index, scale, disp, disp_reloc);

20740#line 20740 "ad_x86.cpp"
}
20742}

20744void storeSSLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{

20751#line 2524 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(1)->reg(ra_,this,idx1)/* src */ < 8) {
    if (opnd_array(0)->base(ra_,this,idx0) < 8) {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_W);
      } else {
        emit_opcode(cbuf, Assembler::REX_WX);
      }
    } else {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_WB);
      } else {
        emit_opcode(cbuf, Assembler::REX_WXB);
      }
    }
  } else {
    if (opnd_array(0)->base(ra_,this,idx0) < 8) {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_WR);
      } else {
        emit_opcode(cbuf, Assembler::REX_WRX);
      }
    } else {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_WRB);
      } else {
        emit_opcode(cbuf, Assembler::REX_WRXB);
      }
    }
  }

20783#line 20783 "ad_x86.cpp"
}
{

20787#line 1852 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, (0x89 /*primary()*/));

20791#line 20791 "ad_x86.cpp"
}
{

20795#line 2557 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // High registers handle in encode_RegMem
  int reg = opnd_array(1)->reg(ra_,this,idx1)/* src */;
  int base = opnd_array(0)->base(ra_,this,idx0);
  int index = opnd_array(0)->index(ra_,this,idx0);
  int scale = opnd_array(0)->scale();
  int disp = opnd_array(0)->disp(ra_,this,0);
  relocInfo::relocType disp_reloc = opnd_array(0)->disp_reloc();

  encode_RegMem(cbuf, reg, base, index, scale, disp, disp_reloc);

20807#line 20807 "ad_x86.cpp"
}
20809}

20811void storeSSPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{

20818#line 2524 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(1)->reg(ra_,this,idx1)/* src */ < 8) {
    if (opnd_array(0)->base(ra_,this,idx0) < 8) {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_W);
      } else {
        emit_opcode(cbuf, Assembler::REX_WX);
      }
    } else {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_WB);
      } else {
        emit_opcode(cbuf, Assembler::REX_WXB);
      }
    }
  } else {
    if (opnd_array(0)->base(ra_,this,idx0) < 8) {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_WR);
      } else {
        emit_opcode(cbuf, Assembler::REX_WRX);
      }
    } else {
      if (opnd_array(0)->index(ra_,this,idx0) < 8) {
        emit_opcode(cbuf, Assembler::REX_WRB);
      } else {
        emit_opcode(cbuf, Assembler::REX_WRXB);
      }
    }
  }

20850#line 20850 "ad_x86.cpp"
}
{

20854#line 1852 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, (0x89 /*primary()*/));

20858#line 20858 "ad_x86.cpp"
}
{

20862#line 2557 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // High registers handle in encode_RegMem
  int reg = opnd_array(1)->reg(ra_,this,idx1)/* src */;
  int base = opnd_array(0)->base(ra_,this,idx0);
  int index = opnd_array(0)->index(ra_,this,idx0);
  int scale = opnd_array(0)->scale();
  int disp = opnd_array(0)->disp(ra_,this,0);
  relocInfo::relocType disp_reloc = opnd_array(0)->disp_reloc();

  encode_RegMem(cbuf, reg, base, index, scale, disp, disp_reloc);

20874#line 20874 "ad_x86.cpp"
}
20876}

20878void storeSSFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20886#line 6412 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movflt(Address(rsp, opnd_array(0)->disp(ra_,this,0)), opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

20890#line 20890 "ad_x86.cpp"
}
20892}

20894void storeSSDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

20902#line 6424 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdbl(Address(rsp, opnd_array(0)->disp(ra_,this,0)), opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

20906#line 20906 "ad_x86.cpp"
}
20908}

20910void cacheWBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

20918#line 6437 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  assert(opnd_array(1)->index_position() < 0, "should be")do { if (!(opnd_array(1)->index_position() < 0)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 6438, "assert(" "opnd_array(1)->index_position() < 0"
 ") failed", "should be"); ::breakpoint(); } } while (0);
  assert(opnd_array(1)->disp(ra_,this,idx1)== 0, "should be")do { if (!(opnd_array(1)->disp(ra_,this,idx1)== 0)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 6439, "assert(" "opnd_array(1)->disp(ra_,this,idx1)== 0"
 ") failed", "should be"); ::breakpoint(); } } while (0);
  ___masm. cache_wb(Address(as_Register(opnd_array(1)->base(ra_,this,idx1)), 0));

20924#line 20924 "ad_x86.cpp"
}
20926}

20928void cacheWBPreSyncNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

20936#line 6452 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cache_wbsync(true);

20940#line 20940 "ad_x86.cpp"
}
20942}

20944void cacheWBPostSyncNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

20952#line 6465 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cache_wbsync(false);

20956#line 20956 "ad_x86.cpp"
}
20958}

20960void bytes_reverse_intNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

20968#line 6476 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. bswapl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

20972#line 20972 "ad_x86.cpp"
}
20974}

20976void bytes_reverse_longNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

20984#line 6486 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. bswapq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

20988#line 20988 "ad_x86.cpp"
}
20990}

20992void bytes_reverse_unsigned_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

21000#line 6498 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. bswapl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);
  ___masm. shrl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, 16);

21005#line 21005 "ad_x86.cpp"
}
21007}

21009void bytes_reverse_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

21017#line 6511 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. bswapl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);
  ___masm. sarl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, 16);

21022#line 21022 "ad_x86.cpp"
}
21024}

21026void countLeadingZerosINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21034#line 6526 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lzcntl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21038#line 21038 "ad_x86.cpp"
}
21040}

21042void countLeadingZerosI_bsrNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21050#line 6543 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rdst = opnd_array(0)->as_Register(ra_,this)/* dst */;
  Register Rsrc = opnd_array(1)->as_Register(ra_,this,idx1)/* src */;
  Label skip;
  ___masm. bsrl(Rdst, Rsrc);
  ___masm. jccb(Assembler::notZero, skip)jccb_0(Assembler::notZero, skip, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 6548);
  ___masm. movl(Rdst, -1);
  ___masm. bind(skip);
  ___masm. negl(Rdst);
  ___masm. addl(Rdst, BitsPerInt - 1);

21062#line 21062 "ad_x86.cpp"
}
21064}

21066void countLeadingZerosLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21074#line 6563 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lzcntq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21078#line 21078 "ad_x86.cpp"
}
21080}

21082void countLeadingZerosL_bsrNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21090#line 6580 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rdst = opnd_array(0)->as_Register(ra_,this)/* dst */;
  Register Rsrc = opnd_array(1)->as_Register(ra_,this,idx1)/* src */;
  Label skip;
  ___masm. bsrq(Rdst, Rsrc);
  ___masm. jccb(Assembler::notZero, skip)jccb_0(Assembler::notZero, skip, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 6585);
  ___masm. movl(Rdst, -1);
  ___masm. bind(skip);
  ___masm. negl(Rdst);
  ___masm. addl(Rdst, BitsPerLong - 1);

21102#line 21102 "ad_x86.cpp"
}
21104}

21106void countTrailingZerosINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21114#line 6600 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. tzcntl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21118#line 21118 "ad_x86.cpp"
}
21120}

21122void countTrailingZerosI_bsfNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21130#line 6615 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rdst = opnd_array(0)->as_Register(ra_,this)/* dst */;
  Label done;
  ___masm. bsfl(Rdst, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. jccb(Assembler::notZero, done)jccb_0(Assembler::notZero, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 6619);
  ___masm. movl(Rdst, BitsPerInt);
  ___masm. bind(done);

21139#line 21139 "ad_x86.cpp"
}
21141}

21143void countTrailingZerosLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21151#line 6632 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. tzcntq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21155#line 21155 "ad_x86.cpp"
}
21157}

21159void countTrailingZerosL_bsfNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21167#line 6647 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rdst = opnd_array(0)->as_Register(ra_,this)/* dst */;
  Label done;
  ___masm. bsfq(Rdst, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. jccb(Assembler::notZero, done)jccb_0(Assembler::notZero, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 6651);
  ___masm. movl(Rdst, BitsPerLong);
  ___masm. bind(done);

21176#line 21176 "ad_x86.cpp"
}
21178}

21180void popCountINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21188#line 6667 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. popcntl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21192#line 21192 "ad_x86.cpp"
}
21194}

21196void popCountI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

21204#line 6679 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. popcntl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

21208#line 21208 "ad_x86.cpp"
}
21210}

21212void popCountLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21220#line 6692 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. popcntq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21224#line 21224 "ad_x86.cpp"
}
21226}

21228void popCountL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

21236#line 6705 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. popcntq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

21240#line 21240 "ad_x86.cpp"
}
21242}

21244void membar_acquireNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
21250}

21252uint membar_acquireNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 21252, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
21255}

21257void membar_acquire_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
21263}

21265uint membar_acquire_0Node::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 21265, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
21268}

21270void membar_acquire_lockNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
21276}

21278uint membar_acquire_lockNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 21278, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
21281}

21283void membar_releaseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
21289}

21291uint membar_releaseNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 21291, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
21294}

21296void membar_release_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
21302}

21304uint membar_release_0Node::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 21304, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
21307}

21309void membar_release_lockNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
21315}

21317uint membar_release_lockNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 21317, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
21320}

21322void membar_volatileNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

21330#line 6770 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. membar(Assembler::StoreLoad);

21334#line 21334 "ad_x86.cpp"
}
21336}

21338void unnecessary_membar_volatileNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
21344}

21346uint unnecessary_membar_volatileNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 21346, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
21349}

21351void membar_storestoreNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
21357}

21359uint membar_storestoreNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 21359, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
21362}

21364void membar_storestore_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
21370}

21372uint membar_storestore_0Node::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 21372, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
21375}

21377void castX2PNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21385#line 6806 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(0)->reg(ra_,this)/* dst */!= opnd_array(1)->reg(ra_,this,idx1)/* src */) {
    ___masm. movptr(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  }

21391#line 21391 "ad_x86.cpp"
}
21393}

21395void castP2XNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21403#line 6819 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(0)->reg(ra_,this)/* dst */!= opnd_array(1)->reg(ra_,this,idx1)/* src */) {
    ___masm. movptr(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  }

21409#line 21409 "ad_x86.cpp"
}
21411}

21413void convP2INode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21421#line 6833 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21425#line 21425 "ad_x86.cpp"
}
21427}

21429void convN2INode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21437#line 6847 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21441#line 21441 "ad_x86.cpp"
}
21443}

21445void encodeHeapOopNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21453#line 6859 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register s = opnd_array(1)->as_Register(ra_,this,idx1)/* src */;
  Register d = opnd_array(0)->as_Register(ra_,this)/* dst */;
  if (s != d) {
    ___masm. movq(d, s);
  }
  ___masm. encode_heap_oop(d);

21462#line 21462 "ad_x86.cpp"
}
21464}

21466void encodeHeapOop_not_nullNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21474#line 6875 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. encode_heap_oop_not_null(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21478#line 21478 "ad_x86.cpp"
}
21480}

21482void decodeHeapOopNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21490#line 6887 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register s = opnd_array(1)->as_Register(ra_,this,idx1)/* src */;
  Register d = opnd_array(0)->as_Register(ra_,this)/* dst */;
  if (s != d) {
    ___masm. movq(d, s);
  }
  ___masm. decode_heap_oop(d);

21499#line 21499 "ad_x86.cpp"
}
21501}

21503void decodeHeapOop_not_nullNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21511#line 6904 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register s = opnd_array(1)->as_Register(ra_,this,idx1)/* src */;
  Register d = opnd_array(0)->as_Register(ra_,this)/* dst */;
  if (s != d) {
    ___masm. decode_heap_oop_not_null(d, s);
  } else {
    ___masm. decode_heap_oop_not_null(d);
  }

21521#line 21521 "ad_x86.cpp"
}
21523}

21525void encodeKlass_not_nullNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

21534#line 6920 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. encode_and_move_klass_not_null(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21538#line 21538 "ad_x86.cpp"
}
21540}

21542void decodeKlass_not_nullNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

21551#line 6930 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. decode_and_move_klass_not_null(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

21555#line 21555 "ad_x86.cpp"
}
21557}

21559void jumpXtnd_offsetNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
ra_->C->output()->constant_table().fill_jump_table(cbuf, (MachConstantNode*) this, _index2label);
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// shift
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dest
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

21570#line 6947 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // We could use jump(ArrayAddress) except that the macro assembler needs to use r10
  // to do that and the compiler is using that register as one it can allocate.
  // So we build it all by hand.
  // Address index(noreg, switch_reg, (Address::ScaleFactor)$shift$$constant);
  // ArrayAddress dispatch(table, index);
  Address dispatch(opnd_array(3)->as_Register(ra_,this,idx3)/* dest */, opnd_array(1)->as_Register(ra_,this,idx1)/* switch_val */, (Address::ScaleFactor) opnd_array(2)->constant());
  ___masm. lea(opnd_array(3)->as_Register(ra_,this,idx3)/* dest */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));
  ___masm. jmp(dispatch);

21581#line 21581 "ad_x86.cpp"
}
21583}

21585void jumpXtnd_offsetNode::eval_constant(Compile* C) {
_constant = C->output()->constant_table().add_jump_table(this);
// User did not define an encode section.
21588}
21589void jumpXtnd_addrNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
ra_->C->output()->constant_table().fill_jump_table(cbuf, (MachConstantNode*) this, _index2label);
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// shift
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// offset
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dest
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

21601#line 6967 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // We could use jump(ArrayAddress) except that the macro assembler needs to use r10
  // to do that and the compiler is using that register as one it can allocate.
  // So we build it all by hand.
  // Address index(noreg, switch_reg, (Address::ScaleFactor) $shift$$constant, (int) $offset$$constant);
  // ArrayAddress dispatch(table, index);
  Address dispatch(opnd_array(4)->as_Register(ra_,this,idx4)/* dest */, opnd_array(1)->as_Register(ra_,this,idx1)/* switch_val */, (Address::ScaleFactor) opnd_array(2)->constant(), (int) opnd_array(3)->constantL());
  ___masm. lea(opnd_array(4)->as_Register(ra_,this,idx4)/* dest */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));
  ___masm. jmp(dispatch);

21612#line 21612 "ad_x86.cpp"
}
21614}

21616void jumpXtnd_addrNode::eval_constant(Compile* C) {
_constant = C->output()->constant_table().add_jump_table(this);
// User did not define an encode section.
21619}
21620void jumpXtndNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
ra_->C->output()->constant_table().fill_jump_table(cbuf, (MachConstantNode*) this, _index2label);
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dest
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

21630#line 6987 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // We could use jump(ArrayAddress) except that the macro assembler needs to use r10
  // to do that and the compiler is using that register as one it can allocate.
  // So we build it all by hand.
  // Address index(noreg, switch_reg, Address::times_1);
  // ArrayAddress dispatch(table, index);
  Address dispatch(opnd_array(2)->as_Register(ra_,this,idx2)/* dest */, opnd_array(1)->as_Register(ra_,this,idx1)/* switch_val */, Address::times_1);
  ___masm. lea(opnd_array(2)->as_Register(ra_,this,idx2)/* dest */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));
  ___masm. jmp(dispatch);

21641#line 21641 "ad_x86.cpp"
}
21643}

21645void jumpXtndNode::eval_constant(Compile* C) {
_constant = C->output()->constant_table().add_jump_table(this);
// User did not define an encode section.
21648}
21649void cmovI_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21660#line 7007 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovl((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* src */);

21664#line 21664 "ad_x86.cpp"
}
21666}

21668void cmovI_regUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21679#line 7018 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovl((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* src */);

21683#line 21683 "ad_x86.cpp"
}
21685}

21687void cmovI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21698#line 7038 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovl((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, Address::make_raw(opnd_array(4)->base(ra_,this,idx4), opnd_array(4)->index(ra_,this,idx4), opnd_array(4)->scale(), opnd_array(4)->disp(ra_,this,idx4), opnd_array(4)->disp_reloc()));

21702#line 21702 "ad_x86.cpp"
}
21704}

21706void cmovI_memUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21717#line 7051 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovl((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, Address::make_raw(opnd_array(4)->base(ra_,this,idx4), opnd_array(4)->index(ra_,this,idx4), opnd_array(4)->scale(), opnd_array(4)->disp(ra_,this,idx4), opnd_array(4)->disp_reloc()));

21721#line 21721 "ad_x86.cpp"
}
21723}

21725void cmovN_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21736#line 7072 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovl((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* src */);

21740#line 21740 "ad_x86.cpp"
}
21742}

21744void cmovN_regUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21755#line 7085 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovl((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* src */);

21759#line 21759 "ad_x86.cpp"
}
21761}

21763void cmovP_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21774#line 7106 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovq((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* src */);

21778#line 21778 "ad_x86.cpp"
}
21780}

21782void cmovP_regUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21793#line 7119 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovq((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* src */);

21797#line 21797 "ad_x86.cpp"
}
21799}

21801void cmovL_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21812#line 7166 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovq((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* src */);

21816#line 21816 "ad_x86.cpp"
}
21818}

21820void cmovL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21831#line 7178 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovq((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, Address::make_raw(opnd_array(4)->base(ra_,this,idx4), opnd_array(4)->index(ra_,this,idx4), opnd_array(4)->scale(), opnd_array(4)->disp(ra_,this,idx4), opnd_array(4)->disp_reloc()));

21835#line 21835 "ad_x86.cpp"
}
21837}

21839void cmovL_regUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21850#line 7190 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovq((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* src */);

21854#line 21854 "ad_x86.cpp"
}
21856}

21858void cmovL_memUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21869#line 7210 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovq((Assembler::Condition)(opnd_array(1)->ccode()), opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, Address::make_raw(opnd_array(4)->base(ra_,this,idx4), opnd_array(4)->index(ra_,this,idx4), opnd_array(4)->scale(), opnd_array(4)->disp(ra_,this,idx4), opnd_array(4)->disp_reloc()));

21873#line 21873 "ad_x86.cpp"
}
21875}

21877void cmovF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21888#line 7232 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label Lskip;
  // Invert sense of branch from sense of CMOV
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()^1), Lskip)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()^1), Lskip
, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 7235);
  ___masm. movflt(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* src */);
  ___masm. bind(Lskip);

21896#line 21896 "ad_x86.cpp"
}
21898}

21900void cmovF_regUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21911#line 7262 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label Lskip;
  // Invert sense of branch from sense of CMOV
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()^1), Lskip)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()^1), Lskip
, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 7265);
  ___masm. movflt(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* src */);
  ___masm. bind(Lskip);

21919#line 21919 "ad_x86.cpp"
}
21921}

21923void cmovD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21934#line 7288 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label Lskip;
  // Invert sense of branch from sense of CMOV
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()^1), Lskip)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()^1), Lskip
, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 7291);
  ___masm. movdbl(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* src */);
  ___masm. bind(Lskip);

21942#line 21942 "ad_x86.cpp"
}
21944}

21946void cmovD_regUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21957#line 7306 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label Lskip;
  // Invert sense of branch from sense of CMOV
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()^1), Lskip)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()^1), Lskip
, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 7309);
  ___masm. movdbl(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* src */);
  ___masm. bind(Lskip);

21965#line 21965 "ad_x86.cpp"
}
21967}

21969void addI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21978#line 7333 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

21982#line 21982 "ad_x86.cpp"
}
21984}

21986void addI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

21995#line 7345 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

21999#line 21999 "ad_x86.cpp"
}
22001}

22003void addI_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22012#line 7358 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

22016#line 22016 "ad_x86.cpp"
}
22018}

22020void addI_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

22029#line 7358 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addl(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22033#line 22033 "ad_x86.cpp"
}
22035}

22037void addI_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22046#line 7371 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

22050#line 22050 "ad_x86.cpp"
}
22052}

22054void addI_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22063#line 7371 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

22067#line 22067 "ad_x86.cpp"
}
22069}

22071void addI_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22080#line 7384 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

22084#line 22084 "ad_x86.cpp"
}
22086}

22088void incI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22097#line 7397 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. incrementl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

22101#line 22101 "ad_x86.cpp"
}
22103}

22105void incI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22114#line 7411 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. incrementl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22118#line 22118 "ad_x86.cpp"
}
22120}

22122void decI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22131#line 7425 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. decrementl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

22135#line 22135 "ad_x86.cpp"
}
22137}

22139void decI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22148#line 7440 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. decrementl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22152#line 22152 "ad_x86.cpp"
}
22154}

22156void leaI_rReg_immINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src0
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
{
  C2_MacroAssembler _masm(&cbuf);

22165#line 7452 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leal(opnd_array(0)->as_Register(ra_,this)/* dst */, Address(opnd_array(1)->as_Register(ra_,this,idx1)/* src0 */, opnd_array(2)->constant()));

22169#line 22169 "ad_x86.cpp"
}
22171}

22173void addL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22182#line 7464 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

22186#line 22186 "ad_x86.cpp"
}
22188}

22190void addL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22199#line 7476 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constantL());

22203#line 22203 "ad_x86.cpp"
}
22205}

22207void addL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22216#line 7489 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

22220#line 22220 "ad_x86.cpp"
}
22222}

22224void addL_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

22233#line 7489 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22237#line 22237 "ad_x86.cpp"
}
22239}

22241void addL_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22250#line 7502 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

22254#line 22254 "ad_x86.cpp"
}
22256}

22258void addL_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22267#line 7502 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

22271#line 22271 "ad_x86.cpp"
}
22273}

22275void addL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22284#line 7515 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constantL());

22288#line 22288 "ad_x86.cpp"
}
22290}

22292void incL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22301#line 7528 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. incrementq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

22305#line 22305 "ad_x86.cpp"
}
22307}

22309void incL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22318#line 7542 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. incrementq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22322#line 22322 "ad_x86.cpp"
}
22324}

22326void decL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22335#line 7556 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. decrementq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

22339#line 22339 "ad_x86.cpp"
}
22341}

22343void decL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22352#line 7571 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. decrementq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22356#line 22356 "ad_x86.cpp"
}
22358}

22360void leaL_rReg_immLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src0
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
{
  C2_MacroAssembler _masm(&cbuf);

22369#line 7583 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address(opnd_array(1)->as_Register(ra_,this,idx1)/* src0 */, opnd_array(2)->constantL()));

22373#line 22373 "ad_x86.cpp"
}
22375}

22377void addP_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22386#line 7595 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

22390#line 22390 "ad_x86.cpp"
}
22392}

22394void addP_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

22403#line 7607 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constantL());

22407#line 22407 "ad_x86.cpp"
}
22409}

22411void leaP_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src0
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
{
  C2_MacroAssembler _masm(&cbuf);

22420#line 7621 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. leaq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address(opnd_array(1)->as_Register(ra_,this,idx1)/* src0 */, opnd_array(2)->constantL()));

22424#line 22424 "ad_x86.cpp"
}
22426}

22428void checkCastPPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
// User did not define which encode class to use.
22434}

22436uint checkCastPPNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 22436, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
22439}

22441void castPPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
// User did not define which encode class to use.
22447}

22449uint castPPNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 22449, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
22452}

22454void castIINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
// User did not define which encode class to use.
22460}

22462uint castIINode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 22462, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
22465}

22467void castLLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
// User did not define which encode class to use.
22473}

22475uint castLLNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 22475, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
22478}

22480void castFFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
// User did not define which encode class to use.
22486}

22488uint castFFNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 22488, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
22491}

22493void castDDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
// User did not define which encode class to use.
22499}

22501uint castDDNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 22501, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
22504}

22506void loadPLockedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

22514#line 7698 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22518#line 22518 "ad_x86.cpp"
}
22520}

22522void storePConditionalNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// heap_top_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22532#line 7717 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgq(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22537#line 22537 "ad_x86.cpp"
}
22539}

22541void storeIConditionalNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{

22550#line 2350 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, 0xF0); // lock

22554#line 22554 "ad_x86.cpp"
}
{

22558#line 2493 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(3)->reg(ra_,this,idx3)/* newval */ < 8) {
    if (opnd_array(1)->base(ra_,this,idx1) < 8) {
      if (opnd_array(1)->index(ra_,this,idx1) >= 8) {
        emit_opcode(cbuf, Assembler::REX_X);
      }
    } else {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_B);
      } else {
        emit_opcode(cbuf, Assembler::REX_XB);
      }
    }
  } else {
    if (opnd_array(1)->base(ra_,this,idx1) < 8) {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_R);
      } else {
        emit_opcode(cbuf, Assembler::REX_RX);
      }
    } else {
      if (opnd_array(1)->index(ra_,this,idx1) < 8) {
        emit_opcode(cbuf, Assembler::REX_RB);
      } else {
        emit_opcode(cbuf, Assembler::REX_RXB);
      }
    }
  }

22588#line 22588 "ad_x86.cpp"
}
{

22592#line 1852 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, (0x0F /*primary()*/));

22596#line 22596 "ad_x86.cpp"
}
{

22600#line 1858 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, (0xB1 /*secondary()*/));

22604#line 22604 "ad_x86.cpp"
}
{

22608#line 2557 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // High registers handle in encode_RegMem
  int reg = opnd_array(3)->reg(ra_,this,idx3)/* newval */;
  int base = opnd_array(1)->base(ra_,this,idx1);
  int index = opnd_array(1)->index(ra_,this,idx1);
  int scale = opnd_array(1)->scale();
  int disp = opnd_array(1)->disp(ra_,this,idx1);
  relocInfo::relocType disp_reloc = opnd_array(1)->disp_reloc();

  encode_RegMem(cbuf, reg, base, index, scale, disp, disp_reloc);

22620#line 22620 "ad_x86.cpp"
}
22622}

22624void storeLConditionalNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22634#line 7748 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgq(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22639#line 22639 "ad_x86.cpp"
}
22641}

22643void compareAndSwapPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22653#line 7771 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgq(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22660#line 22660 "ad_x86.cpp"
}
22662}

22664void compareAndSwapP_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22674#line 7771 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgq(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22681#line 22681 "ad_x86.cpp"
}
22683}

22685void compareAndSwapLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22695#line 7794 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgq(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22702#line 22702 "ad_x86.cpp"
}
22704}

22706void compareAndSwapL_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22716#line 7794 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgq(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22723#line 22723 "ad_x86.cpp"
}
22725}

22727void compareAndSwapINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22737#line 7816 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgl(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22744#line 22744 "ad_x86.cpp"
}
22746}

22748void compareAndSwapI_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22758#line 7816 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgl(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22765#line 22765 "ad_x86.cpp"
}
22767}

22769void compareAndSwapBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22779#line 7838 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgb(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22786#line 22786 "ad_x86.cpp"
}
22788}

22790void compareAndSwapB_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22800#line 7838 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgb(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22807#line 22807 "ad_x86.cpp"
}
22809}

22811void compareAndSwapSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22821#line 7860 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgw(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22828#line 22828 "ad_x86.cpp"
}
22830}

22832void compareAndSwapS_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22842#line 7860 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgw(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22849#line 22849 "ad_x86.cpp"
}
22851}

22853void compareAndSwapNNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22863#line 7881 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgl(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22870#line 22870 "ad_x86.cpp"
}
22872}

22874void compareAndSwapN_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22884#line 7881 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgl(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. sete(opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

22891#line 22891 "ad_x86.cpp"
}
22893}

22895void compareAndExchangeBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22905#line 7900 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgb(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22910#line 22910 "ad_x86.cpp"
}
22912}

22914void compareAndExchangeSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22924#line 7917 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgw(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22929#line 22929 "ad_x86.cpp"
}
22931}

22933void compareAndExchangeINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22943#line 7934 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgl(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22948#line 22948 "ad_x86.cpp"
}
22950}

22952void compareAndExchangeLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22962#line 7952 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgq(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22967#line 22967 "ad_x86.cpp"
}
22969}

22971void compareAndExchangeNNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

22981#line 7968 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgl(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

22986#line 22986 "ad_x86.cpp"
}
22988}

22990void compareAndExchangePNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23000#line 7986 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. cmpxchgq(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23005#line 23005 "ad_x86.cpp"
}
23007}

23009void xaddB_no_resNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// add
{
  C2_MacroAssembler _masm(&cbuf);

23018#line 7998 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. addb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

23023#line 23023 "ad_x86.cpp"
}
23025}

23027void xaddBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23036#line 8009 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. xaddb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* newval */);

23041#line 23041 "ad_x86.cpp"
}
23043}

23045void xaddS_no_resNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// add
{
  C2_MacroAssembler _masm(&cbuf);

23054#line 8021 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. addw(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

23059#line 23059 "ad_x86.cpp"
}
23061}

23063void xaddSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23072#line 8032 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. xaddw(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* newval */);

23077#line 23077 "ad_x86.cpp"
}
23079}

23081void xaddI_no_resNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// add
{
  C2_MacroAssembler _masm(&cbuf);

23090#line 8044 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. addl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

23095#line 23095 "ad_x86.cpp"
}
23097}

23099void xaddINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23108#line 8055 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. xaddl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* newval */);

23113#line 23113 "ad_x86.cpp"
}
23115}

23117void xaddL_no_resNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// add
{
  C2_MacroAssembler _masm(&cbuf);

23126#line 8067 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. addq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constantL());

23131#line 23131 "ad_x86.cpp"
}
23133}

23135void xaddLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23144#line 8078 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. lock();
  ___masm. xaddq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* newval */);

23149#line 23149 "ad_x86.cpp"
}
23151}

23153void xchgBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23162#line 8088 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xchgb(opnd_array(2)->as_Register(ra_,this,idx2)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23166#line 23166 "ad_x86.cpp"
}
23168}

23170void xchgSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23179#line 8097 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xchgw(opnd_array(2)->as_Register(ra_,this,idx2)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23183#line 23183 "ad_x86.cpp"
}
23185}

23187void xchgINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23196#line 8106 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xchgl(opnd_array(2)->as_Register(ra_,this,idx2)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23200#line 23200 "ad_x86.cpp"
}
23202}

23204void xchgLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23213#line 8115 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xchgq(opnd_array(2)->as_Register(ra_,this,idx2)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23217#line 23217 "ad_x86.cpp"
}
23219}

23221void xchgPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23230#line 8125 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xchgq(opnd_array(2)->as_Register(ra_,this,idx2)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23234#line 23234 "ad_x86.cpp"
}
23236}

23238void xchgNNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

23247#line 8134 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xchgl(opnd_array(2)->as_Register(ra_,this,idx2)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23251#line 23251 "ad_x86.cpp"
}
23253}

23255void absI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

23265#line 8153 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. sarl(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, 31);
  ___masm. movl(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. xorl(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */);
  ___masm. subl(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */);

23273#line 23273 "ad_x86.cpp"
}
23275}

23277void absL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

23287#line 8175 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. sarq(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, 63);
  ___masm. movq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. xorq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */);
  ___masm. subq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */);

23295#line 23295 "ad_x86.cpp"
}
23297}

23299void subI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23308#line 8195 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

23312#line 23312 "ad_x86.cpp"
}
23314}

23316void subI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23325#line 8207 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

23329#line 23329 "ad_x86.cpp"
}
23331}

23333void subI_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23342#line 8220 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

23346#line 23346 "ad_x86.cpp"
}
23348}

23350void subI_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23359#line 8233 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

23363#line 23363 "ad_x86.cpp"
}
23365}

23367void subI_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23376#line 8246 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

23380#line 23380 "ad_x86.cpp"
}
23382}

23384void subL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23393#line 8258 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

23397#line 23397 "ad_x86.cpp"
}
23399}

23401void subL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23410#line 8270 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constantL());

23414#line 23414 "ad_x86.cpp"
}
23416}

23418void subL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23427#line 8283 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

23431#line 23431 "ad_x86.cpp"
}
23433}

23435void subL_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23444#line 8296 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

23448#line 23448 "ad_x86.cpp"
}
23450}

23452void subL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23461#line 8309 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. subq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constantL());

23465#line 23465 "ad_x86.cpp"
}
23467}

23469void subP_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src
{

23478#line 2476 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(1)->reg(ra_,this,idx1)/* dst */ < 8) {
    if (opnd_array(3)->reg(ra_,this,idx3)/* src */ < 8) {
      emit_opcode(cbuf, Assembler::REX_W);
    } else {
      emit_opcode(cbuf, Assembler::REX_WB);
    }
  } else {
    if (opnd_array(3)->reg(ra_,this,idx3)/* src */ < 8) {
      emit_opcode(cbuf, Assembler::REX_WR);
    } else {
      emit_opcode(cbuf, Assembler::REX_WRB);
    }
  }

23494#line 23494 "ad_x86.cpp"
}
{

23498#line 1852 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_opcode(cbuf, (0x2B /*primary()*/));

23502#line 23502 "ad_x86.cpp"
}
{

23506#line 1886 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  emit_rm(cbuf, 0x3, opnd_array(1)->reg(ra_,this,idx1)/* dst */ & 7, opnd_array(3)->reg(ra_,this,idx3)/* src */ & 7);

23510#line 23510 "ad_x86.cpp"
}
23512}

23514void negI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

23523#line 8334 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. negl(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */);

23527#line 23527 "ad_x86.cpp"
}
23529}

23531void negI_rReg_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

23539#line 8346 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. negl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

23543#line 23543 "ad_x86.cpp"
}
23545}

23547void negI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

23556#line 8358 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. negl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23560#line 23560 "ad_x86.cpp"
}
23562}

23564void negL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

23573#line 8370 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. negq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */);

23577#line 23577 "ad_x86.cpp"
}
23579}

23581void negL_rReg_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

23589#line 8382 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. negq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

23593#line 23593 "ad_x86.cpp"
}
23595}

23597void negL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

23606#line 8394 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. negq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23610#line 23610 "ad_x86.cpp"
}
23612}

23614void mulI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23623#line 8411 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imull(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

23627#line 23627 "ad_x86.cpp"
}
23629}

23631void mulI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm
{
  C2_MacroAssembler _masm(&cbuf);

23640#line 8424 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imull(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->constant());

23644#line 23644 "ad_x86.cpp"
}
23646}

23648void mulI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23657#line 8437 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imull(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

23661#line 23661 "ad_x86.cpp"
}
23663}

23665void mulI_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

23674#line 8437 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imull(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23678#line 23678 "ad_x86.cpp"
}
23680}

23682void mulI_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm
{
  C2_MacroAssembler _masm(&cbuf);

23691#line 8450 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imull(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

23695#line 23695 "ad_x86.cpp"
}
23697}

23699void mulL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23708#line 8473 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imulq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

23712#line 23712 "ad_x86.cpp"
}
23714}

23716void mulL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm
{
  C2_MacroAssembler _masm(&cbuf);

23725#line 8486 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imulq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->constantL());

23729#line 23729 "ad_x86.cpp"
}
23731}

23733void mulL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

23742#line 8499 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imulq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

23746#line 23746 "ad_x86.cpp"
}
23748}

23750void mulL_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

23759#line 8499 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imulq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

23763#line 23763 "ad_x86.cpp"
}
23765}

23767void mulL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm
{
  C2_MacroAssembler _masm(&cbuf);

23776#line 8512 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imulq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constantL());

23780#line 23780 "ad_x86.cpp"
}
23782}

23784void mulHiL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rax
{
  C2_MacroAssembler _masm(&cbuf);

23793#line 8525 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imulq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

23797#line 23797 "ad_x86.cpp"
}
23799}

23801void umulHiL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rax
{
  C2_MacroAssembler _masm(&cbuf);

23810#line 8538 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. mulq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

23814#line 23814 "ad_x86.cpp"
}
23816}

23818void divI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// rax
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// div
{

23826#line 1897 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // Full implementation of Java idiv and irem; checks for
  // special case as described in JVM spec., p.243 & p.271.
  //
  //         normal case                           special case
  //
  // input : rax: dividend                         min_int
  //         reg: divisor                          -1
  //
  // output: rax: quotient  (= rax idiv reg)       min_int
  //         rdx: remainder (= rax irem reg)       0
  //
  //  Code sequnce:
  //
  //    0:   3d 00 00 00 80          cmp    $0x80000000,%eax
  //    5:   75 07/08                jne    e <normal>
  //    7:   33 d2                   xor    %edx,%edx
  //  [div >= 8 -> offset + 1]
  //  [REX_B]
  //    9:   83 f9 ff                cmp    $0xffffffffffffffff,$div
  //    c:   74 03/04                je     11 <done>
  // 000000000000000e <normal>:
  //    e:   99                      cltd
  //  [div >= 8 -> offset + 1]
  //  [REX_B]
  //    f:   f7 f9                   idiv   $div
  // 0000000000000011 <done>:
  MacroAssembler _masm(&cbuf);
  Label normal;
  Label done;

  // cmp    $0x80000000,%eax
  ___masm. cmp(as_Register(RAX_enc), 0x80000000);

  // jne    e <normal>
  ___masm. jccb(Assembler::notEqual, normal)jccb_0(Assembler::notEqual, normal, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1932);

  // xor    %edx,%edx
  ___masm. xorl(as_Register(RDX_enc), as_Register(RDX_enc));

  // cmp    $0xffffffffffffffff,%ecx
  ___masm. cmpl(opnd_array(2)->as_Register(ra_,this,idx2)/* div */, -1);

  // je     11 <done>
  ___masm. jccb(Assembler::equal, done)jccb_0(Assembler::equal, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1941);

  // <normal>
  // cltd
  ___masm. bind(normal);
  ___masm. cdql();

  // idivl
  // <done>
  ___masm. idivl(opnd_array(2)->as_Register(ra_,this,idx2)/* div */);
  ___masm. bind(done);

23883#line 23883 "ad_x86.cpp"
}
23885}

23887void divL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// rax
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// div
{

23895#line 1955 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // Full implementation of Java ldiv and lrem; checks for
  // special case as described in JVM spec., p.243 & p.271.
  //
  //         normal case                           special case
  //
  // input : rax: dividend                         min_long
  //         reg: divisor                          -1
  //
  // output: rax: quotient  (= rax idiv reg)       min_long
  //         rdx: remainder (= rax irem reg)       0
  //
  //  Code sequnce:
  //
  //    0:   48 ba 00 00 00 00 00    mov    $0x8000000000000000,%rdx
  //    7:   00 00 80
  //    a:   48 39 d0                cmp    %rdx,%rax
  //    d:   75 08                   jne    17 <normal>
  //    f:   33 d2                   xor    %edx,%edx
  //   11:   48 83 f9 ff             cmp    $0xffffffffffffffff,$div
  //   15:   74 05                   je     1c <done>
  // 0000000000000017 <normal>:
  //   17:   48 99                   cqto
  //   19:   48 f7 f9                idiv   $div
  // 000000000000001c <done>:
  MacroAssembler _masm(&cbuf);
  Label normal;
  Label done;

  // mov    $0x8000000000000000,%rdx
  ___masm. mov64(as_Register(RDX_enc), 0x8000000000000000);

  // cmp    %rdx,%rax
  ___masm. cmpq(as_Register(RAX_enc), as_Register(RDX_enc));

  // jne    17 <normal>
  ___masm. jccb(Assembler::notEqual, normal)jccb_0(Assembler::notEqual, normal, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1991);

  // xor    %edx,%edx
  ___masm. xorl(as_Register(RDX_enc), as_Register(RDX_enc));

  // cmp    $0xffffffffffffffff,$div
  ___masm. cmpq(opnd_array(2)->as_Register(ra_,this,idx2)/* div */, -1);

  // je     1e <done>
  ___masm. jccb(Assembler::equal, done)jccb_0(Assembler::equal, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2000);

  // <normal>
  // cqto
  ___masm. bind(normal);
  ___masm. cdqq();

  // idivq (note: must be emitted by the user of this rule)
  // <done>
  ___masm. idivq(opnd_array(2)->as_Register(ra_,this,idx2)/* div */);
  ___masm. bind(done);

23953#line 23953 "ad_x86.cpp"
}
23955}

23957void divModI_rReg_divmodNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// div
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rdx
{

23965#line 1897 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // Full implementation of Java idiv and irem; checks for
  // special case as described in JVM spec., p.243 & p.271.
  //
  //         normal case                           special case
  //
  // input : rax: dividend                         min_int
  //         reg: divisor                          -1
  //
  // output: rax: quotient  (= rax idiv reg)       min_int
  //         rdx: remainder (= rax irem reg)       0
  //
  //  Code sequnce:
  //
  //    0:   3d 00 00 00 80          cmp    $0x80000000,%eax
  //    5:   75 07/08                jne    e <normal>
  //    7:   33 d2                   xor    %edx,%edx
  //  [div >= 8 -> offset + 1]
  //  [REX_B]
  //    9:   83 f9 ff                cmp    $0xffffffffffffffff,$div
  //    c:   74 03/04                je     11 <done>
  // 000000000000000e <normal>:
  //    e:   99                      cltd
  //  [div >= 8 -> offset + 1]
  //  [REX_B]
  //    f:   f7 f9                   idiv   $div
  // 0000000000000011 <done>:
  MacroAssembler _masm(&cbuf);
  Label normal;
  Label done;

  // cmp    $0x80000000,%eax
  ___masm. cmp(as_Register(RAX_enc), 0x80000000);

  // jne    e <normal>
  ___masm. jccb(Assembler::notEqual, normal)jccb_0(Assembler::notEqual, normal, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1932);

  // xor    %edx,%edx
  ___masm. xorl(as_Register(RDX_enc), as_Register(RDX_enc));

  // cmp    $0xffffffffffffffff,%ecx
  ___masm. cmpl(opnd_array(2)->as_Register(ra_,this,idx2)/* div */, -1);

  // je     11 <done>
  ___masm. jccb(Assembler::equal, done)jccb_0(Assembler::equal, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1941);

  // <normal>
  // cltd
  ___masm. bind(normal);
  ___masm. cdql();

  // idivl
  // <done>
  ___masm. idivl(opnd_array(2)->as_Register(ra_,this,idx2)/* div */);
  ___masm. bind(done);

24022#line 24022 "ad_x86.cpp"
}
24024}

24026void divModL_rReg_divmodNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// div
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rdx
{

24034#line 1955 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // Full implementation of Java ldiv and lrem; checks for
  // special case as described in JVM spec., p.243 & p.271.
  //
  //         normal case                           special case
  //
  // input : rax: dividend                         min_long
  //         reg: divisor                          -1
  //
  // output: rax: quotient  (= rax idiv reg)       min_long
  //         rdx: remainder (= rax irem reg)       0
  //
  //  Code sequnce:
  //
  //    0:   48 ba 00 00 00 00 00    mov    $0x8000000000000000,%rdx
  //    7:   00 00 80
  //    a:   48 39 d0                cmp    %rdx,%rax
  //    d:   75 08                   jne    17 <normal>
  //    f:   33 d2                   xor    %edx,%edx
  //   11:   48 83 f9 ff             cmp    $0xffffffffffffffff,$div
  //   15:   74 05                   je     1c <done>
  // 0000000000000017 <normal>:
  //   17:   48 99                   cqto
  //   19:   48 f7 f9                idiv   $div
  // 000000000000001c <done>:
  MacroAssembler _masm(&cbuf);
  Label normal;
  Label done;

  // mov    $0x8000000000000000,%rdx
  ___masm. mov64(as_Register(RDX_enc), 0x8000000000000000);

  // cmp    %rdx,%rax
  ___masm. cmpq(as_Register(RAX_enc), as_Register(RDX_enc));

  // jne    17 <normal>
  ___masm. jccb(Assembler::notEqual, normal)jccb_0(Assembler::notEqual, normal, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1991);

  // xor    %edx,%edx
  ___masm. xorl(as_Register(RDX_enc), as_Register(RDX_enc));

  // cmp    $0xffffffffffffffff,$div
  ___masm. cmpq(opnd_array(2)->as_Register(ra_,this,idx2)/* div */, -1);

  // je     1e <done>
  ___masm. jccb(Assembler::equal, done)jccb_0(Assembler::equal, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2000);

  // <normal>
  // cqto
  ___masm. bind(normal);
  ___masm. cdqq();

  // idivq (note: must be emitted by the user of this rule)
  // <done>
  ___masm. idivq(opnd_array(2)->as_Register(ra_,this,idx2)/* div */);
  ___masm. bind(done);

24092#line 24092 "ad_x86.cpp"
}
24094}

24096void loadConL_0x6666666666666667Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{

24103#line 2249 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  int dstenc = opnd_array(0)->reg(ra_,this)/* dst */;
  if (dstenc < 8) {
    emit_opcode(cbuf, Assembler::REX_W);
  } else {
    emit_opcode(cbuf, Assembler::REX_WB);
    dstenc -= 8;
  }
  emit_opcode(cbuf, 0xB8 | dstenc);
  emit_d64(cbuf, (0x6666666666666667));

24115#line 24115 "ad_x86.cpp"
}
24117}

24119void mul_hiNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rax
{
  C2_MacroAssembler _masm(&cbuf);

24128#line 8642 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imulq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

24132#line 24132 "ad_x86.cpp"
}
24134}

24136void sarL_rReg_63Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cr
{
  C2_MacroAssembler _masm(&cbuf);

24144#line 8653 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, 63);

24148#line 24148 "ad_x86.cpp"
}
24150}

24152void sarL_rReg_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cr
{
  C2_MacroAssembler _masm(&cbuf);

24160#line 8664 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, 2);

24164#line 24164 "ad_x86.cpp"
}
24166}

24168void modI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// rax
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// div
{

24176#line 1897 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // Full implementation of Java idiv and irem; checks for
  // special case as described in JVM spec., p.243 & p.271.
  //
  //         normal case                           special case
  //
  // input : rax: dividend                         min_int
  //         reg: divisor                          -1
  //
  // output: rax: quotient  (= rax idiv reg)       min_int
  //         rdx: remainder (= rax irem reg)       0
  //
  //  Code sequnce:
  //
  //    0:   3d 00 00 00 80          cmp    $0x80000000,%eax
  //    5:   75 07/08                jne    e <normal>
  //    7:   33 d2                   xor    %edx,%edx
  //  [div >= 8 -> offset + 1]
  //  [REX_B]
  //    9:   83 f9 ff                cmp    $0xffffffffffffffff,$div
  //    c:   74 03/04                je     11 <done>
  // 000000000000000e <normal>:
  //    e:   99                      cltd
  //  [div >= 8 -> offset + 1]
  //  [REX_B]
  //    f:   f7 f9                   idiv   $div
  // 0000000000000011 <done>:
  MacroAssembler _masm(&cbuf);
  Label normal;
  Label done;

  // cmp    $0x80000000,%eax
  ___masm. cmp(as_Register(RAX_enc), 0x80000000);

  // jne    e <normal>
  ___masm. jccb(Assembler::notEqual, normal)jccb_0(Assembler::notEqual, normal, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1932);

  // xor    %edx,%edx
  ___masm. xorl(as_Register(RDX_enc), as_Register(RDX_enc));

  // cmp    $0xffffffffffffffff,%ecx
  ___masm. cmpl(opnd_array(2)->as_Register(ra_,this,idx2)/* div */, -1);

  // je     11 <done>
  ___masm. jccb(Assembler::equal, done)jccb_0(Assembler::equal, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1941);

  // <normal>
  // cltd
  ___masm. bind(normal);
  ___masm. cdql();

  // idivl
  // <done>
  ___masm. idivl(opnd_array(2)->as_Register(ra_,this,idx2)/* div */);
  ___masm. bind(done);

24233#line 24233 "ad_x86.cpp"
}
24235}

24237void modL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// rax
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// div
{

24245#line 1955 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // Full implementation of Java ldiv and lrem; checks for
  // special case as described in JVM spec., p.243 & p.271.
  //
  //         normal case                           special case
  //
  // input : rax: dividend                         min_long
  //         reg: divisor                          -1
  //
  // output: rax: quotient  (= rax idiv reg)       min_long
  //         rdx: remainder (= rax irem reg)       0
  //
  //  Code sequnce:
  //
  //    0:   48 ba 00 00 00 00 00    mov    $0x8000000000000000,%rdx
  //    7:   00 00 80
  //    a:   48 39 d0                cmp    %rdx,%rax
  //    d:   75 08                   jne    17 <normal>
  //    f:   33 d2                   xor    %edx,%edx
  //   11:   48 83 f9 ff             cmp    $0xffffffffffffffff,$div
  //   15:   74 05                   je     1c <done>
  // 0000000000000017 <normal>:
  //   17:   48 99                   cqto
  //   19:   48 f7 f9                idiv   $div
  // 000000000000001c <done>:
  MacroAssembler _masm(&cbuf);
  Label normal;
  Label done;

  // mov    $0x8000000000000000,%rdx
  ___masm. mov64(as_Register(RDX_enc), 0x8000000000000000);

  // cmp    %rdx,%rax
  ___masm. cmpq(as_Register(RAX_enc), as_Register(RDX_enc));

  // jne    17 <normal>
  ___masm. jccb(Assembler::notEqual, normal)jccb_0(Assembler::notEqual, normal, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 1991);

  // xor    %edx,%edx
  ___masm. xorl(as_Register(RDX_enc), as_Register(RDX_enc));

  // cmp    $0xffffffffffffffff,$div
  ___masm. cmpq(opnd_array(2)->as_Register(ra_,this,idx2)/* div */, -1);

  // je     1e <done>
  ___masm. jccb(Assembler::equal, done)jccb_0(Assembler::equal, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2000);

  // <normal>
  // cqto
  ___masm. bind(normal);
  ___masm. cdqq();

  // idivq (note: must be emitted by the user of this rule)
  // <done>
  ___masm. idivq(opnd_array(2)->as_Register(ra_,this,idx2)/* div */);
  ___masm. bind(done);

24303#line 24303 "ad_x86.cpp"
}
24305}

24307void salI_rReg_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24316#line 8735 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sall(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24320#line 24320 "ad_x86.cpp"
}
24322}

24324void salI_mem_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24333#line 8748 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sall(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24337#line 24337 "ad_x86.cpp"
}
24339}

24341void salI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24350#line 8761 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sall(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24354#line 24354 "ad_x86.cpp"
}
24356}

24358void salI_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24367#line 8774 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sall(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24371#line 24371 "ad_x86.cpp"
}
24373}

24375void salI_rReg_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24384#line 8787 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sall(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

24388#line 24388 "ad_x86.cpp"
}
24390}

24392void salI_mem_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24401#line 8800 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sall(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

24405#line 24405 "ad_x86.cpp"
}
24407}

24409void sarI_rReg_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24418#line 8813 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24422#line 24422 "ad_x86.cpp"
}
24424}

24426void sarI_mem_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24435#line 8826 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24439#line 24439 "ad_x86.cpp"
}
24441}

24443void sarI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24452#line 8839 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24456#line 24456 "ad_x86.cpp"
}
24458}

24460void sarI_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24469#line 8852 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24473#line 24473 "ad_x86.cpp"
}
24475}

24477void sarI_rReg_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24486#line 8864 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

24490#line 24490 "ad_x86.cpp"
}
24492}

24494void sarI_mem_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24503#line 8877 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

24507#line 24507 "ad_x86.cpp"
}
24509}

24511void shrI_rReg_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24520#line 8890 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24524#line 24524 "ad_x86.cpp"
}
24526}

24528void shrI_mem_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24537#line 8903 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24541#line 24541 "ad_x86.cpp"
}
24543}

24545void shrI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24554#line 8916 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24558#line 24558 "ad_x86.cpp"
}
24560}

24562void shrI_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24571#line 8929 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24575#line 24575 "ad_x86.cpp"
}
24577}

24579void shrI_rReg_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24588#line 8942 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

24592#line 24592 "ad_x86.cpp"
}
24594}

24596void shrI_mem_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24605#line 8955 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

24609#line 24609 "ad_x86.cpp"
}
24611}

24613void salL_rReg_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24622#line 8969 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. salq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24626#line 24626 "ad_x86.cpp"
}
24628}

24630void salL_mem_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24639#line 8982 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. salq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24643#line 24643 "ad_x86.cpp"
}
24645}

24647void salL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24656#line 8995 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. salq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24660#line 24660 "ad_x86.cpp"
}
24662}

24664void salL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24673#line 9008 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. salq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24677#line 24677 "ad_x86.cpp"
}
24679}

24681void salL_rReg_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24690#line 9021 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. salq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

24694#line 24694 "ad_x86.cpp"
}
24696}

24698void salL_mem_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24707#line 9034 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. salq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

24711#line 24711 "ad_x86.cpp"
}
24713}

24715void sarL_rReg_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24724#line 9047 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24728#line 24728 "ad_x86.cpp"
}
24730}

24732void sarL_mem_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24741#line 9060 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24745#line 24745 "ad_x86.cpp"
}
24747}

24749void sarL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24758#line 9073 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, (unsigned char)(opnd_array(2)->constant()& 0x3F));

24762#line 24762 "ad_x86.cpp"
}
24764}

24766void sarL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24775#line 9086 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), (unsigned char)(opnd_array(2)->constant()& 0x3F));

24779#line 24779 "ad_x86.cpp"
}
24781}

24783void sarL_rReg_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24792#line 9099 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

24796#line 24796 "ad_x86.cpp"
}
24798}

24800void sarL_mem_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24809#line 9112 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

24813#line 24813 "ad_x86.cpp"
}
24815}

24817void shrL_rReg_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24826#line 9125 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24830#line 24830 "ad_x86.cpp"
}
24832}

24834void shrL_mem_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24843#line 9138 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24847#line 24847 "ad_x86.cpp"
}
24849}

24851void shrL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24860#line 9151 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24864#line 24864 "ad_x86.cpp"
}
24866}

24868void shrL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24877#line 9164 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

24881#line 24881 "ad_x86.cpp"
}
24883}

24885void shrL_rReg_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24894#line 9177 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

24898#line 24898 "ad_x86.cpp"
}
24900}

24902void shrL_mem_CLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24911#line 9190 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. shrq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

24915#line 24915 "ad_x86.cpp"
}
24917}

24919void i2bNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// twentyfour
{
  C2_MacroAssembler _masm(&cbuf);

24928#line 9203 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movsbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

24932#line 24932 "ad_x86.cpp"
}
24934}

24936void i2sNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// sixteen
{
  C2_MacroAssembler _masm(&cbuf);

24945#line 9216 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movswl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

24949#line 24949 "ad_x86.cpp"
}
24951}

24953void rolI_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24962#line 9231 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. roll(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

24966#line 24966 "ad_x86.cpp"
}
24968}

24970void rolI_rReg_VarNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24979#line 9244 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. roll(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

24983#line 24983 "ad_x86.cpp"
}
24985}

24987void rorI_immI8_legacyNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

24996#line 9257 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. rorl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

25000#line 25000 "ad_x86.cpp"
}
25002}

25004void rorI_immI8Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

25013#line 9269 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. rorxd(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

25017#line 25017 "ad_x86.cpp"
}
25019}

25021void rorI_rReg_VarNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

25030#line 9282 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. rorl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

25034#line 25034 "ad_x86.cpp"
}
25036}

25038void rolL_immI8Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

25047#line 9296 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. rolq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

25051#line 25051 "ad_x86.cpp"
}
25053}

25055void rolL_rReg_VarNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

25064#line 9309 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. rolq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

25068#line 25068 "ad_x86.cpp"
}
25070}

25072void rorL_immI8_legacyNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

25081#line 9323 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. rorq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

25085#line 25085 "ad_x86.cpp"
}
25087}

25089void rorL_immI8Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

25098#line 9336 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. rorxq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

25102#line 25102 "ad_x86.cpp"
}
25104}

25106void rorL_rReg_VarNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

25115#line 9349 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. rorq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

25119#line 25119 "ad_x86.cpp"
}
25121}

25123void andI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25132#line 9368 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25136#line 25136 "ad_x86.cpp"
}
25138}

25140void andI_rReg_imm255Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25149#line 9380 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzbl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

25153#line 25153 "ad_x86.cpp"
}
25155}

25157void andI2L_rReg_imm255Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

25166#line 9392 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

25170#line 25170 "ad_x86.cpp"
}
25172}

25174void andI_rReg_imm65535Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25183#line 9404 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzwl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

25187#line 25187 "ad_x86.cpp"
}
25189}

25191void andI2L_rReg_imm65535Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

25200#line 9416 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzwl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

25204#line 25204 "ad_x86.cpp"
}
25206}

25208void convI2LAndI_reg_immIbitmaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

25218#line 9430 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, exact_log2(opnd_array(2)->constant()+ 1));
  ___masm. bzhiq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */);

25223#line 25223 "ad_x86.cpp"
}
25225}

25227void andI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25236#line 9444 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

25240#line 25240 "ad_x86.cpp"
}
25242}

25244void andI_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25253#line 9458 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

25257#line 25257 "ad_x86.cpp"
}
25259}

25261void andI_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

25270#line 9458 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andl(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

25274#line 25274 "ad_x86.cpp"
}
25276}

25278void andB_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25287#line 9472 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25291#line 25291 "ad_x86.cpp"
}
25293}

25295void andB_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25304#line 9472 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25308#line 25308 "ad_x86.cpp"
}
25310}

25312void andI_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25321#line 9485 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25325#line 25325 "ad_x86.cpp"
}
25327}

25329void andI_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25338#line 9485 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25342#line 25342 "ad_x86.cpp"
}
25344}

25346void andI_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25355#line 9499 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

25359#line 25359 "ad_x86.cpp"
}
25361}

25363void andnI_rReg_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

25373#line 9514 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andnl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(3)->base(ra_,this,idx3), opnd_array(3)->index(ra_,this,idx3), opnd_array(3)->scale(), opnd_array(3)->disp(ra_,this,idx3), opnd_array(3)->disp_reloc()));

25377#line 25377 "ad_x86.cpp"
}
25379}

25381void andnI_rReg_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src2
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25391#line 9514 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andnl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src1 */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

25395#line 25395 "ad_x86.cpp"
}
25397}

25399void andnI_rReg_rReg_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

25409#line 9527 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andnl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* src2 */);

25413#line 25413 "ad_x86.cpp"
}
25415}

25417void andnI_rReg_rReg_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src2
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25427#line 9527 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andnl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src1 */, opnd_array(1)->as_Register(ra_,this,idx1)/* src2 */);

25431#line 25431 "ad_x86.cpp"
}
25433}

25435void blsiI_rReg_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// imm_zero
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25444#line 9540 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsil(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25448#line 25448 "ad_x86.cpp"
}
25450}

25452void blsiI_rReg_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm_zero
{
  C2_MacroAssembler _masm(&cbuf);

25461#line 9540 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsil(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

25465#line 25465 "ad_x86.cpp"
}
25467}

25469void blsiI_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// imm_zero
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25478#line 9554 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsil(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

25482#line 25482 "ad_x86.cpp"
}
25484}

25486void blsiI_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm_zero
{
  C2_MacroAssembler _masm(&cbuf);

25495#line 9554 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsil(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

25499#line 25499 "ad_x86.cpp"
}
25501}

25503void blsmskI_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25512#line 9569 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsmskl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

25516#line 25516 "ad_x86.cpp"
}
25518}

25520void blsmskI_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25529#line 9569 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsmskl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

25533#line 25533 "ad_x86.cpp"
}
25535}

25537void blsmskI_rReg_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25546#line 9583 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsmskl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

25550#line 25550 "ad_x86.cpp"
}
25552}

25554void blsmskI_rReg_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25563#line 9583 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsmskl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

25567#line 25567 "ad_x86.cpp"
}
25569}

25571void blsrI_rReg_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25580#line 9598 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsrl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

25584#line 25584 "ad_x86.cpp"
}
25586}

25588void blsrI_rReg_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25597#line 9598 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsrl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

25601#line 25601 "ad_x86.cpp"
}
25603}

25605void blsrI_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25614#line 9614 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsrl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

25618#line 25618 "ad_x86.cpp"
}
25620}

25622void blsrI_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

25631#line 9614 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsrl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

25635#line 25635 "ad_x86.cpp"
}
25637}

25639void orI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25648#line 9629 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25652#line 25652 "ad_x86.cpp"
}
25654}

25656void orI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25665#line 9642 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

25669#line 25669 "ad_x86.cpp"
}
25671}

25673void orI_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25682#line 9656 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

25686#line 25686 "ad_x86.cpp"
}
25688}

25690void orI_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

25699#line 9656 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orl(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

25703#line 25703 "ad_x86.cpp"
}
25705}

25707void orB_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25716#line 9670 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25720#line 25720 "ad_x86.cpp"
}
25722}

25724void orB_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25733#line 9670 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25737#line 25737 "ad_x86.cpp"
}
25739}

25741void orI_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25750#line 9683 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25754#line 25754 "ad_x86.cpp"
}
25756}

25758void orI_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25767#line 9683 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25771#line 25771 "ad_x86.cpp"
}
25773}

25775void orI_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25784#line 9697 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

25788#line 25788 "ad_x86.cpp"
}
25790}

25792void xorI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25801#line 9711 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25805#line 25805 "ad_x86.cpp"
}
25807}

25809void xorI_rReg_im1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm
{
  C2_MacroAssembler _masm(&cbuf);

25818#line 9722 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

   ___masm. notl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

25822#line 25822 "ad_x86.cpp"
}
25824}

25826void xorI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25835#line 9735 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constant());

25839#line 25839 "ad_x86.cpp"
}
25841}

25843void xorI_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25852#line 9749 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

25856#line 25856 "ad_x86.cpp"
}
25858}

25860void xorI_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

25869#line 9749 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

25873#line 25873 "ad_x86.cpp"
}
25875}

25877void xorB_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25886#line 9763 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25890#line 25890 "ad_x86.cpp"
}
25892}

25894void xorB_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25903#line 9763 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25907#line 25907 "ad_x86.cpp"
}
25909}

25911void xorI_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25920#line 9776 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25924#line 25924 "ad_x86.cpp"
}
25926}

25928void xorI_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25937#line 9776 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25941#line 25941 "ad_x86.cpp"
}
25943}

25945void xorI_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25954#line 9790 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

25958#line 25958 "ad_x86.cpp"
}
25960}

25962void andL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25971#line 9807 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

25975#line 25975 "ad_x86.cpp"
}
25977}

25979void andL_rReg_imm255Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

25988#line 9819 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzbq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

25992#line 25992 "ad_x86.cpp"
}
25994}

25996void andL_rReg_imm65535Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26005#line 9831 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movzwq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

26009#line 26009 "ad_x86.cpp"
}
26011}

26013void andL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26022#line 9844 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constantL());

26026#line 26026 "ad_x86.cpp"
}
26028}

26030void andL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26039#line 9858 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

26043#line 26043 "ad_x86.cpp"
}
26045}

26047void andL_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

26056#line 9858 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

26060#line 26060 "ad_x86.cpp"
}
26062}

26064void andL_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26073#line 9872 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26077#line 26077 "ad_x86.cpp"
}
26079}

26081void andL_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26090#line 9872 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26094#line 26094 "ad_x86.cpp"
}
26096}

26098void andL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26107#line 9886 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constantL());

26111#line 26111 "ad_x86.cpp"
}
26113}

26115void btrL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

26124#line 9903 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. btrq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), log2i_exact((julong)~opnd_array(2)->constantL()));

26128#line 26128 "ad_x86.cpp"
}
26130}

26132void andnL_rReg_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

26142#line 9918 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andnq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(3)->base(ra_,this,idx3), opnd_array(3)->index(ra_,this,idx3), opnd_array(3)->scale(), opnd_array(3)->disp(ra_,this,idx3), opnd_array(3)->disp_reloc()));

26146#line 26146 "ad_x86.cpp"
}
26148}

26150void andnL_rReg_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src2
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26160#line 9918 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. andnq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src1 */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

26164#line 26164 "ad_x86.cpp"
}
26166}

26168void andnL_rReg_rReg_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

26178#line 9931 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

___masm. andnq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* src2 */);

26182#line 26182 "ad_x86.cpp"
}
26184}

26186void andnL_rReg_rReg_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src2
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26196#line 9931 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

___masm. andnq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src1 */, opnd_array(1)->as_Register(ra_,this,idx1)/* src2 */);

26200#line 26200 "ad_x86.cpp"
}
26202}

26204void blsiL_rReg_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// imm_zero
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26213#line 9944 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsiq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26217#line 26217 "ad_x86.cpp"
}
26219}

26221void blsiL_rReg_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm_zero
{
  C2_MacroAssembler _masm(&cbuf);

26230#line 9944 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsiq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

26234#line 26234 "ad_x86.cpp"
}
26236}

26238void blsiL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// imm_zero
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26247#line 9958 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsiq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

26251#line 26251 "ad_x86.cpp"
}
26253}

26255void blsiL_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm_zero
{
  C2_MacroAssembler _masm(&cbuf);

26264#line 9958 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsiq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

26268#line 26268 "ad_x86.cpp"
}
26270}

26272void blsmskL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26281#line 9973 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsmskq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

26285#line 26285 "ad_x86.cpp"
}
26287}

26289void blsmskL_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26298#line 9973 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsmskq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

26302#line 26302 "ad_x86.cpp"
}
26304}

26306void blsmskL_rReg_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26315#line 9987 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsmskq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

26319#line 26319 "ad_x86.cpp"
}
26321}

26323void blsmskL_rReg_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26332#line 9987 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsmskq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

26336#line 26336 "ad_x86.cpp"
}
26338}

26340void blsrL_rReg_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26349#line 10002 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsrq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

26353#line 26353 "ad_x86.cpp"
}
26355}

26357void blsrL_rReg_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26366#line 10002 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsrq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

26370#line 26370 "ad_x86.cpp"
}
26372}

26374void blsrL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26383#line 10018 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsrq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

26387#line 26387 "ad_x86.cpp"
}
26389}

26391void blsrL_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// minus_1
{
  C2_MacroAssembler _masm(&cbuf);

26400#line 10018 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. blsrq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

26404#line 26404 "ad_x86.cpp"
}
26406}

26408void orL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26417#line 10033 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26421#line 26421 "ad_x86.cpp"
}
26423}

26425void orL_rReg_castP2XNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26434#line 10045 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26438#line 26438 "ad_x86.cpp"
}
26440}

26442void orL_rReg_castP2X_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

26451#line 10045 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

26455#line 26455 "ad_x86.cpp"
}
26457}

26459void orL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26468#line 10059 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constantL());

26472#line 26472 "ad_x86.cpp"
}
26474}

26476void orL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26485#line 10073 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

26489#line 26489 "ad_x86.cpp"
}
26491}

26493void orL_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

26502#line 10073 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

26506#line 26506 "ad_x86.cpp"
}
26508}

26510void orL_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26519#line 10087 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26523#line 26523 "ad_x86.cpp"
}
26525}

26527void orL_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26536#line 10087 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26540#line 26540 "ad_x86.cpp"
}
26542}

26544void orL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26553#line 10101 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. orq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constantL());

26557#line 26557 "ad_x86.cpp"
}
26559}

26561void btsL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

26570#line 10118 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. btsq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), log2i_exact((julong)opnd_array(2)->constantL()));

26574#line 26574 "ad_x86.cpp"
}
26576}

26578void xorL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26587#line 10132 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26591#line 26591 "ad_x86.cpp"
}
26593}

26595void xorL_rReg_im1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm
{
  C2_MacroAssembler _masm(&cbuf);

26604#line 10143 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

   ___masm. notq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */);

26608#line 26608 "ad_x86.cpp"
}
26610}

26612void xorL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26621#line 10156 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->constantL());

26625#line 26625 "ad_x86.cpp"
}
26627}

26629void xorL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26638#line 10170 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorq(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

26642#line 26642 "ad_x86.cpp"
}
26644}

26646void xorL_rReg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

26655#line 10170 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorq(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

26659#line 26659 "ad_x86.cpp"
}
26661}

26663void xorL_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26672#line 10184 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26676#line 26676 "ad_x86.cpp"
}
26678}

26680void xorL_mem_rReg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26689#line 10184 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

26693#line 26693 "ad_x86.cpp"
}
26695}

26697void xorL_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26706#line 10198 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. xorq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constantL());

26710#line 26710 "ad_x86.cpp"
}
26712}

26714void convI2BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26722#line 10213 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testl(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. set_byte_if_not_zero(opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

26728#line 26728 "ad_x86.cpp"
}
26730}

26732void convP2BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

26740#line 10230 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. set_byte_if_not_zero(opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

26746#line 26746 "ad_x86.cpp"
}
26748}

26750void cmpLTMaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// p
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// q
{
  C2_MacroAssembler _masm(&cbuf);

26759#line 10248 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* p */, opnd_array(2)->as_Register(ra_,this,idx2)/* q */);
  ___masm. setl(opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. negl(opnd_array(0)->as_Register(ra_,this)/* dst */);

26766#line 26766 "ad_x86.cpp"
}
26768}

26770void cmpLTMask0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

26779#line 10264 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. sarl(opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, 31);

26783#line 26783 "ad_x86.cpp"
}
26785}

26787void cadd_cmpLTMaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// p
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// q
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// y
{
  C2_MacroAssembler _masm(&cbuf);

26797#line 10280 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rp = opnd_array(1)->as_Register(ra_,this,idx1)/* p */;
  Register Rq = opnd_array(2)->as_Register(ra_,this,idx2)/* q */;
  Register Ry = opnd_array(3)->as_Register(ra_,this,idx3)/* y */;
  Label done;
  ___masm. subl(Rp, Rq);
  ___masm. jccb(Assembler::greaterEqual, done)jccb_0(Assembler::greaterEqual, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 10286);
  ___masm. addl(Rp, Ry);
  ___masm. bind(done);

26808#line 26808 "ad_x86.cpp"
}
26810}

26812void cadd_cmpLTMask_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// p
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// q
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// y
{
  C2_MacroAssembler _masm(&cbuf);

26822#line 10280 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rp = opnd_array(1)->as_Register(ra_,this,idx1)/* p */;
  Register Rq = opnd_array(2)->as_Register(ra_,this,idx2)/* q */;
  Register Ry = opnd_array(3)->as_Register(ra_,this,idx3)/* y */;
  Label done;
  ___masm. subl(Rp, Rq);
  ___masm. jccb(Assembler::greaterEqual, done)jccb_0(Assembler::greaterEqual, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 10286);
  ___masm. addl(Rp, Ry);
  ___masm. bind(done);

26833#line 26833 "ad_x86.cpp"
}
26835}

26837void cadd_cmpLTMask_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// y
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// p
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// q
{
  C2_MacroAssembler _masm(&cbuf);

26847#line 10280 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rp = opnd_array(2)->as_Register(ra_,this,idx2)/* p */;
  Register Rq = opnd_array(3)->as_Register(ra_,this,idx3)/* q */;
  Register Ry = opnd_array(1)->as_Register(ra_,this,idx1)/* y */;
  Label done;
  ___masm. subl(Rp, Rq);
  ___masm. jccb(Assembler::greaterEqual, done)jccb_0(Assembler::greaterEqual, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 10286);
  ___masm. addl(Rp, Ry);
  ___masm. bind(done);

26858#line 26858 "ad_x86.cpp"
}
26860}

26862void cadd_cmpLTMask_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// p
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// q
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// y
{
  C2_MacroAssembler _masm(&cbuf);

26872#line 10280 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rp = opnd_array(1)->as_Register(ra_,this,idx1)/* p */;
  Register Rq = opnd_array(2)->as_Register(ra_,this,idx2)/* q */;
  Register Ry = opnd_array(3)->as_Register(ra_,this,idx3)/* y */;
  Label done;
  ___masm. subl(Rp, Rq);
  ___masm. jccb(Assembler::greaterEqual, done)jccb_0(Assembler::greaterEqual, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 10286);
  ___masm. addl(Rp, Ry);
  ___masm. bind(done);

26883#line 26883 "ad_x86.cpp"
}
26885}

26887void and_cmpLTMaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// p
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// q
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// y
{
  C2_MacroAssembler _masm(&cbuf);

26897#line 10305 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rp = opnd_array(1)->as_Register(ra_,this,idx1)/* p */;
  Register Rq = opnd_array(2)->as_Register(ra_,this,idx2)/* q */;
  Register Ry = opnd_array(3)->as_Register(ra_,this,idx3)/* y */;
  Label done;
  ___masm. cmpl(Rp, Rq);
  ___masm. jccb(Assembler::less, done)jccb_0(Assembler::less, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 10311);
  ___masm. xorl(Ry, Ry);
  ___masm. bind(done);

26908#line 26908 "ad_x86.cpp"
}
26910}

26912void and_cmpLTMask_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// y
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// p
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// q
{
  C2_MacroAssembler _masm(&cbuf);

26922#line 10305 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rp = opnd_array(2)->as_Register(ra_,this,idx2)/* p */;
  Register Rq = opnd_array(3)->as_Register(ra_,this,idx3)/* q */;
  Register Ry = opnd_array(1)->as_Register(ra_,this,idx1)/* y */;
  Label done;
  ___masm. cmpl(Rp, Rq);
  ___masm. jccb(Assembler::less, done)jccb_0(Assembler::less, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 10311);
  ___masm. xorl(Ry, Ry);
  ___masm. bind(done);

26933#line 26933 "ad_x86.cpp"
}
26935}

26937void cmpF_cc_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

26946#line 10332 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomiss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);
  emit_cmpfp_fixup(_masm);

26951#line 26951 "ad_x86.cpp"
}
26953}

26955void cmpF_cc_reg_CFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

26964#line 10344 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomiss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

26968#line 26968 "ad_x86.cpp"
}
26970}

26972void cmpF_cc_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

26981#line 10361 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomiss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));
  emit_cmpfp_fixup(_masm);

26986#line 26986 "ad_x86.cpp"
}
26988}

26990void cmpF_cc_memCFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

26999#line 10373 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomiss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

27003#line 27003 "ad_x86.cpp"
}
27005}

27007void cmpF_cc_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

27016#line 10389 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomiss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));
  emit_cmpfp_fixup(_masm);

27021#line 27021 "ad_x86.cpp"
}
27023}

27025void cmpF_cc_immNode::eval_constant(Compile* C) {
{

27028#line 10390 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
27030#line 27030 "ad_x86.cpp"
}
27032}
27033void cmpF_cc_immCFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

27042#line 10400 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomiss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

27046#line 27046 "ad_x86.cpp"
}
27048}

27050void cmpF_cc_immCFNode::eval_constant(Compile* C) {
{

27053#line 10401 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
27055#line 27055 "ad_x86.cpp"
}
27057}
27058void cmpD_cc_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

27067#line 10417 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomisd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);
  emit_cmpfp_fixup(_masm);

27072#line 27072 "ad_x86.cpp"
}
27074}

27076void cmpD_cc_reg_CFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

27085#line 10429 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomisd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

27089#line 27089 "ad_x86.cpp"
}
27091}

27093void cmpD_cc_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

27102#line 10446 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomisd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));
  emit_cmpfp_fixup(_masm);

27107#line 27107 "ad_x86.cpp"
}
27109}

27111void cmpD_cc_memCFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

27120#line 10458 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomisd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

27124#line 27124 "ad_x86.cpp"
}
27126}

27128void cmpD_cc_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

27137#line 10474 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomisd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));
  emit_cmpfp_fixup(_masm);

27142#line 27142 "ad_x86.cpp"
}
27144}

27146void cmpD_cc_immNode::eval_constant(Compile* C) {
{

27149#line 10475 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
27151#line 27151 "ad_x86.cpp"
}
27153}
27154void cmpD_cc_immCFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

27163#line 10485 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomisd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

27167#line 27167 "ad_x86.cpp"
}
27169}

27171void cmpD_cc_immCFNode::eval_constant(Compile* C) {
{

27174#line 10486 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
27176#line 27176 "ad_x86.cpp"
}
27178}
27179void cmpF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

27188#line 10505 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomiss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);
  emit_cmpfp3(_masm, opnd_array(0)->as_Register(ra_,this)/* dst */);

27193#line 27193 "ad_x86.cpp"
}
27195}

27197void cmpF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

27206#line 10526 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomiss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));
  emit_cmpfp3(_masm, opnd_array(0)->as_Register(ra_,this)/* dst */);

27211#line 27211 "ad_x86.cpp"
}
27213}

27215void cmpF_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

27224#line 10546 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomiss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));
  emit_cmpfp3(_masm, opnd_array(0)->as_Register(ra_,this)/* dst */);

27229#line 27229 "ad_x86.cpp"
}
27231}

27233void cmpF_immNode::eval_constant(Compile* C) {
{

27236#line 10547 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
27238#line 27238 "ad_x86.cpp"
}
27240}
27241void cmpD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

27250#line 10567 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomisd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);
  emit_cmpfp3(_masm, opnd_array(0)->as_Register(ra_,this)/* dst */);

27255#line 27255 "ad_x86.cpp"
}
27257}

27259void cmpD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

27268#line 10588 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomisd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));
  emit_cmpfp3(_masm, opnd_array(0)->as_Register(ra_,this)/* dst */);

27273#line 27273 "ad_x86.cpp"
}
27275}

27277void cmpD_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

27286#line 10608 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ucomisd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));
  emit_cmpfp3(_masm, opnd_array(0)->as_Register(ra_,this)/* dst */);

27291#line 27291 "ad_x86.cpp"
}
27293}

27295void cmpD_immNode::eval_constant(Compile* C) {
{

27298#line 10609 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
27300#line 27300 "ad_x86.cpp"
}
27302}
27303void convF2D_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27311#line 10622 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtss2sd (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27315#line 27315 "ad_x86.cpp"
}
27317}

27319void convF2D_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27327#line 10633 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtss2sd (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

27331#line 27331 "ad_x86.cpp"
}
27333}

27335void convD2F_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27343#line 10644 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsd2ss (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27347#line 27347 "ad_x86.cpp"
}
27349}

27351void convD2F_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27359#line 10655 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsd2ss (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

27363#line 27363 "ad_x86.cpp"
}
27365}

27367void convF2I_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27375#line 10667 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. convert_f2i(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27379#line 27379 "ad_x86.cpp"
}
27381}

27383void convF2L_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27391#line 10678 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. convert_f2l(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27395#line 27395 "ad_x86.cpp"
}
27397}

27399void convD2I_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27407#line 10689 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. convert_d2i(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27411#line 27411 "ad_x86.cpp"
}
27413}

27415void convD2L_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27423#line 10700 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. convert_d2l(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27427#line 27427 "ad_x86.cpp"
}
27429}

27431void convI2F_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27439#line 10712 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsi2ssl (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27443#line 27443 "ad_x86.cpp"
}
27445}

27447void convI2F_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27455#line 10723 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsi2ssl (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

27459#line 27459 "ad_x86.cpp"
}
27461}

27463void convI2D_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27471#line 10735 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsi2sdl (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27475#line 27475 "ad_x86.cpp"
}
27477}

27479void convI2D_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27487#line 10746 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsi2sdl (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

27491#line 27491 "ad_x86.cpp"
}
27493}

27495void convXI2F_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27503#line 10759 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. cvtdq2ps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);

27508#line 27508 "ad_x86.cpp"
}
27510}

27512void convXI2D_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27520#line 10773 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  ___masm. cvtdq2pd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);

27525#line 27525 "ad_x86.cpp"
}
27527}

27529void convL2F_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27537#line 10785 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsi2ssq (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27541#line 27541 "ad_x86.cpp"
}
27543}

27545void convL2F_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27553#line 10796 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsi2ssq (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

27557#line 27557 "ad_x86.cpp"
}
27559}

27561void convL2D_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27569#line 10807 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsi2sdq (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27573#line 27573 "ad_x86.cpp"
}
27575}

27577void convL2D_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27585#line 10818 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cvtsi2sdq (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

27589#line 27589 "ad_x86.cpp"
}
27591}

27593void convI2L_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27601#line 10830 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movslq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27605#line 27605 "ad_x86.cpp"
}
27607}

27609void convI2L_reg_reg_zexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

27618#line 10859 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  if (opnd_array(0)->reg(ra_,this)/* dst */!= opnd_array(1)->reg(ra_,this,idx1)/* src */) {
    ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
  }

27624#line 27624 "ad_x86.cpp"
}
27626}

27628void convI2L_reg_mem_zexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

27637#line 10873 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

27641#line 27641 "ad_x86.cpp"
}
27643}

27645void zerox_long_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

27654#line 10884 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27658#line 27658 "ad_x86.cpp"
}
27660}

27662void convL2I_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27670#line 10895 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27674#line 27674 "ad_x86.cpp"
}
27676}

27678void MoveF2I_stack_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27686#line 10908 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, Address(rsp, opnd_array(1)->disp(ra_,this,idx1)));

27690#line 27690 "ad_x86.cpp"
}
27692}

27694void MoveI2F_stack_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27702#line 10920 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movflt(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address(rsp, opnd_array(1)->disp(ra_,this,idx1)));

27706#line 27706 "ad_x86.cpp"
}
27708}

27710void MoveD2L_stack_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27718#line 10932 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(opnd_array(0)->as_Register(ra_,this)/* dst */, Address(rsp, opnd_array(1)->disp(ra_,this,idx1)));

27722#line 27722 "ad_x86.cpp"
}
27724}

27726void MoveL2D_stack_reg_partialNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27734#line 10945 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdbl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address(rsp, opnd_array(1)->disp(ra_,this,idx1)));

27738#line 27738 "ad_x86.cpp"
}
27740}

27742void MoveL2D_stack_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27750#line 10958 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdbl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address(rsp, opnd_array(1)->disp(ra_,this,idx1)));

27754#line 27754 "ad_x86.cpp"
}
27756}

27758void MoveF2I_reg_stackNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27766#line 10971 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movflt(Address(rsp, opnd_array(0)->disp(ra_,this,0)), opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27770#line 27770 "ad_x86.cpp"
}
27772}

27774void MoveI2F_reg_stackNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27782#line 10983 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movl(Address(rsp, opnd_array(0)->disp(ra_,this,0)), opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27786#line 27786 "ad_x86.cpp"
}
27788}

27790void MoveD2L_reg_stackNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27798#line 10995 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdbl(Address(rsp, opnd_array(0)->disp(ra_,this,0)), opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27802#line 27802 "ad_x86.cpp"
}
27804}

27806void MoveL2D_reg_stackNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27814#line 11007 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movq(Address(rsp, opnd_array(0)->disp(ra_,this,0)), opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27818#line 27818 "ad_x86.cpp"
}
27820}

27822void MoveF2I_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27830#line 11018 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27834#line 27834 "ad_x86.cpp"
}
27836}

27838void MoveD2L_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27846#line 11029 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdq(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

27850#line 27850 "ad_x86.cpp"
}
27852}

27854void MoveI2F_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27862#line 11040 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27866#line 27866 "ad_x86.cpp"
}
27868}

27870void MoveL2D_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

27878#line 11051 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

   ___masm. movdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

27882#line 27882 "ad_x86.cpp"
}
27884}

27886void rep_stosNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// cnt
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// base
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

27896#line 11111 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. clear_mem(opnd_array(2)->as_Register(ra_,this,idx2)/* base */, opnd_array(1)->as_Register(ra_,this,idx1)/* cnt */, as_Register(RAX_enc),
               opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, false, knoreg);

27901#line 27901 "ad_x86.cpp"
}
27903}

27905void rep_stos_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// cnt
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// base
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

27916#line 11172 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. clear_mem(opnd_array(2)->as_Register(ra_,this,idx2)/* base */, opnd_array(1)->as_Register(ra_,this,idx1)/* cnt */, as_Register(RAX_enc),
               opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, false, opnd_array(4)->as_KRegister(ra_,this,idx4)/* ktmp */);

27921#line 27921 "ad_x86.cpp"
}
27923}

27925void rep_stos_largeNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// cnt
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// base
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

27935#line 11223 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. clear_mem(opnd_array(2)->as_Register(ra_,this,idx2)/* base */, opnd_array(1)->as_Register(ra_,this,idx1)/* cnt */, as_Register(RAX_enc),
               opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, true, knoreg);

27940#line 27940 "ad_x86.cpp"
}
27942}

27944void rep_stos_large_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// cnt
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// base
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

27955#line 11274 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. clear_mem(opnd_array(2)->as_Register(ra_,this,idx2)/* base */, opnd_array(1)->as_Register(ra_,this,idx1)/* cnt */, as_Register(RAX_enc),
               opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, true, opnd_array(4)->as_KRegister(ra_,this,idx4)/* ktmp */);

27960#line 27960 "ad_x86.cpp"
}
27962}

27964void rep_stos_imNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// cnt
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// base
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// zero
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

27976#line 11290 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

 ___masm. clear_mem(opnd_array(2)->as_Register(ra_,this,idx2)/* base */, opnd_array(1)->constantL(), opnd_array(4)->as_Register(ra_,this,idx4)/* zero */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */);

27980#line 27980 "ad_x86.cpp"
}
27982}

27984void string_compareLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp1
{
  C2_MacroAssembler _masm(&cbuf);

27996#line 11304 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_compare(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                    opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */, opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp1 */, StrIntrinsicNode::LL, knoreg);

28002#line 28002 "ad_x86.cpp"
}
28004}

28006void string_compareL_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

28019#line 11320 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_compare(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                    opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */, opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp1 */, StrIntrinsicNode::LL, opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp */);

28025#line 28025 "ad_x86.cpp"
}
28027}

28029void string_compareUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp1
{
  C2_MacroAssembler _masm(&cbuf);

28041#line 11336 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_compare(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                    opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */, opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp1 */, StrIntrinsicNode::UU, knoreg);

28047#line 28047 "ad_x86.cpp"
}
28049}

28051void string_compareU_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

28064#line 11352 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_compare(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                    opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */, opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp1 */, StrIntrinsicNode::UU, opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp */);

28070#line 28070 "ad_x86.cpp"
}
28072}

28074void string_compareLUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp1
{
  C2_MacroAssembler _masm(&cbuf);

28086#line 11368 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_compare(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                    opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */, opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp1 */, StrIntrinsicNode::LU, knoreg);

28092#line 28092 "ad_x86.cpp"
}
28094}

28096void string_compareLU_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

28109#line 11384 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_compare(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                    opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */, opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp1 */, StrIntrinsicNode::LU, opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp */);

28115#line 28115 "ad_x86.cpp"
}
28117}

28119void string_compareULNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp1
{
  C2_MacroAssembler _masm(&cbuf);

28131#line 11400 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_compare(opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */, opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */,
                    opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */, opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp1 */, StrIntrinsicNode::UL, knoreg);

28137#line 28137 "ad_x86.cpp"
}
28139}

28141void string_compareUL_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

28154#line 11416 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_compare(opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */, opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */,
                    opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */, opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp1 */, StrIntrinsicNode::UL, opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp */);

28160#line 28160 "ad_x86.cpp"
}
28162}

28164void string_indexof_conLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// int_cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp_vec
{
  C2_MacroAssembler _masm(&cbuf);

28176#line 11433 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  int icnt2 = (int)opnd_array(4)->constant();
  if (icnt2 >= 16) {
    // IndexOf for constant substrings with size >= 16 elements
    // which don't need to be loaded through stack.
    ___masm. string_indexofC8(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                        opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, as_Register(RAX_enc),
                        icnt2, opnd_array(0)->as_Register(ra_,this)/* result */,
                        opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec */, as_Register(RCX_enc), StrIntrinsicNode::LL);
  } else {
    // Small strings are loaded through stack if they cross page boundary.
    ___masm. string_indexof(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                      opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, as_Register(RAX_enc),
                      icnt2, opnd_array(0)->as_Register(ra_,this)/* result */,
                      opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec */, as_Register(RCX_enc), StrIntrinsicNode::LL);
  }

28194#line 28194 "ad_x86.cpp"
}
28196}

28198void string_indexof_conUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// int_cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp_vec
{
  C2_MacroAssembler _masm(&cbuf);

28210#line 11462 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  int icnt2 = (int)opnd_array(4)->constant();
  if (icnt2 >= 8) {
    // IndexOf for constant substrings with size >= 8 elements
    // which don't need to be loaded through stack.
    ___masm. string_indexofC8(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                        opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, as_Register(RAX_enc),
                        icnt2, opnd_array(0)->as_Register(ra_,this)/* result */,
                        opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec */, as_Register(RCX_enc), StrIntrinsicNode::UU);
  } else {
    // Small strings are loaded through stack if they cross page boundary.
    ___masm. string_indexof(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                      opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, as_Register(RAX_enc),
                      icnt2, opnd_array(0)->as_Register(ra_,this)/* result */,
                      opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec */, as_Register(RCX_enc), StrIntrinsicNode::UU);
  }

28228#line 28228 "ad_x86.cpp"
}
28230}

28232void string_indexof_conULNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// int_cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp_vec
{
  C2_MacroAssembler _masm(&cbuf);

28244#line 11491 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  int icnt2 = (int)opnd_array(4)->constant();
  if (icnt2 >= 8) {
    // IndexOf for constant substrings with size >= 8 elements
    // which don't need to be loaded through stack.
    ___masm. string_indexofC8(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                        opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, as_Register(RAX_enc),
                        icnt2, opnd_array(0)->as_Register(ra_,this)/* result */,
                        opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec */, as_Register(RCX_enc), StrIntrinsicNode::UL);
  } else {
    // Small strings are loaded through stack if they cross page boundary.
    ___masm. string_indexof(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                      opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, as_Register(RAX_enc),
                      icnt2, opnd_array(0)->as_Register(ra_,this)/* result */,
                      opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec */, as_Register(RCX_enc), StrIntrinsicNode::UL);
  }

28262#line 28262 "ad_x86.cpp"
}
28264}

28266void string_indexofLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp_vec
{
  C2_MacroAssembler _masm(&cbuf);

28278#line 11519 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_indexof(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                    opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */,
                    (-1), opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec */, as_Register(RCX_enc), StrIntrinsicNode::LL);

28285#line 28285 "ad_x86.cpp"
}
28287}

28289void string_indexofUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp_vec
{
  C2_MacroAssembler _masm(&cbuf);

28301#line 11536 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_indexof(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                    opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */,
                    (-1), opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec */, as_Register(RCX_enc), StrIntrinsicNode::UU);

28308#line 28308 "ad_x86.cpp"
}
28310}

28312void string_indexofULNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// str2
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// cnt2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp_vec
{
  C2_MacroAssembler _masm(&cbuf);

28324#line 11553 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_indexof(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* str2 */,
                    opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* cnt2 */,
                    (-1), opnd_array(0)->as_Register(ra_,this)/* result */,
                    opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec */, as_Register(RCX_enc), StrIntrinsicNode::UL);

28331#line 28331 "ad_x86.cpp"
}
28333}

28335void string_indexof_charNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// ch
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp_vec1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp_vec2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp_vec3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

28349#line 11569 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. string_indexof_char(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* ch */, opnd_array(0)->as_Register(ra_,this)/* result */,
                         opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp_vec1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp_vec3 */, opnd_array(7)->as_Register(ra_,this,idx7)/* tmp */);

28354#line 28354 "ad_x86.cpp"
}
28356}

28358void stringL_indexof_charNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// ch
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp_vec1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp_vec2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp_vec3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

28372#line 11583 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. stringL_indexof_char(opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* cnt1 */, opnd_array(3)->as_Register(ra_,this,idx3)/* ch */, opnd_array(0)->as_Register(ra_,this)/* result */,
                         opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp_vec1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp_vec2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp_vec3 */, opnd_array(7)->as_Register(ra_,this,idx7)/* tmp */);

28377#line 28377 "ad_x86.cpp"
}
28379}

28381void string_equalsNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// str2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cnt
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

28393#line 11599 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. arrays_equals(false, opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* str2 */,
                   opnd_array(3)->as_Register(ra_,this,idx3)/* cnt */, opnd_array(0)->as_Register(ra_,this)/* result */, as_Register(RBX_enc),
                   opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, false /* char */, knoreg);

28399#line 28399 "ad_x86.cpp"
}
28401}

28403void string_equals_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// str1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// str2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cnt
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

28416#line 11615 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. arrays_equals(false, opnd_array(1)->as_Register(ra_,this,idx1)/* str1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* str2 */,
                   opnd_array(3)->as_Register(ra_,this,idx3)/* cnt */, opnd_array(0)->as_Register(ra_,this)/* result */, as_Register(RBX_enc),
                   opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, false /* char */, opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp */);

28422#line 28422 "ad_x86.cpp"
}
28424}

28426void array_equalsBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// ary1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// ary2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

28437#line 11632 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. arrays_equals(true, opnd_array(1)->as_Register(ra_,this,idx1)/* ary1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* ary2 */,
                   as_Register(RCX_enc), opnd_array(0)->as_Register(ra_,this)/* result */, as_Register(RBX_enc),
                   opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, false /* char */, knoreg);

28443#line 28443 "ad_x86.cpp"
}
28445}

28447void array_equalsB_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// ary1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// ary2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

28459#line 11648 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. arrays_equals(true, opnd_array(1)->as_Register(ra_,this,idx1)/* ary1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* ary2 */,
                   as_Register(RCX_enc), opnd_array(0)->as_Register(ra_,this)/* result */, as_Register(RBX_enc),
                   opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, false /* char */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */);

28465#line 28465 "ad_x86.cpp"
}
28467}

28469void array_equalsCNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// ary1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// ary2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

28480#line 11664 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. arrays_equals(true, opnd_array(1)->as_Register(ra_,this,idx1)/* ary1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* ary2 */,
                   as_Register(RCX_enc), opnd_array(0)->as_Register(ra_,this)/* result */, as_Register(RBX_enc),
                   opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, true /* char */, knoreg);

28486#line 28486 "ad_x86.cpp"
}
28488}

28490void array_equalsC_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// ary1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// ary2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

28502#line 11680 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. arrays_equals(true, opnd_array(1)->as_Register(ra_,this,idx1)/* ary1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* ary2 */,
                   as_Register(RCX_enc), opnd_array(0)->as_Register(ra_,this)/* result */, as_Register(RBX_enc),
                   opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, true /* char */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */);

28508#line 28508 "ad_x86.cpp"
}
28510}

28512void has_negativesNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// ary1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// len
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

28523#line 11696 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. has_negatives(opnd_array(1)->as_Register(ra_,this,idx1)/* ary1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* len */,
                   opnd_array(0)->as_Register(ra_,this)/* result */, as_Register(RBX_enc),
                   opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, knoreg, knoreg);

28529#line 28529 "ad_x86.cpp"
}
28531}

28533void has_negatives_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// ary1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// len
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp2
{
  C2_MacroAssembler _masm(&cbuf);

28546#line 11712 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. has_negatives(opnd_array(1)->as_Register(ra_,this,idx1)/* ary1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* len */,
                   opnd_array(0)->as_Register(ra_,this)/* result */, as_Register(RBX_enc),
                   opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp1 */, opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp2 */);

28552#line 28552 "ad_x86.cpp"
}
28554}

28556void string_compressNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// len
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp4
{
  C2_MacroAssembler _masm(&cbuf);

28570#line 11729 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. char_array_compress(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* len */,
                         opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp3 */,
                         opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp4 */, as_Register(RCX_enc), opnd_array(0)->as_Register(ra_,this)/* result */,
                         knoreg, knoreg);

28577#line 28577 "ad_x86.cpp"
}
28579}

28581void string_compress_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// len
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp4
unsigned idx8 = idx7 + opnd_array(7)->num_edges(); 	// ktmp1
unsigned idx9 = idx8 + opnd_array(8)->num_edges(); 	// ktmp2
{
  C2_MacroAssembler _masm(&cbuf);

28597#line 11746 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. char_array_compress(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* len */,
                         opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp3 */,
                         opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp4 */, as_Register(RCX_enc), opnd_array(0)->as_Register(ra_,this)/* result */,
                         opnd_array(8)->as_KRegister(ra_,this,idx8)/* ktmp1 */, opnd_array(9)->as_KRegister(ra_,this,idx9)/* ktmp2 */);

28604#line 28604 "ad_x86.cpp"
}
28606}

28608void string_inflateNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// len
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

28620#line 11762 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. byte_array_inflate(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* len */,
                        opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_Register(ra_,this,idx5)/* tmp2 */, knoreg);

28625#line 28625 "ad_x86.cpp"
}
28627}

28629void string_inflate_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// len
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

28642#line 11776 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. byte_array_inflate(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* len */,
                        opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(6)->as_Register(ra_,this,idx6)/* tmp2 */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */);

28647#line 28647 "ad_x86.cpp"
}
28649}

28651void encode_iso_arrayNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// len
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp4
{
  C2_MacroAssembler _masm(&cbuf);

28665#line 11792 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. encode_iso_array(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* len */,
                      opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp3 */,
                      opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp4 */, as_Register(RCX_enc), opnd_array(0)->as_Register(ra_,this)/* result */, false);

28671#line 28671 "ad_x86.cpp"
}
28673}

28675void encode_ascii_arrayNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// len
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp4
{
  C2_MacroAssembler _masm(&cbuf);

28689#line 11809 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. encode_iso_array(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* len */,
                      opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp3 */,
                      opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp4 */, as_Register(RCX_enc), opnd_array(0)->as_Register(ra_,this)/* result */, true);

28695#line 28695 "ad_x86.cpp"
}
28697}

28699void overflowAddI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28708#line 11826 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

28712#line 28712 "ad_x86.cpp"
}
28714}

28716void overflowAddI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28725#line 11839 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constant());

28729#line 28729 "ad_x86.cpp"
}
28731}

28733void overflowAddL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28742#line 11851 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

28746#line 28746 "ad_x86.cpp"
}
28748}

28750void overflowAddL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28759#line 11863 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. addq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constantL());

28763#line 28763 "ad_x86.cpp"
}
28765}

28767void overflowSubI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28776#line 11874 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

28780#line 28780 "ad_x86.cpp"
}
28782}

28784void overflowSubI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28793#line 11885 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constant());

28797#line 28797 "ad_x86.cpp"
}
28799}

28801void overflowSubL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28810#line 11896 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

28814#line 28814 "ad_x86.cpp"
}
28816}

28818void overflowSubL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28827#line 11907 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constantL());

28831#line 28831 "ad_x86.cpp"
}
28833}

28835void overflowNegI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28844#line 11919 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. negl(opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

28848#line 28848 "ad_x86.cpp"
}
28850}

28852void overflowNegL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28861#line 11931 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. negq(opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

28865#line 28865 "ad_x86.cpp"
}
28867}

28869void overflowMulI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28878#line 11943 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imull(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

28882#line 28882 "ad_x86.cpp"
}
28884}

28886void overflowMulI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

28896#line 11955 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imull(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constant());

28900#line 28900 "ad_x86.cpp"
}
28902}

28904void overflowMulL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28913#line 11967 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imulq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

28917#line 28917 "ad_x86.cpp"
}
28919}

28921void overflowMulL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

28931#line 11979 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. imulq(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constantL());

28935#line 28935 "ad_x86.cpp"
}
28937}

28939void compI_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28948#line 11996 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

28952#line 28952 "ad_x86.cpp"
}
28954}

28956void compI_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28965#line 12007 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constant());

28969#line 28969 "ad_x86.cpp"
}
28971}

28973void compI_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

28982#line 12019 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

28986#line 28986 "ad_x86.cpp"
}
28988}

28990void testI_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

28999#line 12030 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testl(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

29003#line 29003 "ad_x86.cpp"
}
29005}

29007void testI_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29017#line 12041 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testl(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->constant());

29021#line 29021 "ad_x86.cpp"
}
29023}

29025void testI_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29035#line 12052 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testl(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

29039#line 29039 "ad_x86.cpp"
}
29041}

29043void testI_reg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29053#line 12052 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testl(opnd_array(2)->as_Register(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

29057#line 29057 "ad_x86.cpp"
}
29059}

29061void compU_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29070#line 12065 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

29074#line 29074 "ad_x86.cpp"
}
29076}

29078void compU_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29087#line 12076 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constant());

29091#line 29091 "ad_x86.cpp"
}
29093}

29095void compU_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29104#line 12088 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

29108#line 29108 "ad_x86.cpp"
}
29110}

29112void testU_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29121#line 12110 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testl(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

29125#line 29125 "ad_x86.cpp"
}
29127}

29129void compP_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29138#line 12121 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

29142#line 29142 "ad_x86.cpp"
}
29144}

29146void compP_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29155#line 12134 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

29159#line 29159 "ad_x86.cpp"
}
29161}

29163void compP_mem_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29172#line 12162 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

29176#line 29176 "ad_x86.cpp"
}
29178}

29180void testP_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29189#line 12175 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

29193#line 29193 "ad_x86.cpp"
}
29195}

29197void testP_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// op
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29206#line 12191 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), 0xFFFFFFFF);

29210#line 29210 "ad_x86.cpp"
}
29212}

29214void testP_mem_reg0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29223#line 12204 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(r12, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

29227#line 29227 "ad_x86.cpp"
}
29229}

29231void compN_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29240#line 12215 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
29241___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */); 
29242#line 29242 "ad_x86.cpp"
}
29244}

29246void compN_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

29255#line 12224 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

29259#line 29259 "ad_x86.cpp"
}
29261}

29263void compN_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29272#line 12234 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmp_narrow_oop(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, (jobject)opnd_array(2)->constant());

29276#line 29276 "ad_x86.cpp"
}
29278}

29280void compN_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

29289#line 12245 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmp_narrow_oop(Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), (jobject)opnd_array(1)->constant());

29293#line 29293 "ad_x86.cpp"
}
29295}

29297void compN_rReg_imm_klassNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29306#line 12255 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmp_narrow_klass(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, (Klass*)opnd_array(2)->constant());

29310#line 29310 "ad_x86.cpp"
}
29312}

29314void compN_mem_imm_klassNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

29323#line 12266 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmp_narrow_klass(Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), (Klass*)opnd_array(1)->constant());

29327#line 29327 "ad_x86.cpp"
}
29329}

29331void testN_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29340#line 12276 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
29341___masm. testl(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */); 
29342#line 29342 "ad_x86.cpp"
}
29344}

29346void testN_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29355#line 12287 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), (int)0xFFFFFFFF);

29359#line 29359 "ad_x86.cpp"
}
29361}

29363void testN_mem_reg0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29372#line 12299 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpl(r12, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

29376#line 29376 "ad_x86.cpp"
}
29378}

29380void compL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29389#line 12313 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

29393#line 29393 "ad_x86.cpp"
}
29395}

29397void compL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29406#line 12324 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constantL());

29410#line 29410 "ad_x86.cpp"
}
29412}

29414void compL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29423#line 12335 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

29427#line 29427 "ad_x86.cpp"
}
29429}

29431void testL_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29440#line 12346 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

29444#line 29444 "ad_x86.cpp"
}
29446}

29448void testL_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29458#line 12357 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(2)->constantL());

29462#line 29462 "ad_x86.cpp"
}
29464}

29466void testL_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29476#line 12368 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

29480#line 29480 "ad_x86.cpp"
}
29482}

29484void testL_reg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29494#line 12368 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(opnd_array(2)->as_Register(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

29498#line 29498 "ad_x86.cpp"
}
29500}

29502void testL_reg_mem2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29512#line 12379 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

29516#line 29516 "ad_x86.cpp"
}
29518}

29520void testL_reg_mem2_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29530#line 12379 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(opnd_array(2)->as_Register(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

29534#line 29534 "ad_x86.cpp"
}
29536}

29538void cmpL3_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

29547#line 12399 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label done;
  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* src2 */);
  ___masm. movl(opnd_array(0)->as_Register(ra_,this)/* dst */, -1);
  ___masm. jccb(Assembler::less, done)jccb_0(Assembler::less, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12403);
  ___masm. setne(opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. bind(done);

29557#line 29557 "ad_x86.cpp"
}
29559}

29561void compUL_rRegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29570#line 12418 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->as_Register(ra_,this,idx2)/* op2 */);

29574#line 29574 "ad_x86.cpp"
}
29576}

29578void compUL_rReg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29587#line 12429 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, opnd_array(2)->constantL());

29591#line 29591 "ad_x86.cpp"
}
29593}

29595void compUL_rReg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// op1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// op2
{
  C2_MacroAssembler _masm(&cbuf);

29604#line 12440 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmpq(opnd_array(1)->as_Register(ra_,this,idx1)/* op1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

29608#line 29608 "ad_x86.cpp"
}
29610}

29612void testUL_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29621#line 12451 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. testq(opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

29625#line 29625 "ad_x86.cpp"
}
29627}

29629void compB_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm
{
  C2_MacroAssembler _masm(&cbuf);

29638#line 12463 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
29639___masm. cmpb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant()); 
29640#line 29640 "ad_x86.cpp"
}
29642}

29644void testUB_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29654#line 12473 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
29655___masm. testb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant()); 
29656#line 29656 "ad_x86.cpp"
}
29658}

29660void testB_mem_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// imm
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

29670#line 12483 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
29671___masm. testb(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant()); 
29672#line 29672 "ad_x86.cpp"
}
29674}

29676void cmovI_reg_gNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29686#line 12495 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovl(Assembler::greater, opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

29690#line 29690 "ad_x86.cpp"
}
29692}

29694void cmovI_reg_lNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cr
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29704#line 12519 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. cmovl(Assembler::less, opnd_array(1)->as_Register(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* src */);

29708#line 29708 "ad_x86.cpp"
}
29710}

29712void jmpDirNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29720#line 12550 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(1)->label();
  ___masm. jmp(*L, false); // Always long jump

29725#line 29725 "ad_x86.cpp"
}
29727}

29729uint jmpDirNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 5, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 5)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29729, "assert(" "VerifyOops || MachNode::size(ra_) <= 5"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 5);
29732}

29734void jmpConNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29744#line 12566 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jcc((Assembler::Condition)(opnd_array(1)->ccode()), *L, false); // Always long jump

29749#line 29749 "ad_x86.cpp"
}
29751}

29753uint jmpConNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 6, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 6)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29753, "assert(" "VerifyOops || MachNode::size(ra_) <= 6"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 6);
29756}

29758void jmpLoopEndNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29768#line 12583 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jcc((Assembler::Condition)(opnd_array(1)->ccode()), *L, false); // Always long jump

29773#line 29773 "ad_x86.cpp"
}
29775}

29777uint jmpLoopEndNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 6, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 6)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29777, "assert(" "VerifyOops || MachNode::size(ra_) <= 6"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 6);
29780}

29782void jmpLoopEndUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29792#line 12599 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jcc((Assembler::Condition)(opnd_array(1)->ccode()), *L, false); // Always long jump

29797#line 29797 "ad_x86.cpp"
}
29799}

29801uint jmpLoopEndUNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 6, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 6)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29801, "assert(" "VerifyOops || MachNode::size(ra_) <= 6"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 6);
29804}

29806void jmpLoopEndUCFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29816#line 12614 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jcc((Assembler::Condition)(opnd_array(1)->ccode()), *L, false); // Always long jump

29821#line 29821 "ad_x86.cpp"
}
29823}

29825uint jmpLoopEndUCFNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 6, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 6)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29825, "assert(" "VerifyOops || MachNode::size(ra_) <= 6"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 6);
29828}

29830void jmpLoopEnd_and_restoreMaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// ktmp
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// labl
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29841#line 12635 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(4)->label();
  ___masm. jcc((Assembler::Condition)(opnd_array(1)->ccode()), *L, false); // Always long jump
  ___masm. restorevectmask(opnd_array(3)->as_KRegister(ra_,this,idx3)/* ktmp */);

29847#line 29847 "ad_x86.cpp"
}
29849}

29851uint jmpLoopEnd_and_restoreMaskNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 10, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 10)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29851, "assert(" "VerifyOops || MachNode::size(ra_) <= 10"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 10);
29854}

29856void jmpLoopEndU_and_restoreMaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// ktmp
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// labl
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29867#line 12655 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(4)->label();
  ___masm. jcc((Assembler::Condition)(opnd_array(1)->ccode()), *L, false); // Always long jump
  ___masm. restorevectmask(opnd_array(3)->as_KRegister(ra_,this,idx3)/* ktmp */);

29873#line 29873 "ad_x86.cpp"
}
29875}

29877uint jmpLoopEndU_and_restoreMaskNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 10, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 10)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29877, "assert(" "VerifyOops || MachNode::size(ra_) <= 10"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 10);
29880}

29882void jmpLoopEndUCF_and_restoreMaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// ktmp
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// labl
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29893#line 12674 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(4)->label();
  ___masm. jcc((Assembler::Condition)(opnd_array(1)->ccode()), *L, false); // Always long jump
  ___masm. restorevectmask(opnd_array(3)->as_KRegister(ra_,this,idx3)/* ktmp */);

29899#line 29899 "ad_x86.cpp"
}
29901}

29903uint jmpLoopEndUCF_and_restoreMaskNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 10, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 10)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29903, "assert(" "VerifyOops || MachNode::size(ra_) <= 10"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 10);
29906}

29908void jmpConUNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29918#line 12690 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jcc((Assembler::Condition)(opnd_array(1)->ccode()), *L, false); // Always long jump

29923#line 29923 "ad_x86.cpp"
}
29925}

29927uint jmpConUNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 6, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 6)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29927, "assert(" "VerifyOops || MachNode::size(ra_) <= 6"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 6);
29930}

29932void jmpConUCFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29942#line 12704 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jcc((Assembler::Condition)(opnd_array(1)->ccode()), *L, false); // Always long jump

29947#line 29947 "ad_x86.cpp"
}
29949}

29951uint jmpConUCFNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 6, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 6)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 29951, "assert(" "VerifyOops || MachNode::size(ra_) <= 6"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 6);
29954}

29956void jmpConUCF2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

29966#line 12726 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* l = opnd_array(3)->label();
  if (opnd_array(1)->ccode()== Assembler::notEqual) {
    ___masm. jcc(Assembler::parity, *l, false);
    ___masm. jcc(Assembler::notEqual, *l, false);
  } else if (opnd_array(1)->ccode()== Assembler::equal) {
    Label done;
    ___masm. jccb(Assembler::parity, done)jccb_0(Assembler::parity, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12733);
    ___masm. jcc(Assembler::equal, *l, false);
    ___masm. bind(done);
  } else {
     ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12737); ::breakpoint(); } while (0);
  }

29981#line 29981 "ad_x86.cpp"
}
29983}

29985void partialSubtypeCheckNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// sub
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// super
{

29993#line 2105 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rrdi = as_Register(RDI_enc); // result register
  Register Rrax = as_Register(RAX_enc); // super class
  Register Rrcx = as_Register(RCX_enc); // killed
  Register Rrsi = as_Register(RSI_enc); // sub class
  Label miss;
  const bool set_cond_codes = true;

  MacroAssembler _masm(&cbuf);
  ___masm. check_klass_subtype_slow_path(Rrsi, Rrax, Rrcx, Rrdi,
                                   NULL__null, &miss,
                                   /*set_cond_codes:*/ true);
  if ((0x1 /*primary()*/)) {
    ___masm. xorptr(Rrdi, Rrdi);
  }
  ___masm. bind(miss);

30011#line 30011 "ad_x86.cpp"
}
30013}

30015void partialSubtypeCheck_vs_ZeroNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// sub
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// super
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{

30024#line 2105 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Register Rrdi = as_Register(RDI_enc); // result register
  Register Rrax = as_Register(RAX_enc); // super class
  Register Rrcx = as_Register(RCX_enc); // killed
  Register Rrsi = as_Register(RSI_enc); // sub class
  Label miss;
  const bool set_cond_codes = true;

  MacroAssembler _masm(&cbuf);
  ___masm. check_klass_subtype_slow_path(Rrsi, Rrax, Rrcx, Rrdi,
                                   NULL__null, &miss,
                                   /*set_cond_codes:*/ true);
  if ((0x0 /*primary()*/)) {
    ___masm. xorptr(Rrdi, Rrdi);
  }
  ___masm. bind(miss);

30042#line 30042 "ad_x86.cpp"
}
30044}

30046void jmpDir_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30054#line 12814 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(1)->label();
  ___masm. jmpb(*L)jmpb_0(*L, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12816);

30059#line 30059 "ad_x86.cpp"
}
30061}

30063uint jmpDir_shortNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 2, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30063, "assert(" "VerifyOops || MachNode::size(ra_) <= 2"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 2);
30066}

30068void jmpCon_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30078#line 12830 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()), *L)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()), *L,
 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12832);

30083#line 30083 "ad_x86.cpp"
}
30085}

30087uint jmpCon_shortNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 2, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30087, "assert(" "VerifyOops || MachNode::size(ra_) <= 2"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 2);
30090}

30092void jmpLoopEnd_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30102#line 12846 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()), *L)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()), *L,
 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12848);

30107#line 30107 "ad_x86.cpp"
}
30109}

30111uint jmpLoopEnd_shortNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 2, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30111, "assert(" "VerifyOops || MachNode::size(ra_) <= 2"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 2);
30114}

30116void jmpLoopEndU_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30126#line 12862 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()), *L)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()), *L,
 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12864);

30131#line 30131 "ad_x86.cpp"
}
30133}

30135uint jmpLoopEndU_shortNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 2, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30135, "assert(" "VerifyOops || MachNode::size(ra_) <= 2"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 2);
30138}

30140void jmpLoopEndUCF_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30150#line 12877 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()), *L)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()), *L,
 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12879);

30155#line 30155 "ad_x86.cpp"
}
30157}

30159uint jmpLoopEndUCF_shortNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 2, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30159, "assert(" "VerifyOops || MachNode::size(ra_) <= 2"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 2);
30162}

30164void jmpConU_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30174#line 12893 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()), *L)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()), *L,
 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12895);

30179#line 30179 "ad_x86.cpp"
}
30181}

30183uint jmpConU_shortNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 2, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30183, "assert(" "VerifyOops || MachNode::size(ra_) <= 2"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 2);
30186}

30188void jmpConUCF_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30198#line 12908 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* L = opnd_array(3)->label();
  ___masm. jccb((Assembler::Condition)(opnd_array(1)->ccode()), *L)jccb_0((Assembler::Condition)(opnd_array(1)->ccode()), *L,
 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12910);

30203#line 30203 "ad_x86.cpp"
}
30205}

30207uint jmpConUCF_shortNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 2, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 2)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30207, "assert(" "VerifyOops || MachNode::size(ra_) <= 2"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 2);
30210}

30212void jmpConUCF2_shortNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cmp
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// labl
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30222#line 12932 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  Label* l = opnd_array(3)->label();
  if (opnd_array(1)->ccode()== Assembler::notEqual) {
    ___masm. jccb(Assembler::parity, *l)jccb_0(Assembler::parity, *l, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12935);
    ___masm. jccb(Assembler::notEqual, *l)jccb_0(Assembler::notEqual, *l, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12936);
  } else if (opnd_array(1)->ccode()== Assembler::equal) {
    Label done;
    ___masm. jccb(Assembler::parity, done)jccb_0(Assembler::parity, done, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12939);
    ___masm. jccb(Assembler::equal, *l)jccb_0(Assembler::equal, *l, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12940);
    ___masm. bind(done);
  } else {
     ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 12943); ::breakpoint(); } while (0);
  }

30237#line 30237 "ad_x86.cpp"
}
30239}

30241uint jmpConUCF2_shortNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 4, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 4)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30241, "assert(" "VerifyOops || MachNode::size(ra_) <= 4"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 4);
30244}

30246void cmpFastLockRTMNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// object
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// box
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scr
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// cx1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// cx2
{
  C2_MacroAssembler _masm(&cbuf);

30259#line 12959 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. fast_lock(opnd_array(1)->as_Register(ra_,this,idx1)/* object */, opnd_array(2)->as_Register(ra_,this,idx2)/* box */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */,
               opnd_array(4)->as_Register(ra_,this,idx4)/* scr */, opnd_array(5)->as_Register(ra_,this,idx5)/* cx1 */, opnd_array(6)->as_Register(ra_,this,idx6)/* cx2 */,
               _rtm_counters, _stack_rtm_counters,
               ((Method*)(ra_->C->method()->constant_encoding()))->method_data(),
               true, ra_->C->profile_rtm());

30267#line 30267 "ad_x86.cpp"
}
30269}

30271void cmpFastLockNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// object
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// box
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scr
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// cx1
{
  C2_MacroAssembler _masm(&cbuf);

30283#line 12975 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. fast_lock(opnd_array(1)->as_Register(ra_,this,idx1)/* object */, opnd_array(2)->as_Register(ra_,this,idx2)/* box */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */,
               opnd_array(4)->as_Register(ra_,this,idx4)/* scr */, opnd_array(5)->as_Register(ra_,this,idx5)/* cx1 */, noreg, NULL__null, NULL__null, NULL__null, false, false);

30288#line 30288 "ad_x86.cpp"
}
30290}

30292void cmpFastUnlockNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// object
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// box
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

30302#line 12987 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. fast_unlock(opnd_array(1)->as_Register(ra_,this,idx1)/* object */, opnd_array(2)->as_Register(ra_,this,idx2)/* box */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, ra_->C->use_rtm());

30306#line 30306 "ad_x86.cpp"
}
30308}

30310void safePoint_poll_tlsNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 5;
unsigned idx1 = 5; 	// cr
{
  C2_MacroAssembler _masm(&cbuf);

30318#line 13005 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. relocate(relocInfo::poll_type);
  address pre_pc = ___masm. pc();
  ___masm. testl(rax, Address(opnd_array(1)->as_Register(ra_,this,idx1)/* poll */, 0));
  assert(nativeInstruction_at(pre_pc)->is_safepoint_poll(), "must emit test %%eax [reg]")do { if (!(nativeInstruction_at(pre_pc)->is_safepoint_poll
())) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 13009, "assert(" "nativeInstruction_at(pre_pc)->is_safepoint_poll()"
 ") failed", "must emit test %%eax [reg]"); ::breakpoint(); }
 } while (0);

30325#line 30325 "ad_x86.cpp"
}
30327}

30329uint safePoint_poll_tlsNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 4, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 4)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30329, "assert(" "VerifyOops || MachNode::size(ra_) <= 4"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 4);
30332}

30334void CallStaticJavaDirectNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{

30341#line 2123 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  debug_only(int off0 = cbuf.insts_size())int off0 = cbuf.insts_size();
  if (generate_vzeroupper(Compile::current())) {
    // Clear upper bits of YMM registers to avoid AVX <-> SSE transition penalty
    // Clear upper bits of YMM registers when current compiled code uses
    // wide vectors to avoid AVX <-> SSE transition penalty during call.
    MacroAssembler _masm(&cbuf);
    ___masm. vzeroupper();
  }
  debug_only(int off1 = cbuf.insts_size())int off1 = cbuf.insts_size();
  assert(off1 - off0 == clear_avx_size(), "correct size prediction")do { if (!(off1 - off0 == clear_avx_size())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2133, "assert(" "off1 - off0 == clear_avx_size()" ") failed"
, "correct size prediction"); ::breakpoint(); } } while (0);

30354#line 30354 "ad_x86.cpp"
}
{

30358#line 2157 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // JAVA STATIC CALL
  // CALL to fixup routine.  Fixup routine uses ScopeDesc info to
  // determine who we intended to call.
  cbuf.set_insts_mark();
  emit_d8(cbuf, (0xE8 /*primary()*/));

  if (!_method) {
    emit_d32_reloc(cbuf, (int) (opnd_array(1)->method() - ((intptr_t) cbuf.insts_end()) - 4),
                   runtime_call_Relocation::spec(),
                   RELOC_DISP32Assembler::disp32_operand);
  } else {
    int method_index = resolved_method_index(cbuf);
    RelocationHolder rspec = _optimized_virtual ? opt_virtual_call_Relocation::spec(method_index)
                                                : static_call_Relocation::spec(method_index);
    emit_d32_reloc(cbuf, (int) (opnd_array(1)->method() - ((intptr_t) cbuf.insts_end()) - 4),
                   rspec, RELOC_DISP32Assembler::disp32_operand);
    // Emit stubs for static call.
    address mark = cbuf.insts_mark();
    address stub = CompiledStaticCall::emit_to_interp_stub(cbuf, mark);
    if (stub == NULL__null) {
      ciEnv::current()->record_failure("CodeCache is full");
      return;
    }
  }

30385#line 30385 "ad_x86.cpp"
}
{

30389#line 2588 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  if (VerifyStackAtCalls) {
    // Check that stack depth is unchanged: find majik cookie on stack
    int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
    C2_MacroAssembler _masm(&cbuf);
    Label L;
    ___masm. cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
    ___masm. jccb(Assembler::equal, L)jccb_0(Assembler::equal, L, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 2595);
    // Die if stack mismatch
    ___masm. int3();
    ___masm. bind(L);
  }

30403#line 30403 "ad_x86.cpp"
}
30405}

30407void CallDynamicJavaDirectNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{

30414#line 2123 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  debug_only(int off0 = cbuf.insts_size())int off0 = cbuf.insts_size();
  if (generate_vzeroupper(Compile::current())) {
    // Clear upper bits of YMM registers to avoid AVX <-> SSE transition penalty
    // Clear upper bits of YMM registers when current compiled code uses
    // wide vectors to avoid AVX <-> SSE transition penalty during call.
    MacroAssembler _masm(&cbuf);
    ___masm. vzeroupper();
  }
  debug_only(int off1 = cbuf.insts_size())int off1 = cbuf.insts_size();
  assert(off1 - off0 == clear_avx_size(), "correct size prediction")do { if (!(off1 - off0 == clear_avx_size())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2133, "assert(" "off1 - off0 == clear_avx_size()" ") failed"
, "correct size prediction"); ::breakpoint(); } } while (0);

30427#line 30427 "ad_x86.cpp"
}
{

30431#line 2184 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  MacroAssembler _masm(&cbuf);
  ___masm. ic_call((address)opnd_array(1)->method(), resolved_method_index(cbuf));

30436#line 30436 "ad_x86.cpp"
}
{

30440#line 2588 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  if (VerifyStackAtCalls) {
    // Check that stack depth is unchanged: find majik cookie on stack
    int framesize = ra_->reg2offset_unchecked(OptoReg::add(ra_->_matcher._old_SP, -3*VMRegImpl::slots_per_word));
    C2_MacroAssembler _masm(&cbuf);
    Label L;
    ___masm. cmpptr(Address(rsp, framesize), (int32_t)0xbadb100d);
    ___masm. jccb(Assembler::equal, L)jccb_0(Assembler::equal, L, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 2595);
    // Die if stack mismatch
    ___masm. int3();
    ___masm. bind(L);
  }

30454#line 30454 "ad_x86.cpp"
}
30456}

30458void CallRuntimeDirectNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{

30465#line 2123 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  debug_only(int off0 = cbuf.insts_size())int off0 = cbuf.insts_size();
  if (generate_vzeroupper(Compile::current())) {
    // Clear upper bits of YMM registers to avoid AVX <-> SSE transition penalty
    // Clear upper bits of YMM registers when current compiled code uses
    // wide vectors to avoid AVX <-> SSE transition penalty during call.
    MacroAssembler _masm(&cbuf);
    ___masm. vzeroupper();
  }
  debug_only(int off1 = cbuf.insts_size())int off1 = cbuf.insts_size();
  assert(off1 - off0 == clear_avx_size(), "correct size prediction")do { if (!(off1 - off0 == clear_avx_size())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2133, "assert(" "off1 - off0 == clear_avx_size()" ") failed"
, "correct size prediction"); ::breakpoint(); } } while (0);

30478#line 30478 "ad_x86.cpp"
}
{

30482#line 2136 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // No relocation needed
  MacroAssembler _masm(&cbuf);
  ___masm. mov64(r10, (int64_t) opnd_array(1)->method());
  ___masm. call(r10);

30489#line 30489 "ad_x86.cpp"
}
30491}

30493void CallLeafDirectNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{

30500#line 2123 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  debug_only(int off0 = cbuf.insts_size())int off0 = cbuf.insts_size();
  if (generate_vzeroupper(Compile::current())) {
    // Clear upper bits of YMM registers to avoid AVX <-> SSE transition penalty
    // Clear upper bits of YMM registers when current compiled code uses
    // wide vectors to avoid AVX <-> SSE transition penalty during call.
    MacroAssembler _masm(&cbuf);
    ___masm. vzeroupper();
  }
  debug_only(int off1 = cbuf.insts_size())int off1 = cbuf.insts_size();
  assert(off1 - off0 == clear_avx_size(), "correct size prediction")do { if (!(off1 - off0 == clear_avx_size())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2133, "assert(" "off1 - off0 == clear_avx_size()" ") failed"
, "correct size prediction"); ::breakpoint(); } } while (0);

30513#line 30513 "ad_x86.cpp"
}
{

30517#line 2136 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // No relocation needed
  MacroAssembler _masm(&cbuf);
  ___masm. mov64(r10, (int64_t) opnd_array(1)->method());
  ___masm. call(r10);

30524#line 30524 "ad_x86.cpp"
}
30526}

30528void CallLeafDirectVectorNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{

30535#line 2136 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // No relocation needed
  MacroAssembler _masm(&cbuf);
  ___masm. mov64(r10, (int64_t) opnd_array(1)->method());
  ___masm. call(r10);

30542#line 30542 "ad_x86.cpp"
}
30544}

30546void CallNativeDirectNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{

30553#line 2123 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  debug_only(int off0 = cbuf.insts_size())int off0 = cbuf.insts_size();
  if (generate_vzeroupper(Compile::current())) {
    // Clear upper bits of YMM registers to avoid AVX <-> SSE transition penalty
    // Clear upper bits of YMM registers when current compiled code uses
    // wide vectors to avoid AVX <-> SSE transition penalty during call.
    MacroAssembler _masm(&cbuf);
    ___masm. vzeroupper();
  }
  debug_only(int off1 = cbuf.insts_size())int off1 = cbuf.insts_size();
  assert(off1 - off0 == clear_avx_size(), "correct size prediction")do { if (!(off1 - off0 == clear_avx_size())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2133, "assert(" "off1 - off0 == clear_avx_size()" ") failed"
, "correct size prediction"); ::breakpoint(); } } while (0);

30566#line 30566 "ad_x86.cpp"
}
{

30570#line 2136 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // No relocation needed
  MacroAssembler _masm(&cbuf);
  ___masm. mov64(r10, (int64_t) opnd_array(1)->method());
  ___masm. call(r10);

30577#line 30577 "ad_x86.cpp"
}
30579}

30581void CallLeafNoFPDirectNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{

30588#line 2123 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  debug_only(int off0 = cbuf.insts_size())int off0 = cbuf.insts_size();
  if (generate_vzeroupper(Compile::current())) {
    // Clear upper bits of YMM registers to avoid AVX <-> SSE transition penalty
    // Clear upper bits of YMM registers when current compiled code uses
    // wide vectors to avoid AVX <-> SSE transition penalty during call.
    MacroAssembler _masm(&cbuf);
    ___masm. vzeroupper();
  }
  debug_only(int off1 = cbuf.insts_size())int off1 = cbuf.insts_size();
  assert(off1 - off0 == clear_avx_size(), "correct size prediction")do { if (!(off1 - off0 == clear_avx_size())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2133, "assert(" "off1 - off0 == clear_avx_size()" ") failed"
, "correct size prediction"); ::breakpoint(); } } while (0);

30601#line 30601 "ad_x86.cpp"
}
{

30605#line 2136 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  // No relocation needed
  MacroAssembler _masm(&cbuf);
  ___masm. mov64(r10, (int64_t) opnd_array(1)->method());
  ___masm. call(r10);

30612#line 30612 "ad_x86.cpp"
}
30614}

30616void RetNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 5;
unsigned idx1 = 5; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30624#line 13116 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. ret(0);

30628#line 30628 "ad_x86.cpp"
}
30630}

30632void TailCalljmpIndNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 5;
unsigned idx1 = 5; 	// method_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30641#line 13132 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. jmp(opnd_array(1)->as_Register(ra_,this,idx1)/* jump_target */);

30645#line 30645 "ad_x86.cpp"
}
30647}

30649void tailjmpIndNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 5;
unsigned idx1 = 5; 	// ex_oop
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30658#line 13147 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  ___masm. popq(as_Register(RDX_enc));
  ___masm. jmp(opnd_array(1)->as_Register(ra_,this,idx1)/* jump_target */);

30663#line 30663 "ad_x86.cpp"
}
30665}

30667void CreateExceptionNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
30673}

30675uint CreateExceptionNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30675, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
30678}

30680void RethrowExceptionNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 5;
unsigned idx1 = 5; 	// 
{

30687#line 2723 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  cbuf.set_insts_mark();
  emit_opcode(cbuf, 0xE9); // jmp entry
  emit_d32_reloc(cbuf,
                 (int) (OptoRuntime::rethrow_stub() - cbuf.insts_end() - 4),
                 runtime_call_Relocation::spec(),
                 RELOC_DISP32Assembler::disp32_operand);

30696#line 30696 "ad_x86.cpp"
}
30698}

30700void tlsLoadPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
// User did not define which encode class to use.
30706}

30708uint tlsLoadPNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 30708, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
30711}

30713void ShouldNotReachHereNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 5;
unsigned idx1 = 5; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

30721#line 2769 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  if (is_reachable()) {
    ___masm. stop(_halt_reason);
  }

30727#line 30727 "ad_x86.cpp"
}
30729}

30731void setMaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

30740#line 2788 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. setvectmask(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, as_KRegister(K1_enc));

30744#line 30744 "ad_x86.cpp"
}
30746}

30748void addF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

30757#line 2802 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

30761#line 30761 "ad_x86.cpp"
}
30763}

30765void addF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

30774#line 2814 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

30778#line 30778 "ad_x86.cpp"
}
30780}

30782void addF_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

30791#line 2814 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addss(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

30795#line 30795 "ad_x86.cpp"
}
30797}

30799void addF_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

30808#line 2825 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

30812#line 30812 "ad_x86.cpp"
}
30814}

30816void addF_immNode::eval_constant(Compile* C) {
{

30819#line 2826 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
30821#line 30821 "ad_x86.cpp"
}
30823}
30824void addF_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

30833#line 2837 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vaddss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

30837#line 30837 "ad_x86.cpp"
}
30839}

30841void addF_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

30850#line 2849 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vaddss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

30854#line 30854 "ad_x86.cpp"
}
30856}

30858void addF_reg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src2
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
{
  C2_MacroAssembler _masm(&cbuf);

30867#line 2849 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vaddss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src1 */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

30871#line 30871 "ad_x86.cpp"
}
30873}

30875void addF_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

30884#line 2861 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vaddss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

30888#line 30888 "ad_x86.cpp"
}
30890}

30892void addF_reg_immNode::eval_constant(Compile* C) {
{

30895#line 2862 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
30897#line 30897 "ad_x86.cpp"
}
30899}
30900void addD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

30909#line 2873 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

30913#line 30913 "ad_x86.cpp"
}
30915}

30917void addD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

30926#line 2885 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

30930#line 30930 "ad_x86.cpp"
}
30932}

30934void addD_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

30943#line 2885 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addsd(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

30947#line 30947 "ad_x86.cpp"
}
30949}

30951void addD_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

30960#line 2896 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

30964#line 30964 "ad_x86.cpp"
}
30966}

30968void addD_immNode::eval_constant(Compile* C) {
{

30971#line 2897 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
30973#line 30973 "ad_x86.cpp"
}
30975}
30976void addD_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

30985#line 2908 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vaddsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

30989#line 30989 "ad_x86.cpp"
}
30991}

30993void addD_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31002#line 2920 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vaddsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31006#line 31006 "ad_x86.cpp"
}
31008}

31010void addD_reg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src2
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
{
  C2_MacroAssembler _masm(&cbuf);

31019#line 2920 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vaddsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src1 */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

31023#line 31023 "ad_x86.cpp"
}
31025}

31027void addD_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31036#line 2932 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vaddsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31040#line 31040 "ad_x86.cpp"
}
31042}

31044void addD_reg_immNode::eval_constant(Compile* C) {
{

31047#line 2933 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31049#line 31049 "ad_x86.cpp"
}
31051}
31052void subF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31061#line 2944 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. subss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

31065#line 31065 "ad_x86.cpp"
}
31067}

31069void subF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31078#line 2956 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. subss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31082#line 31082 "ad_x86.cpp"
}
31084}

31086void subF_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31095#line 2967 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. subss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31099#line 31099 "ad_x86.cpp"
}
31101}

31103void subF_immNode::eval_constant(Compile* C) {
{

31106#line 2968 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31108#line 31108 "ad_x86.cpp"
}
31110}
31111void subF_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31120#line 2979 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vsubss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

31124#line 31124 "ad_x86.cpp"
}
31126}

31128void subF_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31137#line 2991 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vsubss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31141#line 31141 "ad_x86.cpp"
}
31143}

31145void subF_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31154#line 3003 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vsubss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31158#line 31158 "ad_x86.cpp"
}
31160}

31162void subF_reg_immNode::eval_constant(Compile* C) {
{

31165#line 3004 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31167#line 31167 "ad_x86.cpp"
}
31169}
31170void subD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31179#line 3015 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. subsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

31183#line 31183 "ad_x86.cpp"
}
31185}

31187void subD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31196#line 3027 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. subsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31200#line 31200 "ad_x86.cpp"
}
31202}

31204void subD_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31213#line 3038 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. subsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31217#line 31217 "ad_x86.cpp"
}
31219}

31221void subD_immNode::eval_constant(Compile* C) {
{

31224#line 3039 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31226#line 31226 "ad_x86.cpp"
}
31228}
31229void subD_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31238#line 3050 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vsubsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

31242#line 31242 "ad_x86.cpp"
}
31244}

31246void subD_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31255#line 3062 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vsubsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31259#line 31259 "ad_x86.cpp"
}
31261}

31263void subD_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31272#line 3074 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vsubsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31276#line 31276 "ad_x86.cpp"
}
31278}

31280void subD_reg_immNode::eval_constant(Compile* C) {
{

31283#line 3075 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31285#line 31285 "ad_x86.cpp"
}
31287}
31288void mulF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31297#line 3086 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

31301#line 31301 "ad_x86.cpp"
}
31303}

31305void mulF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31314#line 3098 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31318#line 31318 "ad_x86.cpp"
}
31320}

31322void mulF_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

31331#line 3098 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulss(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

31335#line 31335 "ad_x86.cpp"
}
31337}

31339void mulF_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31348#line 3109 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31352#line 31352 "ad_x86.cpp"
}
31354}

31356void mulF_immNode::eval_constant(Compile* C) {
{

31359#line 3110 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31361#line 31361 "ad_x86.cpp"
}
31363}
31364void mulF_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31373#line 3121 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vmulss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

31377#line 31377 "ad_x86.cpp"
}
31379}

31381void mulF_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31390#line 3133 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vmulss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31394#line 31394 "ad_x86.cpp"
}
31396}

31398void mulF_reg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src2
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
{
  C2_MacroAssembler _masm(&cbuf);

31407#line 3133 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vmulss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src1 */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

31411#line 31411 "ad_x86.cpp"
}
31413}

31415void mulF_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31424#line 3145 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vmulss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31428#line 31428 "ad_x86.cpp"
}
31430}

31432void mulF_reg_immNode::eval_constant(Compile* C) {
{

31435#line 3146 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31437#line 31437 "ad_x86.cpp"
}
31439}
31440void mulD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31449#line 3157 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

31453#line 31453 "ad_x86.cpp"
}
31455}

31457void mulD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31466#line 3169 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31470#line 31470 "ad_x86.cpp"
}
31472}

31474void mulD_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

31483#line 3169 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulsd(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

31487#line 31487 "ad_x86.cpp"
}
31489}

31491void mulD_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31500#line 3180 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31504#line 31504 "ad_x86.cpp"
}
31506}

31508void mulD_immNode::eval_constant(Compile* C) {
{

31511#line 3181 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31513#line 31513 "ad_x86.cpp"
}
31515}
31516void mulD_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31525#line 3192 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vmulsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

31529#line 31529 "ad_x86.cpp"
}
31531}

31533void mulD_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31542#line 3204 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vmulsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31546#line 31546 "ad_x86.cpp"
}
31548}

31550void mulD_reg_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src2
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
{
  C2_MacroAssembler _masm(&cbuf);

31559#line 3204 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vmulsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src1 */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

31563#line 31563 "ad_x86.cpp"
}
31565}

31567void mulD_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31576#line 3216 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vmulsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31580#line 31580 "ad_x86.cpp"
}
31582}

31584void mulD_reg_immNode::eval_constant(Compile* C) {
{

31587#line 3217 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31589#line 31589 "ad_x86.cpp"
}
31591}
31592void divF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31601#line 3228 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. divss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

31605#line 31605 "ad_x86.cpp"
}
31607}

31609void divF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31618#line 3240 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. divss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31622#line 31622 "ad_x86.cpp"
}
31624}

31626void divF_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31635#line 3251 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. divss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31639#line 31639 "ad_x86.cpp"
}
31641}

31643void divF_immNode::eval_constant(Compile* C) {
{

31646#line 3252 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31648#line 31648 "ad_x86.cpp"
}
31650}
31651void divF_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31660#line 3263 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vdivss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

31664#line 31664 "ad_x86.cpp"
}
31666}

31668void divF_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31677#line 3275 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vdivss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31681#line 31681 "ad_x86.cpp"
}
31683}

31685void divF_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31694#line 3287 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vdivss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31698#line 31698 "ad_x86.cpp"
}
31700}

31702void divF_reg_immNode::eval_constant(Compile* C) {
{

31705#line 3288 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31707#line 31707 "ad_x86.cpp"
}
31709}
31710void divD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31719#line 3299 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. divsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

31723#line 31723 "ad_x86.cpp"
}
31725}

31727void divD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31736#line 3311 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. divsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31740#line 31740 "ad_x86.cpp"
}
31742}

31744void divD_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31753#line 3322 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. divsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31757#line 31757 "ad_x86.cpp"
}
31759}

31761void divD_immNode::eval_constant(Compile* C) {
{

31764#line 3323 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31766#line 31766 "ad_x86.cpp"
}
31768}
31769void divD_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31778#line 3334 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vdivsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);

31782#line 31782 "ad_x86.cpp"
}
31784}

31786void divD_reg_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

31795#line 3346 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vdivsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()));

31799#line 31799 "ad_x86.cpp"
}
31801}

31803void divD_reg_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// con
{
  C2_MacroAssembler _masm(&cbuf);

31812#line 3358 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vdivsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, InternalAddress(___masm. code()->consts()->start() + constant_offset()));

31816#line 31816 "ad_x86.cpp"
}
31818}

31820void divD_reg_immNode::eval_constant(Compile* C) {
{

31823#line 3359 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(2));
31825#line 31825 "ad_x86.cpp"
}
31827}
31828void absF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

31836#line 3369 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. andps(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, ExternalAddress(float_signmask()));

31840#line 31840 "ad_x86.cpp"
}
31842}

31844void absF_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31852#line 3380 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = Assembler::AVX_128bit;
  ___masm. vandps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */,
            ExternalAddress(float_signmask()), vlen_enc);

31858#line 31858 "ad_x86.cpp"
}
31860}

31862void absD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

31870#line 3394 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. andpd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, ExternalAddress(double_signmask()));

31874#line 31874 "ad_x86.cpp"
}
31876}

31878void absD_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31886#line 3406 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = Assembler::AVX_128bit;
  ___masm. vandpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */,
            ExternalAddress(double_signmask()), vlen_enc);

31892#line 31892 "ad_x86.cpp"
}
31894}

31896void negF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

31904#line 3419 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. xorps(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, ExternalAddress(float_signflip()));

31908#line 31908 "ad_x86.cpp"
}
31910}

31912void negF_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31920#line 3430 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vnegatess(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */,
               ExternalAddress(float_signflip()));

31925#line 31925 "ad_x86.cpp"
}
31927}

31929void negD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

31937#line 3443 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. xorpd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, ExternalAddress(double_signflip()));

31941#line 31941 "ad_x86.cpp"
}
31943}

31945void negD_reg_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

31953#line 3455 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vnegatesd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */,
               ExternalAddress(double_signflip()));

31958#line 31958 "ad_x86.cpp"
}
31960}

31962void sqrtF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

31970#line 3468 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. sqrtss(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */);

31974#line 31974 "ad_x86.cpp"
}
31976}

31978void sqrtD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

31986#line 3480 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. sqrtsd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */);

31990#line 31990 "ad_x86.cpp"
}
31992}

31994void reinterpret_maskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

32002#line 3494 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  // empty

32006#line 32006 "ad_x86.cpp"
}
32008}

32010void reinterpret_mask_W2BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

32019#line 3509 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

   int src_sz = Matcher::vector_length(this, opnd_array(1))*type2aelembytes(T_SHORT);
   int dst_sz = Matcher::vector_length(this)*type2aelembytes(T_BYTE);
   assert(src_sz == dst_sz , "src and dst size mismatch")do { if (!(src_sz == dst_sz)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3512, "assert(" "src_sz == dst_sz" ") failed", "src and dst size mismatch"
); ::breakpoint(); } } while (0);
   int vlen_enc = vector_length_encoding(src_sz);
   ___masm.  evpmovm2w(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* xtmp */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src */, vlen_enc);
   ___masm.  evpmovb2m(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* xtmp */, vlen_enc);

32028#line 32028 "ad_x86.cpp"
}
32030}

32032void reinterpret_mask_D2BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

32041#line 3530 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

   int src_sz = Matcher::vector_length(this, opnd_array(1))*type2aelembytes(T_INT);
   int dst_sz = Matcher::vector_length(this)*type2aelembytes(T_BYTE);
   assert(src_sz == dst_sz , "src and dst size mismatch")do { if (!(src_sz == dst_sz)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3533, "assert(" "src_sz == dst_sz" ") failed", "src and dst size mismatch"
); ::breakpoint(); } } while (0);
   int vlen_enc = vector_length_encoding(src_sz);
   ___masm.  evpmovm2d(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* xtmp */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src */, vlen_enc);
   ___masm.  evpmovb2m(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* xtmp */, vlen_enc);

32050#line 32050 "ad_x86.cpp"
}
32052}

32054void reinterpret_mask_Q2BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

32063#line 3551 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

   int src_sz = Matcher::vector_length(this, opnd_array(1))*type2aelembytes(T_LONG);
   int dst_sz = Matcher::vector_length(this)*type2aelembytes(T_BYTE);
   assert(src_sz == dst_sz , "src and dst size mismatch")do { if (!(src_sz == dst_sz)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3554, "assert(" "src_sz == dst_sz" ") failed", "src and dst size mismatch"
); ::breakpoint(); } } while (0);
   int vlen_enc = vector_length_encoding(src_sz);
   ___masm.  evpmovm2q(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* xtmp */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src */, vlen_enc);
   ___masm.  evpmovb2m(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* xtmp */, vlen_enc);

32072#line 32072 "ad_x86.cpp"
}
32074}

32076void reinterpretNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

32084#line 3568 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  // empty

32088#line 32088 "ad_x86.cpp"
}
32090}

32092void reinterpret_expandNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

32102#line 3581 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(Matcher::vector_length_in_bytes(this)       <= 16, "required")do { if (!(Matcher::vector_length_in_bytes(this) <= 16)) {
 (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3582, "assert(" "Matcher::vector_length_in_bytes(this) <= 16"
 ") failed", "required"); ::breakpoint(); } } while (0);
  assert(Matcher::vector_length_in_bytes(this, opnd_array(1)) <=  8, "required")do { if (!(Matcher::vector_length_in_bytes(this, opnd_array(1
)) <= 8)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3583, "assert(" "Matcher::vector_length_in_bytes(this, opnd_array(1)) <= 8"
 ") failed", "required"); ::breakpoint(); } } while (0);

  int src_vlen_in_bytes = Matcher::vector_length_in_bytes(this, opnd_array(1));
  if (src_vlen_in_bytes == 4) {
    ___masm. movdqu(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, ExternalAddress(vector_32_bit_mask()), opnd_array(3)->as_Register(ra_,this,idx3)/* scratch */);
  } else {
    assert(src_vlen_in_bytes == 8, "")do { if (!(src_vlen_in_bytes == 8)) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3589, "assert(" "src_vlen_in_bytes == 8" ") failed", ""); ::
breakpoint(); } } while (0);
    ___masm. movdqu(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, ExternalAddress(vector_64_bit_mask()), opnd_array(3)->as_Register(ra_,this,idx3)/* scratch */);
  }
  ___masm. pand(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);

32116#line 32116 "ad_x86.cpp"
}
32118}

32120void vreinterpret_expand4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

32129#line 3606 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. vpand(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, ExternalAddress(vector_32_bit_mask()), 0, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);

32133#line 32133 "ad_x86.cpp"
}
32135}

32137void vreinterpret_expandNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

32145#line 3621 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  switch (Matcher::vector_length_in_bytes(this, opnd_array(1))) {
    case  8: ___masm. movq   (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */); break;
    case 16: ___masm. movdqu (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */); break;
    case 32: ___masm. vmovdqu(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */); break;
    default: ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 3626
); ::breakpoint(); } while (0);
  }

32154#line 32154 "ad_x86.cpp"
}
32156}

32158void reinterpret_shrinkNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

32166#line 3638 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  switch (Matcher::vector_length_in_bytes(this)) {
    case  4: ___masm. movfltz(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */); break;
    case  8: ___masm. movq   (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */); break;
    case 16: ___masm. movdqu (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */); break;
    case 32: ___masm. vmovdqu(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */); break;
    default: ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 3644
); ::breakpoint(); } while (0);
  }

32176#line 32176 "ad_x86.cpp"
}
32178}

32180void roundD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rmode
{
  C2_MacroAssembler _masm(&cbuf);

32189#line 3657 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3658, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);
  ___masm. roundsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());

32194#line 32194 "ad_x86.cpp"
}
32196}

32198void roundD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rmode
{
  C2_MacroAssembler _masm(&cbuf);

32207#line 3668 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3669, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);
  ___masm. roundsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant());

32212#line 32212 "ad_x86.cpp"
}
32214}

32216void roundD_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rmode
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// scratch_reg
{
  C2_MacroAssembler _masm(&cbuf);

32226#line 3680 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3681, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);
  ___masm. roundsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, InternalAddress(___masm. code()->consts()->start() + constant_offset()), opnd_array(2)->constant(), opnd_array(3)->as_Register(ra_,this,idx3)/* scratch_reg */);

32231#line 32231 "ad_x86.cpp"
}
32233}

32235void roundD_immNode::eval_constant(Compile* C) {
{

32238#line 3682 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(1));
32240#line 32240 "ad_x86.cpp"
}
32242}
32243void vroundD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rmode
{
  C2_MacroAssembler _masm(&cbuf);

32252#line 3691 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3692, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vroundpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), vlen_enc);

32258#line 32258 "ad_x86.cpp"
}
32260}

32262void vround8D_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rmode
{
  C2_MacroAssembler _masm(&cbuf);

32271#line 3703 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3704, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  ___masm. vrndscalepd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), Assembler::AVX_512bit);

32276#line 32276 "ad_x86.cpp"
}
32278}

32280void vroundD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rmode
{
  C2_MacroAssembler _masm(&cbuf);

32289#line 3714 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3715, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vroundpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant(), vlen_enc);

32295#line 32295 "ad_x86.cpp"
}
32297}

32299void vround8D_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// rmode
{
  C2_MacroAssembler _masm(&cbuf);

32308#line 3726 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3727, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  ___masm. vrndscalepd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->constant(), Assembler::AVX_512bit);

32313#line 32313 "ad_x86.cpp"
}
32315}

32317void onspinwaitNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// 
{
  C2_MacroAssembler _masm(&cbuf);

32325#line 3742 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. pause();

32329#line 32329 "ad_x86.cpp"
}
32331}

32333void fmaD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// c
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// a
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// b
{
  C2_MacroAssembler _masm(&cbuf);

32343#line 3754 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. fmad(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* a */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */);

32347#line 32347 "ad_x86.cpp"
}
32349}

32351void fmaF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// c
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// a
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// b
{
  C2_MacroAssembler _masm(&cbuf);

32361#line 3766 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. fmaf(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* a */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */);

32365#line 32365 "ad_x86.cpp"
}
32367}

32369void MoveVec2LegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

32377#line 3778 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 3779
); ::breakpoint(); } while (0);

32381#line 32381 "ad_x86.cpp"
}
32383}

32385void MoveLeg2VecNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

32393#line 3787 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 3788
); ::breakpoint(); } while (0);

32397#line 32397 "ad_x86.cpp"
}
32399}

32401void loadVNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

32409#line 3800 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  switch (Matcher::vector_length_in_bytes(this)) {
    case  4: ___masm. movdl    (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc())); break;
    case  8: ___masm. movq     (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc())); break;
    case 16: ___masm. movdqu   (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc())); break;
    case 32: ___masm. vmovdqu  (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc())); break;
    case 64: ___masm. evmovdqul(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), Assembler::AVX_512bit); break;
    default: ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 3807
); ::breakpoint(); } while (0);
  }

32420#line 32420 "ad_x86.cpp"
}
32422}

32424void storeVNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

32433#line 3818 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  switch (Matcher::vector_length_in_bytes(this, opnd_array(2))) {
    case  4: ___masm. movdl    (Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */); break;
    case  8: ___masm. movq     (Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */); break;
    case 16: ___masm. movdqu   (Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */); break;
    case 32: ___masm. vmovdqu  (Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */); break;
    case 64: ___masm. evmovdqul(Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Assembler::AVX_512bit); break;
    default: ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 3825
); ::breakpoint(); } while (0);
  }

32444#line 32444 "ad_x86.cpp"
}
32446}

32448void gatherNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

32460#line 3840 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "sanity")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3841, "assert(" "UseAVX >= 2" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);

  assert(Matcher::vector_length_in_bytes(this) >= 16, "sanity")do { if (!(Matcher::vector_length_in_bytes(this) >= 16)) {
 (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3846, "assert(" "Matcher::vector_length_in_bytes(this) >= 16"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(!is_subword_type(elem_bt), "sanity")do { if (!(!is_subword_type(elem_bt))) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3847, "assert(" "!is_subword_type(elem_bt)" ") failed", "sanity"
); ::breakpoint(); } } while (0); // T_INT, T_LONG, T_FLOAT, T_DOUBLE

  if (vlen_enc == Assembler::AVX_128bit) {
    ___masm. movdqu(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* mask */, ExternalAddress(vector_all_bits_set()));
  } else {
    ___masm. vmovdqu(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* mask */, ExternalAddress(vector_all_bits_set()));
  }
  ___masm. lea(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. vgather(elem_bt, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* idx */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* mask */, vlen_enc);

32478#line 32478 "ad_x86.cpp"
}
32480}

32482void evgatherNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

32494#line 3865 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "sanity")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3866, "assert(" "UseAVX > 2" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);

  assert(!is_subword_type(elem_bt), "sanity")do { if (!(!is_subword_type(elem_bt))) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3871, "assert(" "!is_subword_type(elem_bt)" ") failed", "sanity"
); ::breakpoint(); } } while (0); // T_INT, T_LONG, T_FLOAT, T_DOUBLE

  ___masm. kmovwl(opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, ExternalAddress(vector_all_bits_set()), opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */);
  ___masm. lea(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. evgather(elem_bt, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* idx */, vlen_enc);

32507#line 32507 "ad_x86.cpp"
}
32509}

32511void evgather_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// dst
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

32524#line 3884 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "sanity")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3885, "assert(" "UseAVX > 2" ") failed", "sanity"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  assert(!is_subword_type(elem_bt), "sanity")do { if (!(!is_subword_type(elem_bt))) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3888, "assert(" "!is_subword_type(elem_bt)" ") failed", "sanity"
); ::breakpoint(); } } while (0); // T_INT, T_LONG, T_FLOAT, T_DOUBLE
  // Note: Since gather instruction partially updates the opmask register used
  // for predication hense moving mask operand to a temporary.
  ___masm. kmovwl(opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */);
  ___masm. vpxor(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* dst */, vlen_enc);
  ___masm. lea(opnd_array(6)->as_Register(ra_,this,idx6)/* tmp */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. evgather(elem_bt, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* dst */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, opnd_array(6)->as_Register(ra_,this,idx6)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* idx */, vlen_enc);

32537#line 32537 "ad_x86.cpp"
}
32539}

32541void scatterNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

32553#line 3907 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this, opnd_array(2));
  BasicType elem_bt = Matcher::vector_element_basic_type(this, opnd_array(2));

  assert(Matcher::vector_length_in_bytes(this, opnd_array(2)) >= 16, "sanity")do { if (!(Matcher::vector_length_in_bytes(this, opnd_array(2
)) >= 16)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3911, "assert(" "Matcher::vector_length_in_bytes(this, opnd_array(2)) >= 16"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(!is_subword_type(elem_bt), "sanity")do { if (!(!is_subword_type(elem_bt))) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3912, "assert(" "!is_subword_type(elem_bt)" ") failed", "sanity"
); ::breakpoint(); } } while (0); // T_INT, T_LONG, T_FLOAT, T_DOUBLE

  ___masm. kmovwl(opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, ExternalAddress(vector_all_bits_set()), opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */);
  ___masm. lea(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. evscatter(elem_bt, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* idx */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, vlen_enc);

32565#line 32565 "ad_x86.cpp"
}
32567}

32569void scatter_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// mask
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

32582#line 3925 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this, opnd_array(2));
  BasicType elem_bt = Matcher::vector_element_basic_type(this, opnd_array(2));
  assert(Matcher::vector_length_in_bytes(this, opnd_array(2)) >= 16, "sanity")do { if (!(Matcher::vector_length_in_bytes(this, opnd_array(2
)) >= 16)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3928, "assert(" "Matcher::vector_length_in_bytes(this, opnd_array(2)) >= 16"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(!is_subword_type(elem_bt), "sanity")do { if (!(!is_subword_type(elem_bt))) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3929, "assert(" "!is_subword_type(elem_bt)" ") failed", "sanity"
); ::breakpoint(); } } while (0); // T_INT, T_LONG, T_FLOAT, T_DOUBLE
  // Note: Since scatter instruction partially updates the opmask register used
  // for predication hense moving mask operand to a temporary.
  ___masm. kmovwl(opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */);
  ___masm. lea(opnd_array(6)->as_Register(ra_,this,idx6)/* tmp */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  ___masm. evscatter(elem_bt, opnd_array(6)->as_Register(ra_,this,idx6)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* idx */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, vlen_enc);

32594#line 32594 "ad_x86.cpp"
}
32596}

32598void ReplB_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

32606#line 3945 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen == 64 || VM_Version::supports_avx512vlbw()) { // AVX512VL for <512bit operands
    assert(VM_Version::supports_avx512bw(), "required")do { if (!(VM_Version::supports_avx512bw())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 3948, "assert(" "VM_Version::supports_avx512bw()" ") failed"
, "required"); ::breakpoint(); } } while (0); // 512-bit byte vectors assume AVX512BW
    int vlen_enc = vector_length_encoding(this);
    ___masm. evpbroadcastb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, vlen_enc);
  } else if (VM_Version::supports_avx2()) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. vpbroadcastb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  } else {
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. punpcklbw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
    ___masm. pshuflw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, 0x00);
    if (vlen >= 16) {
      ___masm. punpcklqdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
      if (vlen >= 32) {
        assert(vlen == 32, "sanity")do { if (!(vlen == 32)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3962, "assert(" "vlen == 32" ") failed", "sanity"); ::breakpoint
(); } } while (0);
        ___masm. vinserti128_high(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
      }
    }
  }

32630#line 32630 "ad_x86.cpp"
}
32632}

32634void ReplB_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

32642#line 3975 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpbroadcastb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

32647#line 32647 "ad_x86.cpp"
}
32649}

32651void ReplB_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
{
  C2_MacroAssembler _masm(&cbuf);

32659#line 3985 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  InternalAddress const_addr = InternalAddress(___masm. code()->consts()->start() + constant_offset());
  if (vlen == 4) {
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, const_addr);
  } else {
    ___masm. movq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, const_addr);
    if (vlen >= 16) {
      if (VM_Version::supports_avx2()) {
        int vlen_enc = vector_length_encoding(this);
        ___masm. vpbroadcastq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
      } else {
        assert(vlen == 16, "sanity")do { if (!(vlen == 16)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 3997, "assert(" "vlen == 16" ") failed", "sanity"); ::breakpoint
(); } } while (0);
        ___masm. punpcklqdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
      }
    }
  }

32678#line 32678 "ad_x86.cpp"
}
32680}

32682void ReplB_immNode::eval_constant(Compile* C) {
{

32685#line 3987 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, replicate8_imm(opnd_array(1)->constant(), 1));
32687#line 32687 "ad_x86.cpp"
}
32689}
32690void ReplB_zeroNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

32698#line 4010 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 16) {
    ___masm. pxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  } else {
    // Use vpxor since AVX512F does not have 512bit vxorpd (requires AVX512DQ).
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  }

32709#line 32709 "ad_x86.cpp"
}
32711}

32713void ReplS_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

32721#line 4028 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen == 32 || VM_Version::supports_avx512vlbw()) { // AVX512VL for <512bit operands
    assert(VM_Version::supports_avx512bw(), "required")do { if (!(VM_Version::supports_avx512bw())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4031, "assert(" "VM_Version::supports_avx512bw()" ") failed"
, "required"); ::breakpoint(); } } while (0); // 512-bit short vectors assume AVX512BW
    int vlen_enc = vector_length_encoding(this);
    ___masm. evpbroadcastw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, vlen_enc);
  } else if (VM_Version::supports_avx2()) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. vpbroadcastw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  } else {
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. pshuflw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, 0x00);
    if (vlen >= 8) {
      ___masm. punpcklqdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
      if (vlen >= 16) {
        assert(vlen == 16, "sanity")do { if (!(vlen == 16)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4044, "assert(" "vlen == 16" ") failed", "sanity"); ::breakpoint
(); } } while (0);
        ___masm. vinserti128_high(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
      }
    }
  }

32744#line 32744 "ad_x86.cpp"
}
32746}

32748void ReplS_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

32756#line 4057 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpbroadcastw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

32761#line 32761 "ad_x86.cpp"
}
32763}

32765void ReplS_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
{
  C2_MacroAssembler _masm(&cbuf);

32773#line 4067 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  InternalAddress const_addr = InternalAddress(___masm. code()->consts()->start() + constant_offset());
  if (vlen == 2) {
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, const_addr);
  } else {
    ___masm. movq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, const_addr);
    if (vlen >= 8) {
      if (VM_Version::supports_avx2()) {
        int vlen_enc = vector_length_encoding(this);
        ___masm. vpbroadcastw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
      } else {
        assert(vlen == 8, "sanity")do { if (!(vlen == 8)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4079, "assert(" "vlen == 8" ") failed", "sanity"); ::breakpoint
(); } } while (0);
        ___masm. punpcklqdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
      }
    }
  }

32792#line 32792 "ad_x86.cpp"
}
32794}

32796void ReplS_immNode::eval_constant(Compile* C) {
{

32799#line 4069 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, replicate8_imm(opnd_array(1)->constant(), 2));
32801#line 32801 "ad_x86.cpp"
}
32803}
32804void ReplS_zeroNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

32812#line 4091 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 8) {
    ___masm. pxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  }

32822#line 32822 "ad_x86.cpp"
}
32824}

32826void ReplI_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

32834#line 4108 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen == 16 || VM_Version::supports_avx512vl()) { // AVX512VL for <512bit operands
    int vlen_enc = vector_length_encoding(this);
    ___masm. evpbroadcastd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, vlen_enc);
  } else if (VM_Version::supports_avx2()) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. vpbroadcastd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  } else {
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. pshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, 0x00);
    if (vlen >= 8) {
      assert(vlen == 8, "sanity")do { if (!(vlen == 8)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4121, "assert(" "vlen == 8" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. vinserti128_high(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
    }
  }

32853#line 32853 "ad_x86.cpp"
}
32855}

32857void ReplI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

32865#line 4132 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 4) {
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
    ___masm. pshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, 0x00);
  } else {
    assert(VM_Version::supports_avx2(), "sanity")do { if (!(VM_Version::supports_avx2())) { (*g_assert_poison)
 = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4138, "assert(" "VM_Version::supports_avx2()" ") failed", "sanity"
); ::breakpoint(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpbroadcastd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);
  }

32877#line 32877 "ad_x86.cpp"
}
32879}

32881void ReplI_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
{
  C2_MacroAssembler _masm(&cbuf);

32889#line 4149 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  InternalAddress const_addr = InternalAddress(___masm. code()->consts()->start() + constant_offset());
  if (vlen <= 4) {
    ___masm. movq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, const_addr);
    if (vlen == 4) {
      ___masm. punpcklqdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
    }
  } else {
    assert(VM_Version::supports_avx2(), "sanity")do { if (!(VM_Version::supports_avx2())) { (*g_assert_poison)
 = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4158, "assert(" "VM_Version::supports_avx2()" ") failed", "sanity"
); ::breakpoint(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    ___masm. movq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, const_addr);
    ___masm. vpbroadcastd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  }

32905#line 32905 "ad_x86.cpp"
}
32907}

32909void ReplI_immNode::eval_constant(Compile* C) {
{

32912#line 4151 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, replicate8_imm(opnd_array(1)->constant(), 4));
32914#line 32914 "ad_x86.cpp"
}
32916}
32917void ReplI_zeroNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

32925#line 4171 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 4) {
    ___masm. pxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  }

32935#line 32935 "ad_x86.cpp"
}
32937}

32939void ReplI_M1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

32948#line 4190 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vector_len = vector_length_encoding(this);
  ___masm. vallones(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, vector_len);

32953#line 32953 "ad_x86.cpp"
}
32955}

32957void ReplI_M1_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

32966#line 4190 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vector_len = vector_length_encoding(this);
  ___masm. vallones(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, vector_len);

32971#line 32971 "ad_x86.cpp"
}
32973}

32975void ReplI_M1_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

32984#line 4190 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vector_len = vector_length_encoding(this);
  ___masm. vallones(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, vector_len);

32989#line 32989 "ad_x86.cpp"
}
32991}

32993void ReplL_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

33001#line 4204 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    ___masm. movdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. punpcklqdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  } else if (vlen == 8 || VM_Version::supports_avx512vl()) { // AVX512VL for <512bit operands
    int vlen_enc = vector_length_encoding(this);
    ___masm. evpbroadcastq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, vlen_enc);
  } else if (VM_Version::supports_avx2()) {
    assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4213, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    ___masm. movdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. vpbroadcastq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  } else {
    assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4218, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
    ___masm. movdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. punpcklqdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
    ___masm. vinserti128_high(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  }

33022#line 33022 "ad_x86.cpp"
}
33024}

33026void ReplL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

33034#line 4285 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    ___masm. movq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
    ___masm. punpcklqdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  } else {
    assert(VM_Version::supports_avx2(), "sanity")do { if (!(VM_Version::supports_avx2())) { (*g_assert_poison)
 = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4291, "assert(" "VM_Version::supports_avx2()" ") failed", "sanity"
); ::breakpoint(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpbroadcastq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);
  }

33046#line 33046 "ad_x86.cpp"
}
33048}

33050void ReplL_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
{
  C2_MacroAssembler _masm(&cbuf);

33058#line 4303 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  InternalAddress const_addr = InternalAddress(___masm. code()->consts()->start() + constant_offset());
  if (vlen == 2) {
    ___masm. movq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, const_addr);
    ___masm. punpcklqdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  } else {
    assert(VM_Version::supports_avx2(), "sanity")do { if (!(VM_Version::supports_avx2())) { (*g_assert_poison)
 = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4310, "assert(" "VM_Version::supports_avx2()" ") failed", "sanity"
); ::breakpoint(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    ___masm. movq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, const_addr);
    ___masm. vpbroadcastq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  }

33072#line 33072 "ad_x86.cpp"
}
33074}

33076void ReplL_immNode::eval_constant(Compile* C) {
{

33079#line 4305 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
  _constant = C->output()->constant_table().add(this, opnd_array(1));
33081#line 33081 "ad_x86.cpp"
}
33083}
33084void ReplL_zeroNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

33092#line 4322 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    ___masm. pxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  }

33102#line 33102 "ad_x86.cpp"
}
33104}

33106void ReplL_M1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// con
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

33115#line 4339 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vector_len = vector_length_encoding(this);
  ___masm. vallones(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, vector_len);

33120#line 33120 "ad_x86.cpp"
}
33122}

33124void ReplF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

33132#line 4351 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 4) {
    ___masm. pshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0x00);
 } else if (VM_Version::supports_avx2()) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vbroadcastss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc); // reg-to-reg variant requires AVX2
  } else {
    assert(vlen == 8, "sanity")do { if (!(vlen == 8)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4359, "assert(" "vlen == 8" ") failed", "sanity"); ::breakpoint
(); } } while (0);
    ___masm. pshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0x00);
    ___masm. vinsertf128_high(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  }

33146#line 33146 "ad_x86.cpp"
}
33148}

33150void ReplF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

33158#line 4370 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 4) {
    ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
    ___masm. pshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, 0x00);
  } else {
    assert(VM_Version::supports_avx(), "sanity")do { if (!(VM_Version::supports_avx())) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4376, "assert(" "VM_Version::supports_avx()" ") failed", "sanity"
); ::breakpoint(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    ___masm. vbroadcastss(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);
  }

33170#line 33170 "ad_x86.cpp"
}
33172}

33174void ReplF_zeroNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

33182#line 4387 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 4) {
    ___masm. xorps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */,opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc); // 512bit vxorps requires AVX512DQ
  }

33192#line 33192 "ad_x86.cpp"
}
33194}

33196void ReplD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

33204#line 4405 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    ___masm. pshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0x44);
  } else if (VM_Version::supports_avx2()) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vbroadcastsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc); // reg-to-reg variant requires AVX2
  } else {
    assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4413, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
    ___masm. pshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0x44);
    ___masm. vinsertf128_high(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  }

33218#line 33218 "ad_x86.cpp"
}
33220}

33222void ReplD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

33230#line 4424 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    ___masm. movq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
    ___masm. pshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, 0x44);
  } else {
    assert(VM_Version::supports_avx(), "sanity")do { if (!(VM_Version::supports_avx())) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4430, "assert(" "VM_Version::supports_avx()" ") failed", "sanity"
); ::breakpoint(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    ___masm. vbroadcastsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);
  }

33242#line 33242 "ad_x86.cpp"
}
33244}

33246void ReplD_zeroNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

33254#line 4441 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    ___masm. xorpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc); // 512bit vxorps requires AVX512DQ
  }

33264#line 33264 "ad_x86.cpp"
}
33266}

33268void insertNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
{
  C2_MacroAssembler _masm(&cbuf);

33278#line 4459 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4460, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);
  assert(Matcher::vector_length_in_bytes(this) >= 8, "required")do { if (!(Matcher::vector_length_in_bytes(this) >= 8)) { (
*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4461, "assert(" "Matcher::vector_length_in_bytes(this) >= 8"
 ") failed", "required"); ::breakpoint(); } } while (0);

  BasicType elem_bt = Matcher::vector_element_basic_type(this);

  assert(is_integral_type(elem_bt), "")do { if (!(is_integral_type(elem_bt))) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4465, "assert(" "is_integral_type(elem_bt)" ") failed", "")
; ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4466, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  ___masm. insert(elem_bt, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* val */, opnd_array(3)->constant());

33290#line 33290 "ad_x86.cpp"
}
33292}

33294void insert32Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

33305#line 4478 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = Assembler::AVX_256bit;
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  int elem_per_lane = 16/type2aelembytes(elem_bt);
  int log2epr = log2(elem_per_lane);

  assert(is_integral_type(elem_bt), "sanity")do { if (!(is_integral_type(elem_bt))) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4484, "assert(" "is_integral_type(elem_bt)" ") failed", "sanity"
); ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4485, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  uint x_idx = opnd_array(3)->constant()& right_n_bits(log2epr)((((log2epr) >= BitsPerWord) ? 0 : (OneBit << (log2epr
))) - 1);
  uint y_idx = (opnd_array(3)->constant()>> log2epr) & 1;
  ___masm. vextracti128(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, y_idx);
  ___masm. vinsert(elem_bt, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(2)->as_Register(ra_,this,idx2)/* val */, x_idx);
  ___masm. vinserti128(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, y_idx);

33321#line 33321 "ad_x86.cpp"
}
33323}

33325void insert64Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

33336#line 4501 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "sanity")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4502, "assert(" "UseAVX > 2" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  int elem_per_lane = 16/type2aelembytes(elem_bt);
  int log2epr = log2(elem_per_lane);

  assert(is_integral_type(elem_bt), "")do { if (!(is_integral_type(elem_bt))) { (*g_assert_poison) =
 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4508, "assert(" "is_integral_type(elem_bt)" ") failed", "")
; ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4509, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  uint x_idx = opnd_array(3)->constant()& right_n_bits(log2epr)((((log2epr) >= BitsPerWord) ? 0 : (OneBit << (log2epr
))) - 1);
  uint y_idx = (opnd_array(3)->constant()>> log2epr) & 3;
  ___masm. vextracti32x4(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, y_idx);
  ___masm. vinsert(elem_bt, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(2)->as_Register(ra_,this,idx2)/* val */, x_idx);
  ___masm. vinserti32x4(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, y_idx);

33353#line 33353 "ad_x86.cpp"
}
33355}

33357void insert2LNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
{
  C2_MacroAssembler _masm(&cbuf);

33367#line 4525 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4526, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);
  assert(Matcher::vector_element_basic_type(this) == T_LONG, "")do { if (!(Matcher::vector_element_basic_type(this) == T_LONG
)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4527, "assert(" "Matcher::vector_element_basic_type(this) == T_LONG"
 ") failed", ""); ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4528, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  ___masm. pinsrq(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* val */, opnd_array(3)->constant());

33375#line 33375 "ad_x86.cpp"
}
33377}

33379void insert4LNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

33390#line 4540 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(Matcher::vector_element_basic_type(this) == T_LONG, "")do { if (!(Matcher::vector_element_basic_type(this) == T_LONG
)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4541, "assert(" "Matcher::vector_element_basic_type(this) == T_LONG"
 ") failed", ""); ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4542, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  uint x_idx = opnd_array(3)->constant()& right_n_bits(1)((((1) >= BitsPerWord) ? 0 : (OneBit << (1))) - 1);
  uint y_idx = (opnd_array(3)->constant()>> 1) & 1;
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextracti128(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, y_idx);
  ___masm. vpinsrq(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(2)->as_Register(ra_,this,idx2)/* val */, x_idx);
  ___masm. vinserti128(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, y_idx);

33402#line 33402 "ad_x86.cpp"
}
33404}

33406void insert8LNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

33417#line 4559 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(Matcher::vector_element_basic_type(this) == T_LONG, "sanity")do { if (!(Matcher::vector_element_basic_type(this) == T_LONG
)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4560, "assert(" "Matcher::vector_element_basic_type(this) == T_LONG"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4561, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  uint x_idx = opnd_array(3)->constant()& right_n_bits(1)((((1) >= BitsPerWord) ? 0 : (OneBit << (1))) - 1);
  uint y_idx = (opnd_array(3)->constant()>> 1) & 3;
  ___masm. vextracti32x4(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, y_idx);
  ___masm. vpinsrq(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(2)->as_Register(ra_,this,idx2)/* val */, x_idx);
  ___masm. vinserti32x4(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, y_idx);

33428#line 33428 "ad_x86.cpp"
}
33430}

33432void insertFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
{
  C2_MacroAssembler _masm(&cbuf);

33442#line 4577 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "sanity")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4578, "assert(" "UseSSE >= 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  assert(Matcher::vector_element_basic_type(this) == T_FLOAT, "sanity")do { if (!(Matcher::vector_element_basic_type(this) == T_FLOAT
)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4580, "assert(" "Matcher::vector_element_basic_type(this) == T_FLOAT"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4581, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  ___masm. insertps(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* val */, opnd_array(3)->constant());

33451#line 33451 "ad_x86.cpp"
}
33453}

33455void vinsertFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

33466#line 4593 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(Matcher::vector_element_basic_type(this) == T_FLOAT, "sanity")do { if (!(Matcher::vector_element_basic_type(this) == T_FLOAT
)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4594, "assert(" "Matcher::vector_element_basic_type(this) == T_FLOAT"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4595, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  int vlen = Matcher::vector_length(this);
  uint x_idx = opnd_array(3)->constant()& right_n_bits(2)((((2) >= BitsPerWord) ? 0 : (OneBit << (2))) - 1);
  if (vlen == 8) {
    uint y_idx = (opnd_array(3)->constant()>> 2) & 1;
    int vlen_enc = Assembler::AVX_256bit;
    ___masm. vextracti128(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, y_idx);
    ___masm. vinsertps(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* val */, x_idx);
    ___masm. vinserti128(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, y_idx);
  } else {
    assert(vlen == 16, "sanity")do { if (!(vlen == 16)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4606, "assert(" "vlen == 16" ") failed", "sanity"); ::breakpoint
(); } } while (0);
    uint y_idx = (opnd_array(3)->constant()>> 2) & 3;
    ___masm. vextracti32x4(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, y_idx);
    ___masm. vinsertps(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* val */, x_idx);
    ___masm. vinserti32x4(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, y_idx);
  }

33487#line 33487 "ad_x86.cpp"
}
33489}

33491void insert2DNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

33502#line 4622 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "sanity")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4623, "assert(" "UseSSE >= 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
  assert(Matcher::vector_element_basic_type(this) == T_DOUBLE, "sanity")do { if (!(Matcher::vector_element_basic_type(this) == T_DOUBLE
)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4624, "assert(" "Matcher::vector_element_basic_type(this) == T_DOUBLE"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4625, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  ___masm. movq(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* val */);
  ___masm. pinsrq(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(3)->constant());

33511#line 33511 "ad_x86.cpp"
}
33513}

33515void insert4DNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

33527#line 4638 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(Matcher::vector_element_basic_type(this) == T_DOUBLE, "sanity")do { if (!(Matcher::vector_element_basic_type(this) == T_DOUBLE
)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4639, "assert(" "Matcher::vector_element_basic_type(this) == T_DOUBLE"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4640, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  uint x_idx = opnd_array(3)->constant()& right_n_bits(1)((((1) >= BitsPerWord) ? 0 : (OneBit << (1))) - 1);
  uint y_idx = (opnd_array(3)->constant()>> 1) & 1;
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. movq(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* val */);
  ___masm. vextracti128(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, y_idx);
  ___masm. vpinsrq(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, x_idx);
  ___masm. vinserti128(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp */, y_idx);

33540#line 33540 "ad_x86.cpp"
}
33542}

33544void insert8DNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// val
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// idx
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

33556#line 4658 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(Matcher::vector_element_basic_type(this) == T_DOUBLE, "sanity")do { if (!(Matcher::vector_element_basic_type(this) == T_DOUBLE
)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4659, "assert(" "Matcher::vector_element_basic_type(this) == T_DOUBLE"
 ") failed", "sanity"); ::breakpoint(); } } while (0);
  assert(opnd_array(3)->constant()< (int)Matcher::vector_length(this), "out of bounds")do { if (!(opnd_array(3)->constant()< (int)Matcher::vector_length
(this))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 4660, "assert(" "opnd_array(3)->constant()< (int)Matcher::vector_length(this)"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  uint x_idx = opnd_array(3)->constant()& right_n_bits(1)((((1) >= BitsPerWord) ? 0 : (OneBit << (1))) - 1);
  uint y_idx = (opnd_array(3)->constant()>> 1) & 3;
  ___masm. movq(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* val */);
  ___masm. vextracti32x4(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, y_idx);
  ___masm. vpinsrq(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, x_idx);
  ___masm. vinserti32x4(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp */, y_idx);

33568#line 33568 "ad_x86.cpp"
}
33570}

33572void reductionINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33583#line 4688 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceI(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33589#line 33589 "ad_x86.cpp"
}
33591}

33593void reductionI_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33604#line 4688 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceI(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33610#line 33610 "ad_x86.cpp"
}
33612}

33614void reductionI_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33625#line 4688 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceI(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33631#line 33631 "ad_x86.cpp"
}
33633}

33635void reductionI_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33646#line 4688 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceI(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33652#line 33652 "ad_x86.cpp"
}
33654}

33656void reductionI_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33667#line 4688 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceI(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33673#line 33673 "ad_x86.cpp"
}
33675}

33677void reductionI_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33688#line 4688 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceI(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33694#line 33694 "ad_x86.cpp"
}
33696}

33698void reductionI_5Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33709#line 4688 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceI(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33715#line 33715 "ad_x86.cpp"
}
33717}

33719void reductionLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33730#line 4710 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33736#line 33736 "ad_x86.cpp"
}
33738}

33740void reductionL_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33751#line 4710 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33757#line 33757 "ad_x86.cpp"
}
33759}

33761void reductionL_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33772#line 4710 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33778#line 33778 "ad_x86.cpp"
}
33780}

33782void reductionL_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33793#line 4710 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33799#line 33799 "ad_x86.cpp"
}
33801}

33803void reductionL_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33814#line 4710 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33820#line 33820 "ad_x86.cpp"
}
33822}

33824void reductionL_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33835#line 4710 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33841#line 33841 "ad_x86.cpp"
}
33843}

33845void reductionL_5Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33856#line 4710 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33862#line 33862 "ad_x86.cpp"
}
33864}

33866void reductionL_avx512dqNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33877#line 4729 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33883#line 33883 "ad_x86.cpp"
}
33885}

33887void reductionL_avx512dq_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33898#line 4729 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33904#line 33904 "ad_x86.cpp"
}
33906}

33908void reductionL_avx512dq_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33919#line 4729 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33925#line 33925 "ad_x86.cpp"
}
33927}

33929void reductionL_avx512dq_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33940#line 4729 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33946#line 33946 "ad_x86.cpp"
}
33948}

33950void reductionL_avx512dq_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33961#line 4729 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33967#line 33967 "ad_x86.cpp"
}
33969}

33971void reductionL_avx512dq_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

33982#line 4729 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

33988#line 33988 "ad_x86.cpp"
}
33990}

33992void reductionL_avx512dq_5Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34003#line 4729 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceL(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34009#line 34009 "ad_x86.cpp"
}
34011}

34013void reductionF128Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

34023#line 4746 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);

34029#line 34029 "ad_x86.cpp"
}
34031}

34033void reductionF128_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

34043#line 4746 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);

34049#line 34049 "ad_x86.cpp"
}
34051}

34053void reduction8FNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34064#line 4760 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34070#line 34070 "ad_x86.cpp"
}
34072}

34074void reduction8F_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34085#line 4760 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34091#line 34091 "ad_x86.cpp"
}
34093}

34095void reduction16FNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34106#line 4774 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34112#line 34112 "ad_x86.cpp"
}
34114}

34116void reduction16F_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34127#line 4774 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34133#line 34133 "ad_x86.cpp"
}
34135}

34137void reduction2DNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

34147#line 4790 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);

34153#line 34153 "ad_x86.cpp"
}
34155}

34157void reduction2D_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

34167#line 4790 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);

34173#line 34173 "ad_x86.cpp"
}
34175}

34177void reduction4DNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34188#line 4804 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34194#line 34194 "ad_x86.cpp"
}
34196}

34198void reduction4D_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34209#line 4804 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34215#line 34215 "ad_x86.cpp"
}
34217}

34219void reduction8DNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34230#line 4818 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34236#line 34236 "ad_x86.cpp"
}
34238}

34240void reduction8D_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34251#line 4818 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduce_fp(opcode, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34257#line 34257 "ad_x86.cpp"
}
34259}

34261void reductionBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34272#line 4839 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34278#line 34278 "ad_x86.cpp"
}
34280}

34282void reductionB_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34293#line 4839 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34299#line 34299 "ad_x86.cpp"
}
34301}

34303void reductionB_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34314#line 4839 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34320#line 34320 "ad_x86.cpp"
}
34322}

34324void reductionB_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34335#line 4839 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34341#line 34341 "ad_x86.cpp"
}
34343}

34345void reductionB_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34356#line 4839 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34362#line 34362 "ad_x86.cpp"
}
34364}

34366void reductionB_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34377#line 4839 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34383#line 34383 "ad_x86.cpp"
}
34385}

34387void reductionB_avx512bwNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34398#line 4857 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34404#line 34404 "ad_x86.cpp"
}
34406}

34408void reductionB_avx512bw_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34419#line 4857 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34425#line 34425 "ad_x86.cpp"
}
34427}

34429void reductionB_avx512bw_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34440#line 4857 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34446#line 34446 "ad_x86.cpp"
}
34448}

34450void reductionB_avx512bw_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34461#line 4857 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34467#line 34467 "ad_x86.cpp"
}
34469}

34471void reductionB_avx512bw_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34482#line 4857 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34488#line 34488 "ad_x86.cpp"
}
34490}

34492void reductionB_avx512bw_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34503#line 4857 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceB(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34509#line 34509 "ad_x86.cpp"
}
34511}

34513void reductionSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34524#line 4879 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceS(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34530#line 34530 "ad_x86.cpp"
}
34532}

34534void reductionS_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34545#line 4879 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceS(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34551#line 34551 "ad_x86.cpp"
}
34553}

34555void reductionS_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34566#line 4879 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceS(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34572#line 34572 "ad_x86.cpp"
}
34574}

34576void reductionS_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34587#line 4879 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceS(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34593#line 34593 "ad_x86.cpp"
}
34595}

34597void reductionS_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34608#line 4879 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceS(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34614#line 34614 "ad_x86.cpp"
}
34616}

34618void reductionS_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34629#line 4879 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceS(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34635#line 34635 "ad_x86.cpp"
}
34637}

34639void reductionS_5Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34650#line 4879 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceS(opcode, vlen, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);

34656#line 34656 "ad_x86.cpp"
}
34658}

34660void mul_reductionBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34672#line 4895 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. mulreduceB(opcode, vlen, opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */);

34678#line 34678 "ad_x86.cpp"
}
34680}

34682void mul_reduction64BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

34694#line 4909 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. mulreduceB(opcode, vlen, opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */);

34700#line 34700 "ad_x86.cpp"
}
34702}

34704void minmax_reduction2FNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// atmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// btmp
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// xmm_1
{
  C2_MacroAssembler _masm(&cbuf);

34718#line 4929 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4930, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceFloatMinMax(opcode, vlen, false, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */,
                       opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* atmp */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* btmp */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* xmm_1 */);

34727#line 34727 "ad_x86.cpp"
}
34729}

34731void minmax_reduction2F_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// atmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// btmp
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// xmm_1
{
  C2_MacroAssembler _masm(&cbuf);

34745#line 4929 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4930, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceFloatMinMax(opcode, vlen, false, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */,
                       opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* atmp */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* btmp */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* xmm_1 */);

34754#line 34754 "ad_x86.cpp"
}
34756}

34758void minmax_reductionFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// atmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// btmp
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// xmm_0
unsigned idx8 = idx7 + opnd_array(7)->num_edges(); 	// xmm_1
{
  C2_MacroAssembler _masm(&cbuf);

34773#line 4950 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4951, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceFloatMinMax(opcode, vlen, false, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */,
                       opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* atmp */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* btmp */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* xmm_0 */, opnd_array(8)->as_XMMRegister(ra_,this,idx8)/* xmm_1 */);

34782#line 34782 "ad_x86.cpp"
}
34784}

34786void minmax_reductionF_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// atmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// btmp
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// xmm_0
unsigned idx8 = idx7 + opnd_array(7)->num_edges(); 	// xmm_1
{
  C2_MacroAssembler _masm(&cbuf);

34801#line 4950 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4951, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceFloatMinMax(opcode, vlen, false, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */,
                       opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* atmp */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* btmp */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* xmm_0 */, opnd_array(8)->as_XMMRegister(ra_,this,idx8)/* xmm_1 */);

34810#line 34810 "ad_x86.cpp"
}
34812}

34814void minmax_reduction2F_avNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// xmm_1
{
  C2_MacroAssembler _masm(&cbuf);

34827#line 4969 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4970, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceFloatMinMax(opcode, vlen, true, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */,
                       opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* xmm_1 */);

34836#line 34836 "ad_x86.cpp"
}
34838}

34840void minmax_reduction2F_av_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// xmm_1
{
  C2_MacroAssembler _masm(&cbuf);

34853#line 4969 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4970, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceFloatMinMax(opcode, vlen, true, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */,
                       opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* xmm_1 */);

34862#line 34862 "ad_x86.cpp"
}
34864}

34866void minmax_reductionF_avNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// xmm_0
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// xmm_1
{
  C2_MacroAssembler _masm(&cbuf);

34880#line 4989 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4990, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceFloatMinMax(opcode, vlen, true, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */,
                       opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* xmm_0 */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* xmm_1 */);

34889#line 34889 "ad_x86.cpp"
}
34891}

34893void minmax_reductionF_av_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// xmm_0
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// xmm_1
{
  C2_MacroAssembler _masm(&cbuf);

34907#line 4989 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 4990, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceFloatMinMax(opcode, vlen, true, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */,
                       opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* xmm_0 */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* xmm_1 */);

34916#line 34916 "ad_x86.cpp"
}
34918}

34920void minmax_reduction2DNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp4
{
  C2_MacroAssembler _masm(&cbuf);

34934#line 5013 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5014, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceDoubleMinMax(opcode, vlen, false, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */,
                        opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp3 */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp4 */);

34943#line 34943 "ad_x86.cpp"
}
34945}

34947void minmax_reduction2D_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp4
{
  C2_MacroAssembler _masm(&cbuf);

34961#line 5013 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5014, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceDoubleMinMax(opcode, vlen, false, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */,
                        opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp3 */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp4 */);

34970#line 34970 "ad_x86.cpp"
}
34972}

34974void minmax_reductionDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp4
unsigned idx8 = idx7 + opnd_array(7)->num_edges(); 	// tmp5
{
  C2_MacroAssembler _masm(&cbuf);

34989#line 5035 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5036, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceDoubleMinMax(opcode, vlen, false, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */,
                        opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp3 */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp4 */, opnd_array(8)->as_XMMRegister(ra_,this,idx8)/* tmp5 */);

34998#line 34998 "ad_x86.cpp"
}
35000}

35002void minmax_reductionD_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp4
unsigned idx8 = idx7 + opnd_array(7)->num_edges(); 	// tmp5
{
  C2_MacroAssembler _masm(&cbuf);

35017#line 5035 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5036, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceDoubleMinMax(opcode, vlen, false, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */,
                        opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp3 */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp4 */, opnd_array(8)->as_XMMRegister(ra_,this,idx8)/* tmp5 */);

35026#line 35026 "ad_x86.cpp"
}
35028}

35030void minmax_reduction2D_avNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp3
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp4
{
  C2_MacroAssembler _masm(&cbuf);

35043#line 5056 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5057, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceDoubleMinMax(opcode, vlen, true, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */,
                        opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp3 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp4 */);

35052#line 35052 "ad_x86.cpp"
}
35054}

35056void minmax_reduction2D_av_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp3
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp4
{
  C2_MacroAssembler _masm(&cbuf);

35069#line 5056 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5057, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceDoubleMinMax(opcode, vlen, true, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */,
                        opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp3 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp4 */);

35078#line 35078 "ad_x86.cpp"
}
35080}

35082void minmax_reductionD_avNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp3
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp4
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp5
{
  C2_MacroAssembler _masm(&cbuf);

35096#line 5076 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5077, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceDoubleMinMax(opcode, vlen, true, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */,
                        opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp3 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp4 */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp5 */);

35105#line 35105 "ad_x86.cpp"
}
35107}

35109void minmax_reductionD_av_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp3
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// tmp4
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// tmp5
{
  C2_MacroAssembler _masm(&cbuf);

35123#line 5076 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "sanity")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5077, "assert(" "UseAVX > 0" ") failed", "sanity"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this, opnd_array(2));
  ___masm. reduceDoubleMinMax(opcode, vlen, true, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */,
                        opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp3 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* tmp4 */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* tmp5 */);

35132#line 35132 "ad_x86.cpp"
}
35134}

35136void vaddBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35145#line 5096 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. paddb(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35149#line 35149 "ad_x86.cpp"
}
35151}

35153void vaddB_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35162#line 5106 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35167#line 35167 "ad_x86.cpp"
}
35169}

35171void vaddB_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35180#line 5118 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35185#line 35185 "ad_x86.cpp"
}
35187}

35189void vaddB_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35198#line 5118 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

35203#line 35203 "ad_x86.cpp"
}
35205}

35207void vaddSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35216#line 5130 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. paddw(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35220#line 35220 "ad_x86.cpp"
}
35222}

35224void vaddS_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35233#line 5140 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35238#line 35238 "ad_x86.cpp"
}
35240}

35242void vaddS_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35251#line 5152 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35256#line 35256 "ad_x86.cpp"
}
35258}

35260void vaddS_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35269#line 5152 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

35274#line 35274 "ad_x86.cpp"
}
35276}

35278void vaddINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35287#line 5164 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. paddd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35291#line 35291 "ad_x86.cpp"
}
35293}

35295void vaddI_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35304#line 5174 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35309#line 35309 "ad_x86.cpp"
}
35311}

35313void vaddI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35322#line 5187 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35327#line 35327 "ad_x86.cpp"
}
35329}

35331void vaddI_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35340#line 5187 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

35345#line 35345 "ad_x86.cpp"
}
35347}

35349void vaddLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35358#line 5199 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. paddq(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35362#line 35362 "ad_x86.cpp"
}
35364}

35366void vaddL_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35375#line 5209 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35380#line 35380 "ad_x86.cpp"
}
35382}

35384void vaddL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35393#line 5221 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35398#line 35398 "ad_x86.cpp"
}
35400}

35402void vaddL_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35411#line 5221 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpaddq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

35416#line 35416 "ad_x86.cpp"
}
35418}

35420void vaddFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35429#line 5233 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addps(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35433#line 35433 "ad_x86.cpp"
}
35435}

35437void vaddF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35446#line 5243 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vaddps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35451#line 35451 "ad_x86.cpp"
}
35453}

35455void vaddF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35464#line 5255 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vaddps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35469#line 35469 "ad_x86.cpp"
}
35471}

35473void vaddF_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35482#line 5255 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vaddps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

35487#line 35487 "ad_x86.cpp"
}
35489}

35491void vaddDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35500#line 5267 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. addpd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35504#line 35504 "ad_x86.cpp"
}
35506}

35508void vaddD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35517#line 5277 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vaddpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35522#line 35522 "ad_x86.cpp"
}
35524}

35526void vaddD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35535#line 5289 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vaddpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35540#line 35540 "ad_x86.cpp"
}
35542}

35544void vaddD_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35553#line 5289 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vaddpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

35558#line 35558 "ad_x86.cpp"
}
35560}

35562void vsubBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35571#line 5303 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. psubb(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35575#line 35575 "ad_x86.cpp"
}
35577}

35579void vsubB_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35588#line 5313 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpsubb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35593#line 35593 "ad_x86.cpp"
}
35595}

35597void vsubB_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35606#line 5325 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpsubb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35611#line 35611 "ad_x86.cpp"
}
35613}

35615void vsubSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35624#line 5337 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. psubw(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35628#line 35628 "ad_x86.cpp"
}
35630}

35632void vsubS_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35641#line 5348 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpsubw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35646#line 35646 "ad_x86.cpp"
}
35648}

35650void vsubS_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35659#line 5360 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpsubw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35664#line 35664 "ad_x86.cpp"
}
35666}

35668void vsubINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35677#line 5372 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. psubd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35681#line 35681 "ad_x86.cpp"
}
35683}

35685void vsubI_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35694#line 5382 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpsubd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35699#line 35699 "ad_x86.cpp"
}
35701}

35703void vsubI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35712#line 5394 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpsubd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35717#line 35717 "ad_x86.cpp"
}
35719}

35721void vsubLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35730#line 5406 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. psubq(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35734#line 35734 "ad_x86.cpp"
}
35736}

35738void vsubL_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35747#line 5416 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpsubq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35752#line 35752 "ad_x86.cpp"
}
35754}

35756void vsubL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35765#line 5429 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpsubq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35770#line 35770 "ad_x86.cpp"
}
35772}

35774void vsubFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35783#line 5441 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. subps(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35787#line 35787 "ad_x86.cpp"
}
35789}

35791void vsubF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35800#line 5451 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vsubps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35805#line 35805 "ad_x86.cpp"
}
35807}

35809void vsubF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35818#line 5463 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vsubps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35823#line 35823 "ad_x86.cpp"
}
35825}

35827void vsubDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

35836#line 5475 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. subpd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

35840#line 35840 "ad_x86.cpp"
}
35842}

35844void vsubD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

35853#line 5485 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vsubpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

35858#line 35858 "ad_x86.cpp"
}
35860}

35862void vsubD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

35871#line 5497 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vsubpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

35876#line 35876 "ad_x86.cpp"
}
35878}

35880void mulB_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

35892#line 5513 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE > 3, "required")do { if (!(UseSSE > 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5514, "assert(" "UseSSE > 3" ") failed", "required"); ::breakpoint
(); } } while (0);
  ___masm. pmovsxbw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */);
  ___masm. pmovsxbw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);
  ___masm. pmullw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. pand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */);
  ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);

35902#line 35902 "ad_x86.cpp"
}
35904}

35906void mul16B_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

35919#line 5530 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE > 3, "required")do { if (!(UseSSE > 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5531, "assert(" "UseSSE > 3" ") failed", "required"); ::breakpoint
(); } } while (0);
  ___masm. pmovsxbw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */);
  ___masm. pmovsxbw(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);
  ___masm. pmullw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */);
  ___masm. pshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, 0xEE);
  ___masm. pshufd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, 0xEE);
  ___masm. pmovsxbw(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */);
  ___masm. pmovsxbw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. pmullw(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. pand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. pand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */);
  ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */);

35935#line 35935 "ad_x86.cpp"
}
35937}

35939void vmul16B_reg_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

35951#line 5553 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

int vlen_enc = Assembler::AVX_256bit;
  ___masm. vpmovsxbw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, vlen_enc);
  ___masm. vpmovsxbw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);
  ___masm. vpmullw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vmovdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, vlen_enc);
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, 0);

35962#line 35962 "ad_x86.cpp"
}
35964}

35966void vmul32B_reg_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

35979#line 5571 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 1, "required")do { if (!(UseAVX > 1)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5572, "assert(" "UseAVX > 1" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */);
  ___masm. vextracti128_high(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);
  ___masm. vpmovsxbw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, vlen_enc);
  ___masm. vpmovsxbw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpmullw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpmovsxbw(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, vlen_enc);
  ___masm. vpmovsxbw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);
  ___masm. vpmullw(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vmovdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vpbroadcastd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, vlen_enc);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, vlen_enc);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0xD8, vlen_enc);

35998#line 35998 "ad_x86.cpp"
}
36000}

36002void vmul64B_reg_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

36015#line 5597 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5598, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = Assembler::AVX_512bit;
  ___masm. vextracti64x4_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */);
  ___masm. vextracti64x4_high(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);
  ___masm. vpmovsxbw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, vlen_enc);
  ___masm. vpmovsxbw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpmullw(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpmovsxbw(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, vlen_enc);
  ___masm. vpmovsxbw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);
  ___masm. vpmullw(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vmovdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vpbroadcastd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, vlen_enc);
  ___masm. evmovdquq(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, ExternalAddress(vector_byte_perm_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);

36035#line 36035 "ad_x86.cpp"
}
36037}

36039void vmulSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36048#line 5624 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. pmullw(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

36052#line 36052 "ad_x86.cpp"
}
36054}

36056void vmulS_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36065#line 5634 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmullw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36070#line 36070 "ad_x86.cpp"
}
36072}

36074void vmulS_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

36083#line 5646 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmullw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

36088#line 36088 "ad_x86.cpp"
}
36090}

36092void vmulS_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36101#line 5646 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmullw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

36106#line 36106 "ad_x86.cpp"
}
36108}

36110void vmulINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36119#line 5658 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE > 3, "required")do { if (!(UseSSE > 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5659, "assert(" "UseSSE > 3" ") failed", "required"); ::breakpoint
(); } } while (0);
  ___masm. pmulld(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

36124#line 36124 "ad_x86.cpp"
}
36126}

36128void vmulI_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36137#line 5669 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmulld(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36142#line 36142 "ad_x86.cpp"
}
36144}

36146void vmulI_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

36155#line 5681 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmulld(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

36160#line 36160 "ad_x86.cpp"
}
36162}

36164void vmulI_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36173#line 5681 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmulld(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

36178#line 36178 "ad_x86.cpp"
}
36180}

36182void vmulL_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36191#line 5693 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5694, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmullq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36197#line 36197 "ad_x86.cpp"
}
36199}

36201void vmulL_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

36210#line 5706 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5707, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmullq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

36216#line 36216 "ad_x86.cpp"
}
36218}

36220void vmulL_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36229#line 5706 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5707, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmullq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

36235#line 36235 "ad_x86.cpp"
}
36237}

36239void mul2L_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

36249#line 5726 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(VM_Version::supports_sse4_1(), "required")do { if (!(VM_Version::supports_sse4_1())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 5727, "assert(" "VM_Version::supports_sse4_1()" ") failed",
 "required"); ::breakpoint(); } } while (0);
  int vlen_enc = Assembler::AVX_128bit;
  ___masm. pshufd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, 177);
  ___masm. pmulld(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */);
  ___masm. phaddd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */);
  ___masm. pmovzxdq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */);
  ___masm. psllq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, 32);
  ___masm. pmuludq(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */);
  ___masm. paddq(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */);

36261#line 36261 "ad_x86.cpp"
}
36263}

36265void vmul4L_reg_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
{
  C2_MacroAssembler _masm(&cbuf);

36276#line 5751 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vpshufd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, 177, vlen_enc);
  ___masm. vpmulld(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, vlen_enc);
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */);
  ___masm. vphaddd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, vlen_enc);
  ___masm. vpmovzxdq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, vlen_enc);
  ___masm. vpsllq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, 32, vlen_enc);
  ___masm. vpmuludq(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);
  ___masm. vpaddq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, vlen_enc);

36288#line 36288 "ad_x86.cpp"
}
36290}

36292void vmulFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36301#line 5770 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulps(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

36305#line 36305 "ad_x86.cpp"
}
36307}

36309void vmulF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36318#line 5780 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vmulps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36323#line 36323 "ad_x86.cpp"
}
36325}

36327void vmulF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

36336#line 5792 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vmulps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

36341#line 36341 "ad_x86.cpp"
}
36343}

36345void vmulF_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36354#line 5792 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vmulps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

36359#line 36359 "ad_x86.cpp"
}
36361}

36363void vmulDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36372#line 5804 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mulpd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

36376#line 36376 "ad_x86.cpp"
}
36378}

36380void vmulD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36389#line 5814 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vmulpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36394#line 36394 "ad_x86.cpp"
}
36396}

36398void vmulD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

36407#line 5826 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vmulpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

36412#line 36412 "ad_x86.cpp"
}
36414}

36416void vmulD_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36425#line 5826 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vmulpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

36430#line 36430 "ad_x86.cpp"
}
36432}

36434void vcmov8F_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// copnd
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cop
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

36446#line 5840 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5841, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  int vlen_enc = Assembler::AVX_256bit;
  int cond = (Assembler::Condition)(opnd_array(1)->ccode());
  ___masm. vcmpps(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* src1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* src2 */, cond, vlen_enc);
  ___masm. vblendvps(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* src1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* src2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* dst */, vlen_enc);

36455#line 36455 "ad_x86.cpp"
}
36457}

36459void vcmov4D_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// copnd
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cop
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// src2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

36471#line 5858 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5859, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  int vlen_enc = Assembler::AVX_256bit;
  int cond = (Assembler::Condition)(opnd_array(1)->ccode());
  ___masm. vcmppd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* src1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* src2 */, cond, vlen_enc);
  ___masm. vblendvpd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* src1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* src2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* dst */, vlen_enc);

36480#line 36480 "ad_x86.cpp"
}
36482}

36484void vdivFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36493#line 5876 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. divps(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

36497#line 36497 "ad_x86.cpp"
}
36499}

36501void vdivF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36510#line 5886 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vdivps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36515#line 36515 "ad_x86.cpp"
}
36517}

36519void vdivF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

36528#line 5898 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vdivps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

36533#line 36533 "ad_x86.cpp"
}
36535}

36537void vdivDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36546#line 5910 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. divpd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

36550#line 36550 "ad_x86.cpp"
}
36552}

36554void vdivD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36563#line 5920 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vdivpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36568#line 36568 "ad_x86.cpp"
}
36570}

36572void vdivD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

36581#line 5932 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vdivpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

36586#line 36586 "ad_x86.cpp"
}
36588}

36590void minmax_reg_sseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36599#line 5948 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5949, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  ___masm. pminmax(opcode, elem_bt, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

36607#line 36607 "ad_x86.cpp"
}
36609}

36611void minmax_reg_sse_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

36620#line 5948 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5949, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  ___masm. pminmax(opcode, elem_bt, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

36628#line 36628 "ad_x86.cpp"
}
36630}

36632void vminmax_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36641#line 5964 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);

  ___masm. vpminmax(opcode, elem_bt, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36649#line 36649 "ad_x86.cpp"
}
36651}

36653void vminmax_reg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36662#line 5964 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);

  ___masm. vpminmax(opcode, elem_bt, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36670#line 36670 "ad_x86.cpp"
}
36672}

36674void minmaxL_reg_sseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

36684#line 5982 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5983, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  assert(elem_bt == T_LONG, "sanity")do { if (!(elem_bt == T_LONG)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5987, "assert(" "elem_bt == T_LONG" ") failed", "sanity"); ::
breakpoint(); } } while (0);

  ___masm. pminmax(opcode, elem_bt, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */);

36694#line 36694 "ad_x86.cpp"
}
36696}

36698void minmaxL_reg_sse_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

36708#line 5982 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5983, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  assert(elem_bt == T_LONG, "sanity")do { if (!(elem_bt == T_LONG)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 5987, "assert(" "elem_bt == T_LONG" ") failed", "sanity"); ::
breakpoint(); } } while (0);

  ___masm. pminmax(opcode, elem_bt, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */);

36718#line 36718 "ad_x86.cpp"
}
36720}

36722void vminmaxL_reg_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

36732#line 6001 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  int opcode = this->ideal_Opcode();
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  assert(elem_bt == T_LONG, "sanity")do { if (!(elem_bt == T_LONG)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6005, "assert(" "elem_bt == T_LONG" ") failed", "sanity"); ::
breakpoint(); } } while (0);

  ___masm. vpminmax(opcode, elem_bt, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36741#line 36741 "ad_x86.cpp"
}
36743}

36745void vminmaxL_reg_avx_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

36755#line 6001 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  int opcode = this->ideal_Opcode();
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  assert(elem_bt == T_LONG, "sanity")do { if (!(elem_bt == T_LONG)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6005, "assert(" "elem_bt == T_LONG" ") failed", "sanity"); ::
breakpoint(); } } while (0);

  ___masm. vpminmax(opcode, elem_bt, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36764#line 36764 "ad_x86.cpp"
}
36766}

36768void vminmaxL_reg_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36777#line 6018 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6019, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int vlen_enc = vector_length_encoding(this);
  int opcode = this->ideal_Opcode();
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  assert(elem_bt == T_LONG, "sanity")do { if (!(elem_bt == T_LONG)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6024, "assert(" "elem_bt == T_LONG" ") failed", "sanity"); ::
breakpoint(); } } while (0);

  ___masm. vpminmax(opcode, elem_bt, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36788#line 36788 "ad_x86.cpp"
}
36790}

36792void vminmaxL_reg_evex_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

36801#line 6018 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6019, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int vlen_enc = vector_length_encoding(this);
  int opcode = this->ideal_Opcode();
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  assert(elem_bt == T_LONG, "sanity")do { if (!(elem_bt == T_LONG)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6024, "assert(" "elem_bt == T_LONG" ") failed", "sanity"); ::
breakpoint(); } } while (0);

  ___masm. vpminmax(opcode, elem_bt, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

36812#line 36812 "ad_x86.cpp"
}
36814}

36816void minmaxFP_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
{
  C2_MacroAssembler _masm(&cbuf);

36828#line 6040 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6041, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);

  ___masm. vminmax_fp(opcode, elem_bt,
                opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */,
                opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, vlen_enc);

36840#line 36840 "ad_x86.cpp"
}
36842}

36844void minmaxFP_reg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
{
  C2_MacroAssembler _masm(&cbuf);

36856#line 6040 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6041, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);

  ___masm. vminmax_fp(opcode, elem_bt,
                opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */,
                opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, vlen_enc);

36868#line 36868 "ad_x86.cpp"
}
36870}

36872void evminmaxFP_reg_eavxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

36885#line 6061 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6062, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);

  ___masm. evminmax_fp(opcode, elem_bt,
                 opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */,
                 opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, vlen_enc);

36897#line 36897 "ad_x86.cpp"
}
36899}

36901void evminmaxFP_reg_eavx_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// a
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// b
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// atmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// btmp
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

36914#line 6061 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6062, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);

  ___masm. evminmax_fp(opcode, elem_bt,
                 opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* a */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* b */,
                 opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* atmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* btmp */, vlen_enc);

36926#line 36926 "ad_x86.cpp"
}
36928}

36930void signumF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// one
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

36941#line 6081 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  ___masm. signum_fp(opcode, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* zero */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* one */, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);

36946#line 36946 "ad_x86.cpp"
}
36948}

36950void signumD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// zero
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// one
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

36961#line 6092 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  ___masm. signum_fp(opcode, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* zero */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* one */, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);

36966#line 36966 "ad_x86.cpp"
}
36968}

36970void copySignF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

36981#line 6124 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. movl(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp2 */, 0x7FFFFFFF);
  ___masm. movdl(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp2 */);
  ___masm. vpternlogd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, 0xE4, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* tmp1 */, Assembler::AVX_128bit);

36987#line 36987 "ad_x86.cpp"
}
36989}

36991void copySignD_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

37003#line 6137 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mov64(opnd_array(5)->as_Register(ra_,this,idx5)/* tmp2 */, 0x7FFFFFFFFFFFFFFF);
  ___masm. movq(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_Register(ra_,this,idx5)/* tmp2 */);
  ___masm. vpternlogq(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, 0xE4, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, Assembler::AVX_128bit);

37009#line 37009 "ad_x86.cpp"
}
37011}

37013void vsqrtF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

37021#line 6152 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6153, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vsqrtps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

37027#line 37027 "ad_x86.cpp"
}
37029}

37031void vsqrtF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

37039#line 6165 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6166, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vsqrtps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

37045#line 37045 "ad_x86.cpp"
}
37047}

37049void vsqrtD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

37057#line 6178 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6179, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vsqrtpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

37063#line 37063 "ad_x86.cpp"
}
37065}

37067void vsqrtD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

37075#line 6191 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6192, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vsqrtpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

37081#line 37081 "ad_x86.cpp"
}
37083}

37085void vshiftcntNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cnt
{
  C2_MacroAssembler _masm(&cbuf);

37093#line 6207 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* cnt */);

37097#line 37097 "ad_x86.cpp"
}
37099}

37101void vshiftcnt_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cnt
{
  C2_MacroAssembler _masm(&cbuf);

37109#line 6207 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. movdl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* cnt */);

37113#line 37113 "ad_x86.cpp"
}
37115}

37117void vshiftBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37129#line 6221 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE > 3, "required")do { if (!(UseSSE > 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6222, "assert(" "UseSSE > 3" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. pand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */);
  ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);

37140#line 37140 "ad_x86.cpp"
}
37142}

37144void vshiftB_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37156#line 6221 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE > 3, "required")do { if (!(UseSSE > 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6222, "assert(" "UseSSE > 3" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. pand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */);
  ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);

37167#line 37167 "ad_x86.cpp"
}
37169}

37171void vshiftB_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37183#line 6221 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE > 3, "required")do { if (!(UseSSE > 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6222, "assert(" "UseSSE > 3" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. pand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */);
  ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);

37194#line 37194 "ad_x86.cpp"
}
37196}

37198void vshift16BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37211#line 6242 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE > 3, "required")do { if (!(UseSSE > 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6243, "assert(" "UseSSE > 3" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. pshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0xE);
  ___masm. vextendbw(sign, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */);
  ___masm. vshiftw(opcode, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. pand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. pand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */);
  ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */);

37226#line 37226 "ad_x86.cpp"
}
37228}

37230void vshift16B_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37243#line 6242 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE > 3, "required")do { if (!(UseSSE > 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6243, "assert(" "UseSSE > 3" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. pshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0xE);
  ___masm. vextendbw(sign, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */);
  ___masm. vshiftw(opcode, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. pand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. pand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */);
  ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */);

37258#line 37258 "ad_x86.cpp"
}
37260}

37262void vshift16B_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37275#line 6242 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE > 3, "required")do { if (!(UseSSE > 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6243, "assert(" "UseSSE > 3" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. pshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0xE);
  ___masm. vextendbw(sign, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */);
  ___masm. vshiftw(opcode, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. pand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. pand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */);
  ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */);

37290#line 37290 "ad_x86.cpp"
}
37292}

37294void vshift16B_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37306#line 6267 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vextracti128_high(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0);

37317#line 37317 "ad_x86.cpp"
}
37319}

37321void vshift16B_avx_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37333#line 6267 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vextracti128_high(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0);

37344#line 37344 "ad_x86.cpp"
}
37346}

37348void vshift16B_avx_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37360#line 6267 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vextracti128_high(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0);

37371#line 37371 "ad_x86.cpp"
}
37373}

37375void vshift32B_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37387#line 6287 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 1, "required")do { if (!(UseAVX > 1)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6288, "assert(" "UseAVX > 1" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, vlen_enc);
  ___masm. vextendbw(sign, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, vlen_enc);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0xD8, vlen_enc);

37403#line 37403 "ad_x86.cpp"
}
37405}

37407void vshift32B_avx_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37419#line 6287 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 1, "required")do { if (!(UseAVX > 1)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6288, "assert(" "UseAVX > 1" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, vlen_enc);
  ___masm. vextendbw(sign, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, vlen_enc);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0xD8, vlen_enc);

37435#line 37435 "ad_x86.cpp"
}
37437}

37439void vshift32B_avx_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37451#line 6287 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 1, "required")do { if (!(UseAVX > 1)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6288, "assert(" "UseAVX > 1" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, vlen_enc);
  ___masm. vextendbw(sign, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, vlen_enc);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0xD8, vlen_enc);

37467#line 37467 "ad_x86.cpp"
}
37469}

37471void vshift64B_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37484#line 6312 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6313, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  int vlen_enc = Assembler::AVX_512bit;
  ___masm. vextracti64x4(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 1);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, vlen_enc);
  ___masm. vextendbw(sign, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vmovdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vpbroadcastd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, vlen_enc);
  ___masm. evmovdquq(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, ExternalAddress(vector_byte_perm_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);

37503#line 37503 "ad_x86.cpp"
}
37505}

37507void vshift64B_avx_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37520#line 6312 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6313, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  int vlen_enc = Assembler::AVX_512bit;
  ___masm. vextracti64x4(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 1);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, vlen_enc);
  ___masm. vextendbw(sign, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vmovdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vpbroadcastd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, vlen_enc);
  ___masm. evmovdquq(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, ExternalAddress(vector_byte_perm_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);

37539#line 37539 "ad_x86.cpp"
}
37541}

37543void vshift64B_avx_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37556#line 6312 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6313, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVB);
  int vlen_enc = Assembler::AVX_512bit;
  ___masm. vextracti64x4(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 1);
  ___masm. vextendbw(sign, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, vlen_enc);
  ___masm. vextendbw(sign, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vshiftw(opcode, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. vmovdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_short_to_byte_mask()), opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vpbroadcastd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, vlen_enc);
  ___masm. evmovdquq(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, ExternalAddress(vector_byte_perm_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* tmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);

37575#line 37575 "ad_x86.cpp"
}
37577}

37579void vshiftSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

37589#line 6345 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  } else {
    int vlen = Matcher::vector_length(this);
    if (vlen == 2) {
      ___masm. movflt(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    } else if (vlen == 4) {
      ___masm. movdbl(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    } else {
      assert (vlen == 8, "sanity")do { if (!(vlen == 8)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6359, "assert(" "vlen == 8" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    }
  }

37610#line 37610 "ad_x86.cpp"
}
37612}

37614void vshiftS_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

37624#line 6345 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  } else {
    int vlen = Matcher::vector_length(this);
    if (vlen == 2) {
      ___masm. movflt(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    } else if (vlen == 4) {
      ___masm. movdbl(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    } else {
      assert (vlen == 8, "sanity")do { if (!(vlen == 8)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6359, "assert(" "vlen == 8" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    }
  }

37645#line 37645 "ad_x86.cpp"
}
37647}

37649void vshiftS_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

37659#line 6345 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  } else {
    int vlen = Matcher::vector_length(this);
    if (vlen == 2) {
      ___masm. movflt(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    } else if (vlen == 4) {
      ___masm. movdbl(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    } else {
      assert (vlen == 8, "sanity")do { if (!(vlen == 8)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6359, "assert(" "vlen == 8" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    }
  }

37680#line 37680 "ad_x86.cpp"
}
37682}

37684void vshiftINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

37694#line 6376 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  } else {
    int vlen = Matcher::vector_length(this);
    if (vlen == 2) {
      ___masm. movdbl(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    } else {
      assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6387, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    }
  }

37712#line 37712 "ad_x86.cpp"
}
37714}

37716void vshiftI_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

37726#line 6376 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  } else {
    int vlen = Matcher::vector_length(this);
    if (vlen == 2) {
      ___masm. movdbl(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    } else {
      assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6387, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    }
  }

37744#line 37744 "ad_x86.cpp"
}
37746}

37748void vshiftI_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

37758#line 6376 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  } else {
    int vlen = Matcher::vector_length(this);
    if (vlen == 2) {
      ___masm. movdbl(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    } else {
      assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6387, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    }
  }

37776#line 37776 "ad_x86.cpp"
}
37778}

37780void vshiftI_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

37789#line 6402 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vector_len = vector_length_encoding(this);
    ___masm. vshiftd_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), vector_len);
  } else {
    int vlen = Matcher::vector_length(this);
    if (vlen == 2) {
      ___masm. movdbl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->constant());
    } else {
      assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6413, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. movdqu(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->constant());
    }
  }

37807#line 37807 "ad_x86.cpp"
}
37809}

37811void vshiftI_imm_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

37820#line 6402 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vector_len = vector_length_encoding(this);
    ___masm. vshiftd_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), vector_len);
  } else {
    int vlen = Matcher::vector_length(this);
    if (vlen == 2) {
      ___masm. movdbl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->constant());
    } else {
      assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6413, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. movdqu(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->constant());
    }
  }

37838#line 37838 "ad_x86.cpp"
}
37840}

37842void vshiftI_imm_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

37851#line 6402 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vector_len = vector_length_encoding(this);
    ___masm. vshiftd_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), vector_len);
  } else {
    int vlen = Matcher::vector_length(this);
    if (vlen == 2) {
      ___masm. movdbl(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->constant());
    } else {
      assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6413, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
      ___masm. movdqu(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
      ___masm. vshiftd_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->constant());
    }
  }

37869#line 37869 "ad_x86.cpp"
}
37871}

37873void vshiftLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

37883#line 6429 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vshiftq(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  } else {
    assert(Matcher::vector_length(this) == 2, "")do { if (!(Matcher::vector_length(this) == 2)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 6435, "assert(" "Matcher::vector_length(this) == 2" ") failed"
, ""); ::breakpoint(); } } while (0);
    ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
    ___masm. vshiftq(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  }

37895#line 37895 "ad_x86.cpp"
}
37897}

37899void vshiftL_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

37909#line 6429 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vshiftq(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  } else {
    assert(Matcher::vector_length(this) == 2, "")do { if (!(Matcher::vector_length(this) == 2)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 6435, "assert(" "Matcher::vector_length(this) == 2" ") failed"
, ""); ::breakpoint(); } } while (0);
    ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
    ___masm. vshiftq(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  }

37921#line 37921 "ad_x86.cpp"
}
37923}

37925void vshiftL_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

37934#line 6448 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vector_len = vector_length_encoding(this);
    ___masm. vshiftq_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), vector_len);
  } else {
    assert(Matcher::vector_length(this) == 2, "")do { if (!(Matcher::vector_length(this) == 2)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 6454, "assert(" "Matcher::vector_length(this) == 2" ") failed"
, ""); ::breakpoint(); } } while (0);
    ___masm. movdqu(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
    ___masm. vshiftq_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->constant());
  }

37946#line 37946 "ad_x86.cpp"
}
37948}

37950void vshiftL_imm_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

37959#line 6448 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  if (UseAVX > 0) {
    int vector_len = vector_length_encoding(this);
    ___masm. vshiftq_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), vector_len);
  } else {
    assert(Matcher::vector_length(this) == 2, "")do { if (!(Matcher::vector_length(this) == 2)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 6454, "assert(" "Matcher::vector_length(this) == 2" ") failed"
, ""); ::breakpoint(); } } while (0);
    ___masm. movdqu(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
    ___masm. vshiftq_imm(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->constant());
  }

37971#line 37971 "ad_x86.cpp"
}
37973}

37975void vshiftL_arith_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

37987#line 6469 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    assert(UseSSE >= 2, "required")do { if (!(UseSSE >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6472, "assert(" "UseSSE >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);
    ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
    ___masm. psrlq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    ___masm. movdqu(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, ExternalAddress(vector_long_sign_mask()), opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
    ___masm. psrlq(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
    ___masm. pxor(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */);
    ___masm. psubq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */);
  } else {
    assert(vlen == 4, "sanity")do { if (!(vlen == 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6480, "assert(" "vlen == 4" ") failed", "sanity"); ::breakpoint
(); } } while (0);
    assert(UseAVX > 1, "required")do { if (!(UseAVX > 1)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6481, "assert(" "UseAVX > 1" ") failed", "required"); ::breakpoint
(); } } while (0);
    int vlen_enc = Assembler::AVX_256bit;
    ___masm. vpsrlq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
    ___masm. vmovdqu(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, ExternalAddress(vector_long_sign_mask()), opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
    ___masm. vpsrlq(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
    ___masm. vpxor(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, vlen_enc);
    ___masm. vpsubq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, vlen_enc);
  }

38009#line 38009 "ad_x86.cpp"
}
38011}

38013void vshiftL_arith_reg_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38022#line 6497 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. evpsraq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38027#line 38027 "ad_x86.cpp"
}
38029}

38031void vshift8B_var_nobwNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38043#line 6515 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6516, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_128bit;
  ___masm. varshiftbw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0);

38052#line 38052 "ad_x86.cpp"
}
38054}

38056void vshift8B_var_nobw_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38068#line 6515 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6516, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_128bit;
  ___masm. varshiftbw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0);

38077#line 38077 "ad_x86.cpp"
}
38079}

38081void vshift8B_var_nobw_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38093#line 6515 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6516, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_128bit;
  ___masm. varshiftbw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0);

38102#line 38102 "ad_x86.cpp"
}
38104}

38106void vshift16B_var_nobwNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38119#line 6535 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6536, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_128bit;
  // Shift lower half and get word result in dst
  ___masm. varshiftbw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Shift upper half and get word result in vtmp1
  ___masm. vpshufd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0xE, 0);
  ___masm. vpshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, 0xE, 0);
  ___masm. varshiftbw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Merge and down convert the two word results to byte in dst
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0);

38136#line 38136 "ad_x86.cpp"
}
38138}

38140void vshift16B_var_nobw_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38153#line 6535 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6536, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_128bit;
  // Shift lower half and get word result in dst
  ___masm. varshiftbw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Shift upper half and get word result in vtmp1
  ___masm. vpshufd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0xE, 0);
  ___masm. vpshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, 0xE, 0);
  ___masm. varshiftbw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Merge and down convert the two word results to byte in dst
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0);

38170#line 38170 "ad_x86.cpp"
}
38172}

38174void vshift16B_var_nobw_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38187#line 6535 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6536, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_128bit;
  // Shift lower half and get word result in dst
  ___masm. varshiftbw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Shift upper half and get word result in vtmp1
  ___masm. vpshufd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0xE, 0);
  ___masm. vpshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, 0xE, 0);
  ___masm. varshiftbw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Merge and down convert the two word results to byte in dst
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0);

38204#line 38204 "ad_x86.cpp"
}
38206}

38208void vshift32B_var_nobwNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// vtmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// vtmp4
unsigned idx8 = idx7 + opnd_array(7)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38223#line 6563 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6564, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_128bit;
  // Process lower 128 bits and get result in dst
  ___masm. varshiftbw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpshufd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0xE, 0);
  ___masm. vpshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, 0xE, 0);
  ___masm. varshiftbw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0);

  // Process higher 128 bits and get result in vtmp3
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextracti128_high(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. varshiftbw(opcode, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* vtmp3 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* vtmp4 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpshufd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0xE, 0);
  ___masm. vpshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, 0xE, 0);
  ___masm. varshiftbw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpackuswb(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* vtmp3 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0);

  // Merge the two results in dst
  ___masm. vinserti128(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0x1);

38248#line 38248 "ad_x86.cpp"
}
38250}

38252void vshift32B_var_nobw_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// vtmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// vtmp4
unsigned idx8 = idx7 + opnd_array(7)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38267#line 6563 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6564, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_128bit;
  // Process lower 128 bits and get result in dst
  ___masm. varshiftbw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpshufd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0xE, 0);
  ___masm. vpshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, 0xE, 0);
  ___masm. varshiftbw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0);

  // Process higher 128 bits and get result in vtmp3
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextracti128_high(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. varshiftbw(opcode, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* vtmp3 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* vtmp4 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpshufd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0xE, 0);
  ___masm. vpshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, 0xE, 0);
  ___masm. varshiftbw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpackuswb(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* vtmp3 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0);

  // Merge the two results in dst
  ___masm. vinserti128(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0x1);

38292#line 38292 "ad_x86.cpp"
}
38294}

38296void vshift32B_var_nobw_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// vtmp3
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// vtmp4
unsigned idx8 = idx7 + opnd_array(7)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38311#line 6563 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6564, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_128bit;
  // Process lower 128 bits and get result in dst
  ___masm. varshiftbw(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpshufd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0xE, 0);
  ___masm. vpshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, 0xE, 0);
  ___masm. varshiftbw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpackuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0);

  // Process higher 128 bits and get result in vtmp3
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextracti128_high(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. varshiftbw(opcode, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* vtmp3 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* vtmp4 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpshufd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0xE, 0);
  ___masm. vpshufd(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, 0xE, 0);
  ___masm. varshiftbw(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);
  ___masm. vpackuswb(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* vtmp3 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0);

  // Merge the two results in dst
  ___masm. vinserti128(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0x1);

38336#line 38336 "ad_x86.cpp"
}
38338}

38340void vshiftB_var_evex_bwNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38352#line 6599 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6600, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. evarshiftb(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);

38360#line 38360 "ad_x86.cpp"
}
38362}

38364void vshiftB_var_evex_bw_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38376#line 6599 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6600, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. evarshiftb(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);

38384#line 38384 "ad_x86.cpp"
}
38386}

38388void vshiftB_var_evex_bw_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38400#line 6599 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6600, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. evarshiftb(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);

38408#line 38408 "ad_x86.cpp"
}
38410}

38412void vshift64B_var_evex_bwNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38425#line 6618 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6619, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. evarshiftb(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vextracti64x4_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextracti64x4_high(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. evarshiftb(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vinserti64x4(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0x1);

38437#line 38437 "ad_x86.cpp"
}
38439}

38441void vshift64B_var_evex_bw_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38454#line 6618 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6619, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. evarshiftb(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vextracti64x4_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextracti64x4_high(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. evarshiftb(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vinserti64x4(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0x1);

38466#line 38466 "ad_x86.cpp"
}
38468}

38470void vshift64B_var_evex_bw_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38483#line 6618 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6619, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. evarshiftb(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vextracti64x4_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextracti64x4_high(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. evarshiftb(opcode, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, vlen_enc, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  ___masm. vinserti64x4(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, 0x1);

38495#line 38495 "ad_x86.cpp"
}
38497}

38499void vshift8S_var_nobwNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38511#line 6642 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6643, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVS);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextendwd(sign, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 1);
  ___masm. vpmovzxwd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, 1);
  ___masm. varshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, vlen_enc);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. vpackusdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, 0);

38525#line 38525 "ad_x86.cpp"
}
38527}

38529void vshift8S_var_nobw_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38541#line 6642 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6643, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVS);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextendwd(sign, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 1);
  ___masm. vpmovzxwd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, 1);
  ___masm. varshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, vlen_enc);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. vpackusdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, 0);

38555#line 38555 "ad_x86.cpp"
}
38557}

38559void vshift8S_var_nobw_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38571#line 6642 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6643, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVS);
  int vlen_enc = Assembler::AVX_256bit;
  ___masm. vextendwd(sign, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 1);
  ___masm. vpmovzxwd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, 1);
  ___masm. varshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, vlen_enc);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(5)->as_Register(ra_,this,idx5)/* scratch */);
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. vpackusdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, 0);

38585#line 38585 "ad_x86.cpp"
}
38587}

38589void vshift16S_var_nobwNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38602#line 6667 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6668, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVS);
  int vlen_enc = Assembler::AVX_256bit;
  // Shift lower half, with result in vtmp2 usign vtmp1 as TEMP
  ___masm. vextendwd(sign, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vpmovzxwd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. varshiftd(opcode, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, vlen_enc);
  ___masm. vpand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Shift upper half, with result in dst usign vtmp1 as TEMP
  ___masm. vextracti128_high(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. vextendwd(sign, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpmovzxwd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, vlen_enc);
  ___masm. varshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, vlen_enc);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Merge lower and upper half result into dst
  ___masm. vpackusdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0xD8, vlen_enc);

38627#line 38627 "ad_x86.cpp"
}
38629}

38631void vshift16S_var_nobw_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38644#line 6667 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6668, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVS);
  int vlen_enc = Assembler::AVX_256bit;
  // Shift lower half, with result in vtmp2 usign vtmp1 as TEMP
  ___masm. vextendwd(sign, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vpmovzxwd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. varshiftd(opcode, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, vlen_enc);
  ___masm. vpand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Shift upper half, with result in dst usign vtmp1 as TEMP
  ___masm. vextracti128_high(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. vextendwd(sign, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpmovzxwd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, vlen_enc);
  ___masm. varshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, vlen_enc);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Merge lower and upper half result into dst
  ___masm. vpackusdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0xD8, vlen_enc);

38669#line 38669 "ad_x86.cpp"
}
38671}

38673void vshift16S_var_nobw_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

38686#line 6667 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6668, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  bool sign = (opcode != Op_URShiftVS);
  int vlen_enc = Assembler::AVX_256bit;
  // Shift lower half, with result in vtmp2 usign vtmp1 as TEMP
  ___masm. vextendwd(sign, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vpmovzxwd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);
  ___masm. varshiftd(opcode, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, vlen_enc);
  ___masm. vpand(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Shift upper half, with result in dst usign vtmp1 as TEMP
  ___masm. vextracti128_high(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. vextracti128_high(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */);
  ___masm. vextendwd(sign, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpmovzxwd(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, vlen_enc);
  ___masm. varshiftd(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, vlen_enc);
  ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

  // Merge lower and upper half result into dst
  ___masm. vpackusdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  ___masm. vpermq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0xD8, vlen_enc);

38711#line 38711 "ad_x86.cpp"
}
38713}

38715void vshift16S_var_evex_bwNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38724#line 6701 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6702, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  if (!VM_Version::supports_avx512vl()) {
    vlen_enc = Assembler::AVX_512bit;
  }
  ___masm. varshiftw(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38735#line 38735 "ad_x86.cpp"
}
38737}

38739void vshift16S_var_evex_bw_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38748#line 6701 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6702, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  if (!VM_Version::supports_avx512vl()) {
    vlen_enc = Assembler::AVX_512bit;
  }
  ___masm. varshiftw(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38759#line 38759 "ad_x86.cpp"
}
38761}

38763void vshift16S_var_evex_bw_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38772#line 6701 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6702, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  if (!VM_Version::supports_avx512vl()) {
    vlen_enc = Assembler::AVX_512bit;
  }
  ___masm. varshiftw(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38783#line 38783 "ad_x86.cpp"
}
38785}

38787void vshiftI_varNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38796#line 6721 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6722, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. varshiftd(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38804#line 38804 "ad_x86.cpp"
}
38806}

38808void vshiftI_var_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38817#line 6721 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6722, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. varshiftd(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38825#line 38825 "ad_x86.cpp"
}
38827}

38829void vshiftI_var_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38838#line 6721 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6722, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. varshiftd(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38846#line 38846 "ad_x86.cpp"
}
38848}

38850void vshiftL_varNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38859#line 6737 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6738, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. varshiftq(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38867#line 38867 "ad_x86.cpp"
}
38869}

38871void vshiftL_var_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38880#line 6737 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6738, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. varshiftq(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38888#line 38888 "ad_x86.cpp"
}
38890}

38892void vshiftL_arith_varNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

38903#line 6755 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. varshiftq(opcode, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc,
               opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */);

38910#line 38910 "ad_x86.cpp"
}
38912}

38914void vshiftL_arith_var_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

38923#line 6769 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen_enc = vector_length_encoding(this);
  ___masm. varshiftq(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vlen_enc);

38929#line 38929 "ad_x86.cpp"
}
38931}

38933void vandNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

38942#line 6783 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. pand(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

38946#line 38946 "ad_x86.cpp"
}
38948}

38950void vand_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

38959#line 6793 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpand(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

38964#line 38964 "ad_x86.cpp"
}
38966}

38968void vand_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

38977#line 6805 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpand(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

38982#line 38982 "ad_x86.cpp"
}
38984}

38986void vand_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

38995#line 6805 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpand(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

39000#line 39000 "ad_x86.cpp"
}
39002}

39004void vorNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39013#line 6818 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. por(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

39017#line 39017 "ad_x86.cpp"
}
39019}

39021void vor_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

39030#line 6828 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

39035#line 39035 "ad_x86.cpp"
}
39037}

39039void vor_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

39048#line 6840 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

39053#line 39053 "ad_x86.cpp"
}
39055}

39057void vor_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39066#line 6840 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

39071#line 39071 "ad_x86.cpp"
}
39073}

39075void vxorNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39084#line 6853 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. pxor(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */);

39088#line 39088 "ad_x86.cpp"
}
39090}

39092void vxor_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

39101#line 6863 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

39106#line 39106 "ad_x86.cpp"
}
39108}

39110void vxor_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mem
{
  C2_MacroAssembler _masm(&cbuf);

39119#line 6875 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), vlen_enc);

39124#line 39124 "ad_x86.cpp"
}
39126}

39128void vxor_mem_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39137#line 6875 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpxor(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vlen_enc);

39142#line 39142 "ad_x86.cpp"
}
39144}

39146void vcastBtoXNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39154#line 6887 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6888, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  BasicType to_elem_bt = Matcher::vector_element_basic_type(this);
  int vlen_enc = vector_length_encoding(this);
  switch (to_elem_bt) {
    case T_SHORT:
      ___masm. vpmovsxbw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      break;
    case T_INT:
      ___masm. vpmovsxbd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      break;
    case T_FLOAT:
      ___masm. vpmovsxbd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      ___masm. vcvtdq2ps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
      break;
    case T_LONG:
      ___masm. vpmovsxbq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      break;
    case T_DOUBLE:
      ___masm. vpmovsxbd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      ___masm. vcvtdq2pd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
      break;

    default: assert(false, "%s", type2name(to_elem_bt))do { if (!(false)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6911, "assert(" "false" ") failed", "%s", type2name(to_elem_bt
)); ::breakpoint(); } } while (0);
  }

39182#line 39182 "ad_x86.cpp"
}
39184}

39186void castStoXNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39195#line 6924 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6925, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  ___masm. vpand(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, ExternalAddress(vector_short_to_byte_mask()), 0, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
  ___masm. vpackuswb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, 0);

39202#line 39202 "ad_x86.cpp"
}
39204}

39206void vcastStoXNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39217#line 6940 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6941, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  int vlen_enc = vector_length_encoding(Matcher::vector_length_in_bytes(this, opnd_array(1)));
  ___masm. vpand(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, ExternalAddress(vector_short_to_byte_mask()), vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
  ___masm. vextracti128(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, 0x1);
  ___masm. vpackuswb(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 0);

39226#line 39226 "ad_x86.cpp"
}
39228}

39230void vcastStoX_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39238#line 6956 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  BasicType to_elem_bt = Matcher::vector_element_basic_type(this);
  int src_vlen_enc = vector_length_encoding(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this);
  switch (to_elem_bt) {
    case T_BYTE:
      if (!VM_Version::supports_avx512vl()) {
        vlen_enc = Assembler::AVX_512bit;
      }
      ___masm. evpmovwb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, src_vlen_enc);
      break;
    case T_INT:
      ___masm. vpmovsxwd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      break;
    case T_FLOAT:
      ___masm. vpmovsxwd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      ___masm. vcvtdq2ps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
      break;
    case T_LONG:
      ___masm. vpmovsxwq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      break;
    case T_DOUBLE:
      ___masm. vpmovsxwd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      ___masm. vcvtdq2pd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
      break;
    default:
      ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 6982
); ::breakpoint(); } while (0);
  }

39268#line 39268 "ad_x86.cpp"
}
39270}

39272void castItoXNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39281#line 6995 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 6996, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  BasicType to_elem_bt = Matcher::vector_element_basic_type(this);
  int vlen_enc = vector_length_encoding(this, opnd_array(1));

  if (to_elem_bt == T_BYTE) {
    ___masm. vpand(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, ExternalAddress(vector_int_to_byte_mask()), vlen_enc, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
    ___masm. vpackusdw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
    ___masm. vpackuswb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  } else {
    assert(to_elem_bt == T_SHORT, "%s", type2name(to_elem_bt))do { if (!(to_elem_bt == T_SHORT)) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 7006, "assert(" "to_elem_bt == T_SHORT" ") failed", "%s", type2name
(to_elem_bt)); ::breakpoint(); } } while (0);
    ___masm. vpand(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
    ___masm. vpackusdw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, vlen_enc);
  }

39298#line 39298 "ad_x86.cpp"
}
39300}

39302void vcastItoXNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39313#line 7021 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7022, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  BasicType to_elem_bt = Matcher::vector_element_basic_type(this);
  int vlen_enc = vector_length_encoding(this, opnd_array(1));

  if (to_elem_bt == T_BYTE) {
    ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, ExternalAddress(vector_int_to_byte_mask()), vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
    ___masm. vextracti128(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 0x1);
    ___masm. vpackusdw(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, vlen_enc);
    ___masm. vpackuswb(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, Assembler::AVX_128bit);
  } else {
    assert(to_elem_bt == T_SHORT, "%s", type2name(to_elem_bt))do { if (!(to_elem_bt == T_SHORT)) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 7033, "assert(" "to_elem_bt == T_SHORT" ") failed", "%s", type2name
(to_elem_bt)); ::breakpoint(); } } while (0);
    ___masm. vpand(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, ExternalAddress(vector_int_to_short_mask()), vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
    ___masm. vextracti128(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 0x1);
    ___masm. vpackusdw(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, vlen_enc);
  }

39332#line 39332 "ad_x86.cpp"
}
39334}

39336void vcastItoX_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39344#line 7047 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7048, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  BasicType dst_elem_bt = Matcher::vector_element_basic_type(this);
  int src_vlen_enc = vector_length_encoding(this, opnd_array(1));
  int dst_vlen_enc = vector_length_encoding(this);
  switch (dst_elem_bt) {
    case T_BYTE:
      if (!VM_Version::supports_avx512vl()) {
        src_vlen_enc = Assembler::AVX_512bit;
      }
      ___masm. evpmovdb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, src_vlen_enc);
      break;
    case T_SHORT:
      if (!VM_Version::supports_avx512vl()) {
        src_vlen_enc = Assembler::AVX_512bit;
      }
      ___masm. evpmovdw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, src_vlen_enc);
      break;
    case T_FLOAT:
      ___masm. vcvtdq2ps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, dst_vlen_enc);
      break;
    case T_LONG:
      ___masm. vpmovsxdq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, dst_vlen_enc);
      break;
    case T_DOUBLE:
      ___masm. vcvtdq2pd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, dst_vlen_enc);
      break;
    default:
      ShouldNotReachHere()do { (*g_assert_poison) = 'X';; report_should_not_reach_here(
"/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad", 7076
); ::breakpoint(); } while (0);
  }

39377#line 39377 "ad_x86.cpp"
}
39379}

39381void vcastLtoBSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39390#line 7088 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7089, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);

  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  BasicType to_elem_bt  = Matcher::vector_element_basic_type(this);
  AddressLiteral mask_addr = (to_elem_bt == T_BYTE) ? ExternalAddress(vector_int_to_byte_mask())
                                                    : ExternalAddress(vector_int_to_short_mask());
  if (vlen <= 16) {
    ___masm. vpshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 8, Assembler::AVX_128bit);
    ___masm. vpand(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, mask_addr, Assembler::AVX_128bit, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
    ___masm. vpackusdw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Assembler::AVX_128bit);
  } else {
    assert(vlen <= 32, "required")do { if (!(vlen <= 32)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7100, "assert(" "vlen <= 32" ") failed", "required"); ::breakpoint
(); } } while (0);
    ___masm. vpermilps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 8, Assembler::AVX_256bit);
    ___masm. vpermpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, 8, Assembler::AVX_256bit);
    ___masm. vpand(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, mask_addr, Assembler::AVX_128bit, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
    ___masm. vpackusdw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Assembler::AVX_128bit);
  }
  if (to_elem_bt == T_BYTE) {
    ___masm. vpackuswb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Assembler::AVX_128bit);
  }

39413#line 39413 "ad_x86.cpp"
}
39415}

39417void vcastLtoX_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39425#line 7120 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  BasicType to_elem_bt = Matcher::vector_element_basic_type(this);
  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  switch (to_elem_bt) {
    case T_BYTE:
      if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
        vlen_enc = Assembler::AVX_512bit;
      }
      ___masm. evpmovqb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      break;
    case T_SHORT:
      if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
        vlen_enc = Assembler::AVX_512bit;
      }
      ___masm. evpmovqw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      break;
    case T_INT:
      if (vlen == 8) {
        if (opnd_array(0)->as_XMMRegister(ra_,this)/* dst */!= opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */) {
          ___masm. movflt(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
        }
      } else if (vlen == 16) {
        ___masm. pshufd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 8);
      } else if (vlen == 32) {
        if (UseAVX > 2) {
          if (!VM_Version::supports_avx512vl()) {
            vlen_enc = Assembler::AVX_512bit;
          }
          ___masm. evpmovqd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
        } else {
          ___masm. vpermilps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 8, vlen_enc);
          ___masm. vpermpd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, 8, vlen_enc);
        }
      } else { // vlen == 64
        ___masm. evpmovqd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      }
      break;
    case T_FLOAT:
      assert(UseAVX > 2 && VM_Version::supports_avx512dq(), "required")do { if (!(UseAVX > 2 && VM_Version::supports_avx512dq
())) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 7159, "assert(" "UseAVX > 2 && VM_Version::supports_avx512dq()"
 ") failed", "required"); ::breakpoint(); } } while (0);
      ___masm. evcvtqq2ps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      break;
    case T_DOUBLE:
      assert(UseAVX > 2 && VM_Version::supports_avx512dq(), "required")do { if (!(UseAVX > 2 && VM_Version::supports_avx512dq
())) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 7163, "assert(" "UseAVX > 2 && VM_Version::supports_avx512dq()"
 ") failed", "required"); ::breakpoint(); } } while (0);
      ___masm. evcvtqq2pd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
      break;

    default: assert(false, "%s", type2name(to_elem_bt))do { if (!(false)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7167, "assert(" "false" ") failed", "%s", type2name(to_elem_bt
)); ::breakpoint(); } } while (0);
  }

39476#line 39476 "ad_x86.cpp"
}
39478}

39480void vcastFtoD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39488#line 7177 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vcvtps2pd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

39493#line 39493 "ad_x86.cpp"
}
39495}

39497void vcastFtoI_reg_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// xtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// xtmp3
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// xtmp4
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39511#line 7191 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vector_castF2I_avx(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* xtmp1 */,
                        opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* xtmp3 */, opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* xtmp4 */,
                        ExternalAddress(vector_float_signflip()), opnd_array(7)->as_Register(ra_,this,idx7)/* scratch */, vlen_enc);

39518#line 39518 "ad_x86.cpp"
}
39520}

39522void vcastFtoI_reg_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// xtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp2
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39536#line 7207 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vector_castF2I_evex(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* xtmp1 */,
                         opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp2 */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp1 */, opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp2 */,
                         ExternalAddress(vector_float_signflip()), opnd_array(7)->as_Register(ra_,this,idx7)/* scratch */, vlen_enc);

39543#line 39543 "ad_x86.cpp"
}
39545}

39547void vcastDtoF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

39555#line 7220 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vcvtpd2ps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

39560#line 39560 "ad_x86.cpp"
}
39562}

39564void vcastDtoL_reg_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// xtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp2
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39578#line 7232 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vector_castD2L_evex(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* xtmp1 */,
                         opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp2 */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp1 */, opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp2 */,
                         ExternalAddress(vector_double_signflip()), opnd_array(7)->as_Register(ra_,this,idx7)/* scratch */, vlen_enc);

39585#line 39585 "ad_x86.cpp"
}
39587}

39589void vcmpFDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cond
{
  C2_MacroAssembler _masm(&cbuf);

39599#line 7250 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  Assembler::ComparisonPredicateFP cmp = booltest_pred_to_comparison_pred_fp(opnd_array(3)->constant());
  if (Matcher::vector_element_basic_type(this, opnd_array(1)) == T_FLOAT) {
    ___masm. vcmpps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen_enc);
  } else {
    ___masm. vcmppd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen_enc);
  }

39609#line 39609 "ad_x86.cpp"
}
39611}

39613void evcmpFD64Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cond
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

39625#line 7269 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = Assembler::AVX_512bit;
  Assembler::ComparisonPredicateFP cmp = booltest_pred_to_comparison_pred_fp(opnd_array(3)->constant());
  KRegister mask = k0; // The comparison itself is not being masked.
  if (Matcher::vector_element_basic_type(this, opnd_array(1)) == T_FLOAT) {
    ___masm. evcmpps(opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, mask, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen_enc);
    ___masm. evmovdqul(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, ExternalAddress(vector_all_bits_set()), false, vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
  } else {
    ___masm. evcmppd(opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, mask, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen_enc);
    ___masm. evmovdquq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, ExternalAddress(vector_all_bits_set()), false, vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
  }

39638#line 39638 "ad_x86.cpp"
}
39640}

39642void evcmpFDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cond
{
  C2_MacroAssembler _masm(&cbuf);

39652#line 7289 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(bottom_type()->isa_vectmask(), "TypeVectMask expected")do { if (!(bottom_type()->isa_vectmask())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 7290, "assert(" "bottom_type()->isa_vectmask()" ") failed"
, "TypeVectMask expected"); ::breakpoint(); } } while (0);
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  Assembler::ComparisonPredicateFP cmp = booltest_pred_to_comparison_pred_fp(opnd_array(3)->constant());
  KRegister mask = k0; // The comparison itself is not being masked.
  if (Matcher::vector_element_basic_type(this, opnd_array(1)) == T_FLOAT) {
    ___masm. evcmpps(opnd_array(0)->as_KRegister(ra_,this)/* dst */, mask, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen_enc);
  } else {
    ___masm. evcmppd(opnd_array(0)->as_KRegister(ra_,this)/* dst */, mask, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen_enc);
  }

39664#line 39664 "ad_x86.cpp"
}
39666}

39668void vcmpNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cond
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39679#line 7312 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred(opnd_array(3)->constant());
  Assembler::Width ww = widthForType(Matcher::vector_element_basic_type(this, opnd_array(1)));
  ___masm. vpcmpCCW(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, ww, vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);

39686#line 39686 "ad_x86.cpp"
}
39688}

39690void vcmpuNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cond
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39703#line 7330 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred(opnd_array(3)->constant());
  BasicType bt = Matcher::vector_element_basic_type(this, opnd_array(1));
  ___masm. vpcmpu(bt, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */,
            opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);

39711#line 39711 "ad_x86.cpp"
}
39713}

39715void vcmpu32Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cond
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// dst
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// vtmp2
unsigned idx7 = idx6 + opnd_array(6)->num_edges(); 	// vtmp3
unsigned idx8 = idx7 + opnd_array(7)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

39730#line 7348 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred(opnd_array(3)->constant());
  BasicType bt = Matcher::vector_element_basic_type(this, opnd_array(1));
  ___masm. vpcmpu32(bt, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp1 */,
              opnd_array(6)->as_XMMRegister(ra_,this,idx6)/* vtmp2 */, opnd_array(7)->as_XMMRegister(ra_,this,idx7)/* vtmp3 */, opnd_array(8)->as_Register(ra_,this,idx8)/* scratch */);

39738#line 39738 "ad_x86.cpp"
}
39740}

39742void vcmpu64Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cond
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

39754#line 7365 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7366, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred(opnd_array(3)->constant());
  bool is_unsigned = is_unsigned_booltest_pred(opnd_array(3)->constant());
  KRegister mask = k0; // The comparison itself is not being masked.
  bool merge = false;
  BasicType src1_elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));

  switch (src1_elem_bt) {
    case T_INT: {
      ___masm. evpcmpd(opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, mask, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      ___masm. evmovdqul(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, ExternalAddress(vector_all_bits_set()), merge, vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
      break;
    }
    case T_LONG: {
      ___masm. evpcmpq(opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, mask, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      ___masm. evmovdquq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, ExternalAddress(vector_all_bits_set()), merge, vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
      break;
    }
    default: assert(false, "%s", type2name(src1_elem_bt))do { if (!(false)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7386, "assert(" "false" ") failed", "%s", type2name(src1_elem_bt
)); ::breakpoint(); } } while (0);
  }

39779#line 39779 "ad_x86.cpp"
}
39781}

39783void evcmpNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cond
{
  C2_MacroAssembler _masm(&cbuf);

39793#line 7398 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7399, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  assert(bottom_type()->isa_vectmask(), "TypeVectMask expected")do { if (!(bottom_type()->isa_vectmask())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 7400, "assert(" "bottom_type()->isa_vectmask()" ") failed"
, "TypeVectMask expected"); ::breakpoint(); } } while (0);

  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred(opnd_array(3)->constant());
  bool is_unsigned = is_unsigned_booltest_pred(opnd_array(3)->constant());
  BasicType src1_elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));

  // Comparison i
  switch (src1_elem_bt) {
    case T_BYTE: {
      ___masm. evpcmpb(opnd_array(0)->as_KRegister(ra_,this)/* dst */, k0, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      break;
    }
    case T_SHORT: {
      ___masm. evpcmpw(opnd_array(0)->as_KRegister(ra_,this)/* dst */, k0, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      break;
    }
    case T_INT: {
      ___masm. evpcmpd(opnd_array(0)->as_KRegister(ra_,this)/* dst */, k0, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      break;
    }
    case T_LONG: {
      ___masm. evpcmpq(opnd_array(0)->as_KRegister(ra_,this)/* dst */, k0, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      break;
    }
    default: assert(false, "%s", type2name(src1_elem_bt))do { if (!(false)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7425, "assert(" "false" ") failed", "%s", type2name(src1_elem_bt
)); ::breakpoint(); } } while (0);
  }

39824#line 39824 "ad_x86.cpp"
}
39826}

39828void extractINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
{
  C2_MacroAssembler _masm(&cbuf);

39837#line 7441 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7442, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  BasicType elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));
  ___masm. get_elem(elem_bt, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());

39844#line 39844 "ad_x86.cpp"
}
39846}

39848void extractI_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
{
  C2_MacroAssembler _masm(&cbuf);

39857#line 7441 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7442, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  BasicType elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));
  ___masm. get_elem(elem_bt, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());

39864#line 39864 "ad_x86.cpp"
}
39866}

39868void extractI_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
{
  C2_MacroAssembler _masm(&cbuf);

39877#line 7441 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7442, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  BasicType elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));
  ___masm. get_elem(elem_bt, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());

39884#line 39884 "ad_x86.cpp"
}
39886}

39888void vextractINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

39898#line 7460 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7461, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  BasicType elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));
  XMMRegister lane_xmm = ___masm. get_lane(elem_bt, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());
  ___masm. get_elem(elem_bt, opnd_array(0)->as_Register(ra_,this)/* dst */, lane_xmm, opnd_array(2)->constant());

39906#line 39906 "ad_x86.cpp"
}
39908}

39910void vextractI_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

39920#line 7460 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7461, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  BasicType elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));
  XMMRegister lane_xmm = ___masm. get_lane(elem_bt, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());
  ___masm. get_elem(elem_bt, opnd_array(0)->as_Register(ra_,this)/* dst */, lane_xmm, opnd_array(2)->constant());

39928#line 39928 "ad_x86.cpp"
}
39930}

39932void vextractI_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

39942#line 7460 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7461, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  BasicType elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));
  XMMRegister lane_xmm = ___masm. get_lane(elem_bt, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());
  ___masm. get_elem(elem_bt, opnd_array(0)->as_Register(ra_,this)/* dst */, lane_xmm, opnd_array(2)->constant());

39950#line 39950 "ad_x86.cpp"
}
39952}

39954void extractLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
{
  C2_MacroAssembler _masm(&cbuf);

39963#line 7475 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7476, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);
  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7477, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  ___masm. get_elem(T_LONG, opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());

39970#line 39970 "ad_x86.cpp"
}
39972}

39974void vextractLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

39984#line 7490 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7491, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  XMMRegister lane_reg = ___masm. get_lane(T_LONG, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());
  ___masm. get_elem(T_LONG, opnd_array(0)->as_Register(ra_,this)/* dst */, lane_reg, opnd_array(2)->constant());

39991#line 39991 "ad_x86.cpp"
}
39993}

39995void extractFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

40007#line 7505 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7506, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  ___masm. get_elem(T_FLOAT, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp */);

40013#line 40013 "ad_x86.cpp"
}
40015}

40017void vextractFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

40028#line 7519 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7520, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  XMMRegister lane_reg = ___masm. get_lane(T_FLOAT, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());
  ___masm. get_elem(T_FLOAT, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, lane_reg, opnd_array(2)->constant(), opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */);

40035#line 40035 "ad_x86.cpp"
}
40037}

40039void extractDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
{
  C2_MacroAssembler _masm(&cbuf);

40048#line 7532 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7533, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  ___masm. get_elem(T_DOUBLE, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());

40054#line 40054 "ad_x86.cpp"
}
40056}

40058void vextractDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// idx
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

40068#line 7546 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1)), "out of bounds")do { if (!(opnd_array(2)->constant()< (int)Matcher::vector_length
(this, opnd_array(1)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7547, "assert(" "opnd_array(2)->constant()< (int)Matcher::vector_length(this, opnd_array(1))"
 ") failed", "out of bounds"); ::breakpoint(); } } while (0);

  XMMRegister lane_reg = ___masm. get_lane(T_DOUBLE, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant());
  ___masm. get_elem(T_DOUBLE, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, lane_reg, opnd_array(2)->constant());

40075#line 40075 "ad_x86.cpp"
}
40077}

40079void blendvpNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

40090#line 7562 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7563, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);

  if (opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* mask */!= opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */) {
    ___masm. movdqu(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* tmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* mask */);
  }
  ___masm. pblendvb(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */); // uses xmm0 as mask

40099#line 40099 "ad_x86.cpp"
}
40101}

40103void vblendvpINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

40113#line 7580 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpblendvb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* mask */, vlen_enc);

40118#line 40118 "ad_x86.cpp"
}
40120}

40122void vblendvpFDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

40132#line 7594 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vblendvps(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* mask */, vlen_enc);

40137#line 40137 "ad_x86.cpp"
}
40139}

40141void evblendvp64Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

40153#line 7607 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

   int vlen_enc = Assembler::AVX_512bit;
   BasicType elem_bt = Matcher::vector_element_basic_type(this);
  ___masm. evpcmp(elem_bt, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, k0, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* mask */, ExternalAddress(vector_all_bits_set()), Assembler::eq, vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
  ___masm. evpblend(elem_bt, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

40160#line 40160 "ad_x86.cpp"
}
40162}

40164void evblendvp64_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

40175#line 7624 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  ___masm. evpblend(elem_bt, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

40181#line 40181 "ad_x86.cpp"
}
40183}

40185void vabsB_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

40193#line 7638 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 16) {
    ___masm. pabsb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpabsb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  }

40203#line 40203 "ad_x86.cpp"
}
40205}

40207void vabsS_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

40215#line 7654 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 8) {
    ___masm. pabsw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpabsw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  }

40225#line 40225 "ad_x86.cpp"
}
40227}

40229void vabsI_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

40237#line 7670 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint vlen = Matcher::vector_length(this);
  if (vlen <= 4) {
    ___masm. pabsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vpabsd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  }

40247#line 40247 "ad_x86.cpp"
}
40249}

40251void vabsL_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

40259#line 7686 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7687, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  if (!VM_Version::supports_avx512vl()) {
    vlen_enc = Assembler::AVX_512bit;
  }
  ___masm. evpabsq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

40268#line 40268 "ad_x86.cpp"
}
40270}

40272void vabsnegFNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

40281#line 7706 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    ___masm. vabsnegf(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
  } else {
    assert(vlen == 8 || vlen == 16, "required")do { if (!(vlen == 8 || vlen == 16)) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 7712, "assert(" "vlen == 8 || vlen == 16" ") failed", "required"
); ::breakpoint(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    ___masm. vabsnegf(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
  }

40293#line 40293 "ad_x86.cpp"
}
40295}

40297void vabsnegF_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

40306#line 7706 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  int vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    ___masm. vabsnegf(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
  } else {
    assert(vlen == 8 || vlen == 16, "required")do { if (!(vlen == 8 || vlen == 16)) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 7712, "assert(" "vlen == 8 || vlen == 16" ") failed", "required"
); ::breakpoint(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    ___masm. vabsnegf(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
  }

40318#line 40318 "ad_x86.cpp"
}
40320}

40322void vabsneg4FNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

40331#line 7727 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  ___masm. vabsnegf(opcode, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);

40336#line 40336 "ad_x86.cpp"
}
40338}

40340void vabsneg4F_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

40349#line 7727 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  ___masm. vabsnegf(opcode, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);

40354#line 40354 "ad_x86.cpp"
}
40356}

40358void vabsnegDNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

40367#line 7739 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  uint vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    assert(UseSSE >= 2, "required")do { if (!(UseSSE >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7743, "assert(" "UseSSE >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);
    ___masm. vabsnegd(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vabsnegd(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
  }

40379#line 40379 "ad_x86.cpp"
}
40381}

40383void vabsnegD_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

40392#line 7739 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  uint vlen = Matcher::vector_length(this);
  if (vlen == 2) {
    assert(UseSSE >= 2, "required")do { if (!(UseSSE >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7743, "assert(" "UseSSE >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);
    ___masm. vabsnegd(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
  } else {
    int vlen_enc = vector_length_encoding(this);
    ___masm. vabsnegd(opcode, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */);
  }

40404#line 40404 "ad_x86.cpp"
}
40406}

40408void vptest_alltrue_lt16Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp2
{
  C2_MacroAssembler _masm(&cbuf);

40419#line 7764 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  ___masm. vectortest(BoolTest::overflow, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp2 */);
  ___masm. setb(Assembler::carrySet, opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

40426#line 40426 "ad_x86.cpp"
}
40428}

40430void vptest_alltrue_ge16Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

40439#line 7781 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  ___masm. vectortest(BoolTest::overflow, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, xnoreg, xnoreg, knoreg);
  ___masm. setb(Assembler::carrySet, opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

40446#line 40446 "ad_x86.cpp"
}
40448}

40450void vptest_alltrue_lt8_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// kscratch
{
  C2_MacroAssembler _masm(&cbuf);

40460#line 7798 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  const MachNode* mask1 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(1))));
  const MachNode* mask2 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(2))));
  assert(0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type()), "")do { if (!(0 == Type::cmp(mask1->bottom_type(), mask2->
bottom_type()))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7801, "assert(" "0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type())"
 ") failed", ""); ::breakpoint(); } } while (0);
  uint masklen = Matcher::vector_length(this, opnd_array(1));
  ___masm. alltrue(opnd_array(0)->as_Register(ra_,this)/* dst */, masklen, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_KRegister(ra_,this,idx3)/* kscratch */);

40468#line 40468 "ad_x86.cpp"
}
40470}

40472void vptest_alltrue_ge8_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

40481#line 7817 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  const MachNode* mask1 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(1))));
  const MachNode* mask2 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(2))));
  assert(0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type()), "")do { if (!(0 == Type::cmp(mask1->bottom_type(), mask2->
bottom_type()))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7820, "assert(" "0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type())"
 ") failed", ""); ::breakpoint(); } } while (0);
  uint masklen = Matcher::vector_length(this, opnd_array(1));
  ___masm. alltrue(opnd_array(0)->as_Register(ra_,this)/* dst */, masklen, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* src2 */, knoreg);

40489#line 40489 "ad_x86.cpp"
}
40491}

40493void vptest_anytrue_lt16Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

40503#line 7836 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  ___masm. vectortest(BoolTest::ne, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);
  ___masm. setb(Assembler::notZero, opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

40510#line 40510 "ad_x86.cpp"
}
40512}

40514void vptest_anytrue_ge16Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

40523#line 7853 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  ___masm. vectortest(BoolTest::ne, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, xnoreg, xnoreg, knoreg);
  ___masm. setb(Assembler::notZero, opnd_array(0)->as_Register(ra_,this)/* dst */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* dst */, opnd_array(0)->as_Register(ra_,this)/* dst */);

40530#line 40530 "ad_x86.cpp"
}
40532}

40534void vptest_anytrue_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

40543#line 7868 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  const MachNode* mask1 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(1))));
  const MachNode* mask2 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(2))));
  assert(0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type()), "")do { if (!(0 == Type::cmp(mask1->bottom_type(), mask2->
bottom_type()))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7871, "assert(" "0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type())"
 ") failed", ""); ::breakpoint(); } } while (0);
  uint  masklen = Matcher::vector_length(this, opnd_array(1));
  ___masm. anytrue(opnd_array(0)->as_Register(ra_,this)/* dst */, masklen, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* src2 */);

40551#line 40551 "ad_x86.cpp"
}
40553}

40555void cmpvptest_anytrue_lt16Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

40566#line 7886 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  ___masm. vectortest(BoolTest::ne, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */);

40571#line 40571 "ad_x86.cpp"
}
40573}

40575void cmpvptest_anytrue_ge16Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

40585#line 7900 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length_in_bytes(this, opnd_array(1));
  ___masm. vectortest(BoolTest::ne, vlen, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, xnoreg, xnoreg, knoreg);

40590#line 40590 "ad_x86.cpp"
}
40592}

40594void cmpvptest_anytrue_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// zero
{
  C2_MacroAssembler _masm(&cbuf);

40604#line 7912 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint masklen = Matcher::vector_length(this, opnd_array(1));
  const MachNode* mask1 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(1))));
  const MachNode* mask2 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(2))));
  assert(0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type()), "")do { if (!(0 == Type::cmp(mask1->bottom_type(), mask2->
bottom_type()))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7916, "assert(" "0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type())"
 ") failed", ""); ::breakpoint(); } } while (0);
  masklen = masklen < 8 ? 8 : masklen;
  ___masm. ktest(masklen, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* src2 */);

40613#line 40613 "ad_x86.cpp"
}
40615}

40617void loadMaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

40626#line 7931 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_in_bytes = Matcher::vector_length_in_bytes(this);
  BasicType elem_bt = Matcher::vector_element_basic_type(this);
  ___masm. load_vector_mask(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_in_bytes, elem_bt, true);

40632#line 40632 "ad_x86.cpp"
}
40634}

40636void loadMask64Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// xtmp
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

40646#line 7944 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. load_vector_mask(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* xtmp */,
                      opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, true, Assembler::AVX_512bit);

40651#line 40651 "ad_x86.cpp"
}
40653}

40655void loadMask_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

40664#line 7956 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(in(1));
  ___masm. load_vector_mask(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* xtmp */,
                      noreg, false, vlen_enc);

40670#line 40670 "ad_x86.cpp"
}
40672}

40674void vstoreMask1BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
{
  C2_MacroAssembler _masm(&cbuf);

40683#line 7970 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen = Matcher::vector_length(this);
  if (vlen <= 16 && UseAVX <= 2) {
    assert(UseSSE >= 3, "required")do { if (!(UseSSE >= 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7973, "assert(" "UseSSE >= 3" ") failed", "required"); ::
breakpoint(); } } while (0);
    ___masm. pabsb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  } else {
    assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7976, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);
    int src_vlen_enc = vector_length_encoding(this, opnd_array(1));
    ___masm. vpabsb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, src_vlen_enc);
  }

40695#line 40695 "ad_x86.cpp"
}
40697}

40699void vstoreMask2BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

40710#line 7989 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = Assembler::AVX_128bit;
  int vlen = Matcher::vector_length(this);
  if (vlen <= 8) {
    assert(UseSSE >= 3, "required")do { if (!(UseSSE >= 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7993, "assert(" "UseSSE >= 3" ") failed", "required"); ::
breakpoint(); } } while (0);
    ___masm. pxor(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */);
    ___masm. pabsw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
    ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */);
  } else {
    assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 7998, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);
    ___masm. vextracti128(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0x1);
    ___masm. vpacksswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
    ___masm. vpabsb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  }

40726#line 40726 "ad_x86.cpp"
}
40728}

40730void vstoreMask4BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

40741#line 8012 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = Assembler::AVX_128bit;
  int vlen = Matcher::vector_length(this);
  if (vlen <= 4) {
    assert(UseSSE >= 3, "required")do { if (!(UseSSE >= 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8016, "assert(" "UseSSE >= 3" ") failed", "required"); ::
breakpoint(); } } while (0);
    ___masm. pxor(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */);
    ___masm. pabsd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
    ___masm. packusdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */);
    ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */);
  } else {
    assert(UseAVX > 0, "required")do { if (!(UseAVX > 0)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8022, "assert(" "UseAVX > 0" ") failed", "required"); ::breakpoint
(); } } while (0);
    ___masm. vpxor(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */, vlen_enc);
    ___masm. vextracti128(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0x1);
    ___masm. vpackssdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
    ___masm. vpacksswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */, vlen_enc);
    ___masm. vpabsb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);
  }

40760#line 40760 "ad_x86.cpp"
}
40762}

40764void storeMask8BNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

40775#line 8038 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 3, "required")do { if (!(UseSSE >= 3)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8039, "assert(" "UseSSE >= 3" ") failed", "required"); ::
breakpoint(); } } while (0);
  ___masm. pxor(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */);
  ___masm. pshufd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0x8);
  ___masm. pabsd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */);
  ___masm. packusdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */);
  ___masm. packuswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */);

40784#line 40784 "ad_x86.cpp"
}
40786}

40788void storeMask8B_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp
{
  C2_MacroAssembler _masm(&cbuf);

40799#line 8054 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = Assembler::AVX_128bit;
  ___masm. vpshufps(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 0x88, Assembler::AVX_256bit);
  ___masm. vextracti128(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, 0x1);
  ___masm. vblendps(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, 0xC, vlen_enc);
  ___masm. vpxor(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, vlen_enc);
  ___masm. vpackssdw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, vlen_enc);
  ___masm. vpacksswb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp */, vlen_enc);
  ___masm. vpabsb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, vlen_enc);

40810#line 40810 "ad_x86.cpp"
}
40812}

40814void vstoreMask4B_evex_novectmaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
{
  C2_MacroAssembler _masm(&cbuf);

40823#line 8071 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int src_vlen_enc = vector_length_encoding(this, opnd_array(1));
  int dst_vlen_enc = vector_length_encoding(this);
  if (!VM_Version::supports_avx512vl()) {
    src_vlen_enc = Assembler::AVX_512bit;
  }
  ___masm. evpmovdb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, src_vlen_enc);
  ___masm. vpabsb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, dst_vlen_enc);

40833#line 40833 "ad_x86.cpp"
}
40835}

40837void vstoreMask8B_evex_novectmaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
{
  C2_MacroAssembler _masm(&cbuf);

40846#line 8087 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int src_vlen_enc = vector_length_encoding(this, opnd_array(1));
  int dst_vlen_enc = vector_length_encoding(this);
  if (!VM_Version::supports_avx512vl()) {
    src_vlen_enc = Assembler::AVX_512bit;
  }
  ___masm. evpmovqb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, src_vlen_enc);
  ___masm. vpabsb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, dst_vlen_enc);

40856#line 40856 "ad_x86.cpp"
}
40858}

40860void vstoreMask_evex_vectmaskNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

40871#line 8104 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(Matcher::vector_length_in_bytes(this, opnd_array(1)) == 64, "")do { if (!(Matcher::vector_length_in_bytes(this, opnd_array(1
)) == 64)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 8105, "assert(" "Matcher::vector_length_in_bytes(this, opnd_array(1)) == 64"
 ") failed", ""); ::breakpoint(); } } while (0);
  ___masm. evmovdqul(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* mask */, ExternalAddress(vector_int_mask_cmp_bits()),
               false, Assembler::AVX_512bit, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */);
  ___masm. evpmovdb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, Assembler::AVX_512bit);

40878#line 40878 "ad_x86.cpp"
}
40880}

40882void vstoreMask_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

40892#line 8118 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int dst_vlen_enc = vector_length_encoding(this);
  ___masm. evpmovm2b(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* mask */, dst_vlen_enc);
  ___masm. vpabsb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, dst_vlen_enc);

40898#line 40898 "ad_x86.cpp"
}
40900}

40902void vmaskcast_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

40910#line 8131 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  // empty

40914#line 40914 "ad_x86.cpp"
}
40916}

40918void vmaskcastNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

40926#line 8143 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  // empty

40930#line 40930 "ad_x86.cpp"
}
40932}

40934void loadIotaIndicesNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

40943#line 8156 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

   int vlen_in_bytes = Matcher::vector_length_in_bytes(this);
   ___masm. load_iota_indices(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* scratch */, vlen_in_bytes);

40948#line 40948 "ad_x86.cpp"
}
40950}

40952void loadShuffleBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

40960#line 8171 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  // empty

40964#line 40964 "ad_x86.cpp"
}
40966}

40968void rearrangeBNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
{
  C2_MacroAssembler _masm(&cbuf);

40977#line 8182 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8183, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);
  ___masm. pshufb(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */);

40982#line 40982 "ad_x86.cpp"
}
40984}

40986void rearrangeB_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

40999#line 8195 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8196, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);
  // Swap src into vtmp1
  ___masm. vperm2i128(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 1);
  // Shuffle swapped src to get entries from other 128 bit lane
  ___masm. vpshufb(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, Assembler::AVX_256bit);
  // Shuffle original src to get entries from self 128 bit lane
  ___masm. vpshufb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, Assembler::AVX_256bit);
  // Create a blend mask by setting high bits for entries coming from other lane in shuffle
  ___masm. vpaddb(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, ExternalAddress(vector_byte_shufflemask()), Assembler::AVX_256bit, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  // Perform the blend
  ___masm. vpblendvb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, Assembler::AVX_256bit);

41013#line 41013 "ad_x86.cpp"
}
41015}

41017void rearrangeB_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
{
  C2_MacroAssembler _masm(&cbuf);

41026#line 8216 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpermb(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

41031#line 41031 "ad_x86.cpp"
}
41033}

41035void loadShuffleSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

41046#line 8231 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  // Create a byte shuffle mask from short shuffle mask
  // only byte shuffle instruction available on these platforms
  int vlen_in_bytes = Matcher::vector_length_in_bytes(this);
  if (UseAVX == 0) {
    assert(vlen_in_bytes <= 16, "required")do { if (!(vlen_in_bytes <= 16)) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 8236, "assert(" "vlen_in_bytes <= 16" ") failed", "required"
); ::breakpoint(); } } while (0);
    // Multiply each shuffle by two to get byte index
    ___masm. pmovzxbw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
    ___masm. psllw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 1);

    // Duplicate to create 2 copies of byte index
    ___masm. movdqu(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);
    ___masm. psllw(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, 8);
    ___masm. por(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);

    // Add one to get alternate byte index
    ___masm. movdqu(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, ExternalAddress(vector_short_shufflemask()), opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
    ___masm. paddb(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);
  } else {
    assert(UseAVX > 1 || vlen_in_bytes <= 16, "required")do { if (!(UseAVX > 1 || vlen_in_bytes <= 16)) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 8250, "assert(" "UseAVX > 1 || vlen_in_bytes <= 16" ") failed"
, "required"); ::breakpoint(); } } while (0);
    int vlen_enc = vector_length_encoding(this);
    // Multiply each shuffle by two to get byte index
    ___masm. vpmovzxbw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
    ___masm. vpsllw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 1, vlen_enc);

    // Duplicate to create 2 copies of byte index
    ___masm. vpsllw(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */,  8, vlen_enc);
    ___masm. vpor(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, vlen_enc);

    // Add one to get alternate byte index
    ___masm. vpaddb(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, ExternalAddress(vector_short_shufflemask()), vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
  }

41080#line 41080 "ad_x86.cpp"
}
41082}

41084void rearrangeSNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
{
  C2_MacroAssembler _masm(&cbuf);

41093#line 8272 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8273, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);
  ___masm. pshufb(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */);

41098#line 41098 "ad_x86.cpp"
}
41100}

41102void rearrangeS_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// vtmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// vtmp2
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

41115#line 8285 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8286, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);
  // Swap src into vtmp1
  ___masm. vperm2i128(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, 1);
  // Shuffle swapped src to get entries from other 128 bit lane
  ___masm. vpshufb(opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, Assembler::AVX_256bit);
  // Shuffle original src to get entries from self 128 bit lane
  ___masm. vpshufb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, Assembler::AVX_256bit);
  // Create a blend mask by setting high bits for entries coming from other lane in shuffle
  ___masm. vpaddb(opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, ExternalAddress(vector_byte_shufflemask()), Assembler::AVX_256bit, opnd_array(6)->as_Register(ra_,this,idx6)/* scratch */);
  // Perform the blend
  ___masm. vpblendvb(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* vtmp1 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* vtmp2 */, Assembler::AVX_256bit);

41129#line 41129 "ad_x86.cpp"
}
41131}

41133void loadShuffleS_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

41141#line 8306 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  if (!VM_Version::supports_avx512vl()) {
    vlen_enc = Assembler::AVX_512bit;
  }
  ___masm. vpmovzxbw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

41149#line 41149 "ad_x86.cpp"
}
41151}

41153void rearrangeS_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
{
  C2_MacroAssembler _masm(&cbuf);

41162#line 8321 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  if (!VM_Version::supports_avx512vl()) {
    vlen_enc = Assembler::AVX_512bit;
  }
  ___masm. vpermw(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

41170#line 41170 "ad_x86.cpp"
}
41172}

41174void loadShuffleINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

41185#line 8339 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8340, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);

  // Create a byte shuffle mask from int shuffle mask
  // only byte shuffle instruction available on these platforms

  // Duplicate and multiply each shuffle by 4
  ___masm. pmovzxbd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */);
  ___masm. pshuflw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 0xA0);
  ___masm. pshufhw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 0xA0);
  ___masm. psllw(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 2);

  // Duplicate again to create 4 copies of byte index
  ___masm. movdqu(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);
  ___masm. psllw(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, 8);
  ___masm. por(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */);

  // Add 3,2,1,0 to get alternate byte index
  ___masm. movdqu(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, ExternalAddress(vector_int_shufflemask()), opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);
  ___masm. paddb(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */);

41207#line 41207 "ad_x86.cpp"
}
41209}

41211void rearrangeINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
{
  C2_MacroAssembler _masm(&cbuf);

41220#line 8368 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseSSE >= 4, "required")do { if (!(UseSSE >= 4)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8369, "assert(" "UseSSE >= 4" ") failed", "required"); ::
breakpoint(); } } while (0);
  ___masm. pshufb(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */);

41225#line 41225 "ad_x86.cpp"
}
41227}

41229void loadShuffleI_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

41237#line 8380 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

int vlen_enc = vector_length_encoding(this);
  ___masm. vpmovzxbd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

41242#line 41242 "ad_x86.cpp"
}
41244}

41246void rearrangeI_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
{
  C2_MacroAssembler _masm(&cbuf);

41255#line 8392 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  if (vlen_enc == Assembler::AVX_128bit) {
    vlen_enc = Assembler::AVX_256bit;
  }
  ___masm. vpermd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

41263#line 41263 "ad_x86.cpp"
}
41265}

41267void loadShuffleLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// vtmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

41278#line 8410 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8411, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int vlen_enc = vector_length_encoding(this);
  // Create a double word shuffle mask from long shuffle mask
  // only double word shuffle instruction available on these platforms

  // Multiply each shuffle by two to get double word index
  ___masm. vpmovzxbq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);
  ___masm. vpsllq(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 1, vlen_enc);

  // Duplicate each double word shuffle
  ___masm. vpsllq(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, 32, vlen_enc);
  ___masm. vpor(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* vtmp */, vlen_enc);

  // Add one to get alternate double word index
  ___masm. vpaddd(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, ExternalAddress(vector_long_shufflemask()), vlen_enc, opnd_array(4)->as_Register(ra_,this,idx4)/* scratch */);

41297#line 41297 "ad_x86.cpp"
}
41299}

41301void rearrangeLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
{
  C2_MacroAssembler _masm(&cbuf);

41310#line 8436 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX >= 2, "required")do { if (!(UseAVX >= 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8437, "assert(" "UseAVX >= 2" ") failed", "required"); ::
breakpoint(); } } while (0);

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpermd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

41317#line 41317 "ad_x86.cpp"
}
41319}

41321void loadShuffleL_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

41329#line 8450 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8451, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmovzxbq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

41336#line 41336 "ad_x86.cpp"
}
41338}

41340void rearrangeL_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shuffle
{
  C2_MacroAssembler _masm(&cbuf);

41349#line 8464 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8465, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);

  int vlen_enc = vector_length_encoding(this);
  if (vlen_enc == Assembler::AVX_128bit) {
    vlen_enc = Assembler::AVX_256bit;
  }
  ___masm. vpermq(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shuffle */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

41359#line 41359 "ad_x86.cpp"
}
41361}

41363void vfmaF_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// c
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// a
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// b
{
  C2_MacroAssembler _masm(&cbuf);

41373#line 8483 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseFMA, "not enabled")do { if (!(UseFMA)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8484, "assert(" "UseFMA" ") failed", "not enabled"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vfmaf(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* a */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, vlen_enc);

41379#line 41379 "ad_x86.cpp"
}
41381}

41383void vfmaF_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// c
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// a
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// b
{
  C2_MacroAssembler _masm(&cbuf);

41393#line 8496 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseFMA, "not enabled")do { if (!(UseFMA)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8497, "assert(" "UseFMA" ") failed", "not enabled"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vfmaf(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* a */, Address::make_raw(opnd_array(3)->base(ra_,this,idx3), opnd_array(3)->index(ra_,this,idx3), opnd_array(3)->scale(), opnd_array(3)->disp(ra_,this,idx3), opnd_array(3)->disp_reloc()), opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, vlen_enc);

41399#line 41399 "ad_x86.cpp"
}
41401}

41403void vfmaD_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// c
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// a
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// b
{
  C2_MacroAssembler _masm(&cbuf);

41413#line 8508 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseFMA, "not enabled")do { if (!(UseFMA)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8509, "assert(" "UseFMA" ") failed", "not enabled"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vfmad(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* a */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* b */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, vlen_enc);

41419#line 41419 "ad_x86.cpp"
}
41421}

41423void vfmaD_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// c
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// a
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// b
{
  C2_MacroAssembler _masm(&cbuf);

41433#line 8521 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseFMA, "not enabled")do { if (!(UseFMA)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8522, "assert(" "UseFMA" ") failed", "not enabled"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. vfmad(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* a */, Address::make_raw(opnd_array(3)->base(ra_,this,idx3), opnd_array(3)->index(ra_,this,idx3), opnd_array(3)->scale(), opnd_array(3)->disp(ra_,this,idx3), opnd_array(3)->disp_reloc()), opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* c */, vlen_enc);

41439#line 41439 "ad_x86.cpp"
}
41441}

41443void vmuladdS2I_reg_sseNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
{
  C2_MacroAssembler _masm(&cbuf);

41452#line 8535 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. pmaddwd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src1 */);

41456#line 41456 "ad_x86.cpp"
}
41458}

41460void vmuladdS2I_reg_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

41469#line 8545 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpmaddwd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

41474#line 41474 "ad_x86.cpp"
}
41476}

41478void vmuladdaddS2I_regNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

41488#line 8558 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8559, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. evpdpwssd(opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, vlen_enc);

41494#line 41494 "ad_x86.cpp"
}
41496}

41498void vmuladdaddS2I_reg_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src1
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src2
{
  C2_MacroAssembler _masm(&cbuf);

41508#line 8558 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UseAVX > 2, "required")do { if (!(UseAVX > 2)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8559, "assert(" "UseAVX > 2" ") failed", "required"); ::breakpoint
(); } } while (0);
  int vlen_enc = vector_length_encoding(this);
  ___masm. evpdpwssd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src1 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* src2 */, vlen_enc);

41514#line 41514 "ad_x86.cpp"
}
41516}

41518void vpopcountINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

41526#line 8572 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(UsePopCountInstruction, "not enabled")do { if (!(UsePopCountInstruction)) { (*g_assert_poison) = 'X'
;; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 8573, "assert(" "UsePopCountInstruction" ") failed", "not enabled"
); ::breakpoint(); } } while (0);

  int vlen_enc = vector_length_encoding(this);
  ___masm. vpopcntd(opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, vlen_enc);

41533#line 41533 "ad_x86.cpp"
}
41535}

41537void vpternlogNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src3
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// func
{
  C2_MacroAssembler _masm(&cbuf);

41548#line 8587 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vector_len = vector_length_encoding(this);
  ___masm. vpternlogd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(4)->constant(), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* src3 */, vector_len);

41553#line 41553 "ad_x86.cpp"
}
41555}

41557void vpternlog_memNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src3
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// func
{
  C2_MacroAssembler _masm(&cbuf);

41568#line 8599 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vector_len = vector_length_encoding(this);
  ___masm. vpternlogd(opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(4)->constant(), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, Address::make_raw(opnd_array(3)->base(ra_,this,idx3), opnd_array(3)->index(ra_,this,idx3), opnd_array(3)->scale(), opnd_array(3)->disp(ra_,this,idx3), opnd_array(3)->disp_reloc()), vector_len);

41573#line 41573 "ad_x86.cpp"
}
41575}

41577void vprotate_immI8Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

41586#line 8611 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode      = this->ideal_Opcode();
  int vector_len  = vector_length_encoding(this);
  BasicType etype = this->bottom_type()->is_vect()->element_basic_type();
  ___masm. vprotate_imm(opcode, etype, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), vector_len);

41593#line 41593 "ad_x86.cpp"
}
41595}

41597void vprotate_immI8_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

41606#line 8611 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode      = this->ideal_Opcode();
  int vector_len  = vector_length_encoding(this);
  BasicType etype = this->bottom_type()->is_vect()->element_basic_type();
  ___masm. vprotate_imm(opcode, etype, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->constant(), vector_len);

41613#line 41613 "ad_x86.cpp"
}
41615}

41617void vprorateNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

41626#line 8624 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode      = this->ideal_Opcode();
  int vector_len  = vector_length_encoding(this);
  BasicType etype = this->bottom_type()->is_vect()->element_basic_type();
  ___masm. vprotate_var(opcode, etype, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vector_len);

41633#line 41633 "ad_x86.cpp"
}
41635}

41637void vprorate_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
{
  C2_MacroAssembler _masm(&cbuf);

41646#line 8624 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode      = this->ideal_Opcode();
  int vector_len  = vector_length_encoding(this);
  BasicType etype = this->bottom_type()->is_vect()->element_basic_type();
  ___masm. vprotate_var(opcode, etype, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* shift */, vector_len);

41653#line 41653 "ad_x86.cpp"
}
41655}

41657void vmask_cmp_nodeNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// dst
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp1
unsigned idx6 = idx5 + opnd_array(5)->num_edges(); 	// ktmp2
{
  C2_MacroAssembler _masm(&cbuf);

41670#line 8640 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(vector_length_encoding(this, opnd_array(1)) == vector_length_encoding(this, opnd_array(2)), "mismatch")do { if (!(vector_length_encoding(this, opnd_array(1)) == vector_length_encoding
(this, opnd_array(2)))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 8641, "assert(" "vector_length_encoding(this, opnd_array(1)) == vector_length_encoding(this, opnd_array(2))"
 ") failed", "mismatch"); ::breakpoint(); } } while (0);
  assert(Matcher::vector_element_basic_type(this, opnd_array(1)) == Matcher::vector_element_basic_type(this, opnd_array(2)), "mismatch")do { if (!(Matcher::vector_element_basic_type(this, opnd_array
(1)) == Matcher::vector_element_basic_type(this, opnd_array(2
)))) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 8642, "assert(" "Matcher::vector_element_basic_type(this, opnd_array(1)) == Matcher::vector_element_basic_type(this, opnd_array(2))"
 ") failed", "mismatch"); ::breakpoint(); } } while (0);

  Label DONE;
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  BasicType elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));

  ___masm. knotql(opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp2 */, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */);
  ___masm. mov64(opnd_array(4)->as_Register(ra_,this,idx4)/* dst */, -1L);
  ___masm. evpcmp(elem_bt, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp1 */, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, Assembler::eq, vlen_enc);
  ___masm. kortestql(opnd_array(6)->as_KRegister(ra_,this,idx6)/* ktmp2 */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp1 */);
  ___masm. jccb(Assembler::carrySet, DONE)jccb_0(Assembler::carrySet, DONE, "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 8652);
  ___masm. kmovql(opnd_array(4)->as_Register(ra_,this,idx4)/* dst */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp1 */);
  ___masm. notq(opnd_array(4)->as_Register(ra_,this,idx4)/* dst */);
  ___masm. tzcntq(opnd_array(4)->as_Register(ra_,this,idx4)/* dst */, opnd_array(4)->as_Register(ra_,this,idx4)/* dst */);
  ___masm. bind(DONE);

41689#line 41689 "ad_x86.cpp"
}
41691}

41693void vmasked_load64Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

41702#line 8665 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  BasicType elmType =  this->bottom_type()->is_vect()->element_basic_type();
  int vector_len = vector_length_encoding(this);
  ___masm. evmovdqu(elmType, opnd_array(2)->as_KRegister(ra_,this,idx2)/* mask */, opnd_array(0)->as_XMMRegister(ra_,this)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), vector_len);

41708#line 41708 "ad_x86.cpp"
}
41710}

41712void vmask_genNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// len
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// temp
{
  C2_MacroAssembler _masm(&cbuf);

41721#line 8677 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. genmask(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* len */, opnd_array(2)->as_Register(ra_,this,idx2)/* temp */);

41725#line 41725 "ad_x86.cpp"
}
41727}

41729void vmask_gen_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// len
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// temp
{
  C2_MacroAssembler _masm(&cbuf);

41738#line 8687 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. mov64(opnd_array(2)->as_Register(ra_,this,idx2)/* temp */, (0xFFFFFFFFFFFFFFFFUL >> (64 -opnd_array(1)->constantL())));
  ___masm. kmovql(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(2)->as_Register(ra_,this,idx2)/* temp */);

41743#line 41743 "ad_x86.cpp"
}
41745}

41747void vmasked_store64Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

41757#line 8697 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  const MachNode* src_node = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(2))));
  BasicType elmType =  src_node->bottom_type()->is_vect()->element_basic_type();
  int vector_len = vector_length_encoding(src_node);
  ___masm. evmovdqu(elmType, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src */, vector_len);

41764#line 41764 "ad_x86.cpp"
}
41766}

41768void vmask_tolong_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

41777#line 8711 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int mask_size = mask_len * type2aelembytes(mbt);
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* mask */,
                           opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, mask_len, mask_size, vlen_enc);

41787#line 41787 "ad_x86.cpp"
}
41789}

41791void vmask_tolong_boolNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

41801#line 8728 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* mask */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* xtmp */,
                           opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, mask_len, mbt, vlen_enc);

41810#line 41810 "ad_x86.cpp"
}
41812}

41814void vmask_tolong_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

41825#line 8744 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* mask */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */,
                           opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, mask_len, mbt, vlen_enc);

41834#line 41834 "ad_x86.cpp"
}
41836}

41838void vmask_truecount_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

41848#line 8760 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int mask_size = mask_len * type2aelembytes(mbt);
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* mask */,
                           opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, mask_len, mask_size, vlen_enc);

41858#line 41858 "ad_x86.cpp"
}
41860}

41862void vmask_truecount_boolNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

41873#line 8777 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* mask */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */,
                           opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, mask_len, mbt, vlen_enc);

41882#line 41882 "ad_x86.cpp"
}
41884}

41886void vmask_truecount_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

41898#line 8793 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* mask */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* xtmp */,
                           opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, mask_len, mbt, vlen_enc);

41907#line 41907 "ad_x86.cpp"
}
41909}

41911void vmask_first_or_last_true_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

41921#line 8810 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int mask_size = mask_len * type2aelembytes(mbt);
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* mask */,
                           opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, mask_len, mask_size, vlen_enc);

41931#line 41931 "ad_x86.cpp"
}
41933}

41935void vmask_first_or_last_true_evex_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

41945#line 8810 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int mask_size = mask_len * type2aelembytes(mbt);
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* mask */,
                           opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, mask_len, mask_size, vlen_enc);

41955#line 41955 "ad_x86.cpp"
}
41957}

41959void vmask_first_or_last_true_boolNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

41970#line 8828 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* mask */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */,
                           opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, mask_len, mbt, vlen_enc);

41979#line 41979 "ad_x86.cpp"
}
41981}

41983void vmask_first_or_last_true_bool_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

41994#line 8828 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* mask */, opnd_array(4)->as_XMMRegister(ra_,this,idx4)/* xtmp */,
                           opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, mask_len, mbt, vlen_enc);

42003#line 42003 "ad_x86.cpp"
}
42005}

42007void vmask_first_or_last_true_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

42019#line 8845 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* mask */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* xtmp */,
                           opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, mask_len, mbt, vlen_enc);

42028#line 42028 "ad_x86.cpp"
}
42030}

42032void vmask_first_or_last_true_avx_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// mask
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// size
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

42044#line 8845 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int opcode = this->ideal_Opcode();
  BasicType mbt = Matcher::vector_element_basic_type(this, opnd_array(1));
  int mask_len = Matcher::vector_length(this, opnd_array(1));
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  ___masm. vector_mask_operation(opcode, opnd_array(3)->as_Register(ra_,this,idx3)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* mask */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* xtmp */,
                           opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, mask_len, mbt, vlen_enc);

42053#line 42053 "ad_x86.cpp"
}
42055}

42057void vadd_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42067#line 8867 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42075#line 42075 "ad_x86.cpp"
}
42077}

42079void vadd_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42089#line 8867 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42097#line 42097 "ad_x86.cpp"
}
42099}

42101void vadd_reg_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42111#line 8867 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42119#line 42119 "ad_x86.cpp"
}
42121}

42123void vadd_reg_masked_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42133#line 8867 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42141#line 42141 "ad_x86.cpp"
}
42143}

42145void vadd_reg_masked_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42155#line 8867 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42163#line 42163 "ad_x86.cpp"
}
42165}

42167void vadd_reg_masked_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42177#line 8867 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42185#line 42185 "ad_x86.cpp"
}
42187}

42189void vadd_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42199#line 8885 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42207#line 42207 "ad_x86.cpp"
}
42209}

42211void vadd_mem_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42221#line 8885 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42229#line 42229 "ad_x86.cpp"
}
42231}

42233void vadd_mem_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42243#line 8885 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42251#line 42251 "ad_x86.cpp"
}
42253}

42255void vadd_mem_masked_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42265#line 8885 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42273#line 42273 "ad_x86.cpp"
}
42275}

42277void vadd_mem_masked_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42287#line 8885 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42295#line 42295 "ad_x86.cpp"
}
42297}

42299void vadd_mem_masked_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42309#line 8885 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42317#line 42317 "ad_x86.cpp"
}
42319}

42321void vxor_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42331#line 8898 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42339#line 42339 "ad_x86.cpp"
}
42341}

42343void vxor_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42353#line 8911 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42361#line 42361 "ad_x86.cpp"
}
42363}

42365void vor_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42375#line 8924 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42383#line 42383 "ad_x86.cpp"
}
42385}

42387void vor_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42397#line 8937 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42405#line 42405 "ad_x86.cpp"
}
42407}

42409void vand_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42419#line 8950 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42427#line 42427 "ad_x86.cpp"
}
42429}

42431void vand_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42441#line 8963 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42449#line 42449 "ad_x86.cpp"
}
42451}

42453void vsub_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42463#line 8981 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42471#line 42471 "ad_x86.cpp"
}
42473}

42475void vsub_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42485#line 8981 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42493#line 42493 "ad_x86.cpp"
}
42495}

42497void vsub_reg_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42507#line 8981 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42515#line 42515 "ad_x86.cpp"
}
42517}

42519void vsub_reg_masked_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42529#line 8981 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42537#line 42537 "ad_x86.cpp"
}
42539}

42541void vsub_reg_masked_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42551#line 8981 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42559#line 42559 "ad_x86.cpp"
}
42561}

42563void vsub_reg_masked_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42573#line 8981 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42581#line 42581 "ad_x86.cpp"
}
42583}

42585void vsub_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42595#line 8999 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42603#line 42603 "ad_x86.cpp"
}
42605}

42607void vsub_mem_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42617#line 8999 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42625#line 42625 "ad_x86.cpp"
}
42627}

42629void vsub_mem_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42639#line 8999 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42647#line 42647 "ad_x86.cpp"
}
42649}

42651void vsub_mem_masked_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42661#line 8999 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42669#line 42669 "ad_x86.cpp"
}
42671}

42673void vsub_mem_masked_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42683#line 8999 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42691#line 42691 "ad_x86.cpp"
}
42693}

42695void vsub_mem_masked_4Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42705#line 8999 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42713#line 42713 "ad_x86.cpp"
}
42715}

42717void vmul_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42727#line 9016 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42735#line 42735 "ad_x86.cpp"
}
42737}

42739void vmul_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42749#line 9016 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42757#line 42757 "ad_x86.cpp"
}
42759}

42761void vmul_reg_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42771#line 9016 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42779#line 42779 "ad_x86.cpp"
}
42781}

42783void vmul_reg_masked_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42793#line 9016 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42801#line 42801 "ad_x86.cpp"
}
42803}

42805void vmul_reg_masked_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42815#line 9016 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42823#line 42823 "ad_x86.cpp"
}
42825}

42827void vmul_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42837#line 9033 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42845#line 42845 "ad_x86.cpp"
}
42847}

42849void vmul_mem_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42859#line 9033 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42867#line 42867 "ad_x86.cpp"
}
42869}

42871void vmul_mem_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42881#line 9033 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42889#line 42889 "ad_x86.cpp"
}
42891}

42893void vmul_mem_masked_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42903#line 9033 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42911#line 42911 "ad_x86.cpp"
}
42913}

42915void vmul_mem_masked_3Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42925#line 9033 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

42933#line 42933 "ad_x86.cpp"
}
42935}

42937void vsqrt_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42946#line 9048 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(2)->as_KRegister(ra_,this,idx2)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, true, vlen_enc);

42954#line 42954 "ad_x86.cpp"
}
42956}

42958void vsqrt_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42967#line 9048 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(2)->as_KRegister(ra_,this,idx2)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, true, vlen_enc);

42975#line 42975 "ad_x86.cpp"
}
42977}

42979void vdiv_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

42989#line 9062 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

42997#line 42997 "ad_x86.cpp"
}
42999}

43001void vdiv_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43011#line 9062 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

43019#line 43019 "ad_x86.cpp"
}
43021}

43023void vdiv_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43033#line 9076 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43041#line 43041 "ad_x86.cpp"
}
43043}

43045void vdiv_mem_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43055#line 9076 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43063#line 43063 "ad_x86.cpp"
}
43065}

43067void vrol_imm_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43077#line 9091 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43085#line 43085 "ad_x86.cpp"
}
43087}

43089void vrol_imm_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43099#line 9091 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43107#line 43107 "ad_x86.cpp"
}
43109}

43111void vrol_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43121#line 9105 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

43129#line 43129 "ad_x86.cpp"
}
43131}

43133void vrol_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43143#line 9105 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

43151#line 43151 "ad_x86.cpp"
}
43153}

43155void vlshift_imm_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43165#line 9120 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43173#line 43173 "ad_x86.cpp"
}
43175}

43177void vlshift_imm_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43187#line 9120 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43195#line 43195 "ad_x86.cpp"
}
43197}

43199void vlshift_imm_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43209#line 9120 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43217#line 43217 "ad_x86.cpp"
}
43219}

43221void vlshift_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43231#line 9136 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, false);

43239#line 43239 "ad_x86.cpp"
}
43241}

43243void vlshift_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43253#line 9136 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, false);

43261#line 43261 "ad_x86.cpp"
}
43263}

43265void vlshift_reg_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43275#line 9136 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, false);

43283#line 43283 "ad_x86.cpp"
}
43285}

43287void vlshiftv_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43297#line 9152 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, true);

43305#line 43305 "ad_x86.cpp"
}
43307}

43309void vlshiftv_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43319#line 9152 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, true);

43327#line 43327 "ad_x86.cpp"
}
43329}

43331void vlshiftv_reg_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43341#line 9152 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, true);

43349#line 43349 "ad_x86.cpp"
}
43351}

43353void vlshift_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43363#line 9167 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43371#line 43371 "ad_x86.cpp"
}
43373}

43375void vlshift_mem_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43385#line 9167 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43393#line 43393 "ad_x86.cpp"
}
43395}

43397void vlshift_mem_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43407#line 9167 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43415#line 43415 "ad_x86.cpp"
}
43417}

43419void vrshift_imm_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43429#line 9182 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43437#line 43437 "ad_x86.cpp"
}
43439}

43441void vrshift_imm_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43451#line 9182 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43459#line 43459 "ad_x86.cpp"
}
43461}

43463void vrshift_imm_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43473#line 9182 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43481#line 43481 "ad_x86.cpp"
}
43483}

43485void vrshift_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43495#line 9198 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, false);

43503#line 43503 "ad_x86.cpp"
}
43505}

43507void vrshift_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43517#line 9198 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, false);

43525#line 43525 "ad_x86.cpp"
}
43527}

43529void vrshift_reg_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43539#line 9198 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, false);

43547#line 43547 "ad_x86.cpp"
}
43549}

43551void vrshiftv_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43561#line 9214 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, true);

43569#line 43569 "ad_x86.cpp"
}
43571}

43573void vrshiftv_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43583#line 9214 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, true);

43591#line 43591 "ad_x86.cpp"
}
43593}

43595void vrshiftv_reg_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43605#line 9214 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, true);

43613#line 43613 "ad_x86.cpp"
}
43615}

43617void vrshift_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43627#line 9229 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43635#line 43635 "ad_x86.cpp"
}
43637}

43639void vrshift_mem_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43649#line 9229 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43657#line 43657 "ad_x86.cpp"
}
43659}

43661void vrshift_mem_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43671#line 9229 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43679#line 43679 "ad_x86.cpp"
}
43681}

43683void vurshift_imm_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43693#line 9244 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43701#line 43701 "ad_x86.cpp"
}
43703}

43705void vurshift_imm_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43715#line 9244 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43723#line 43723 "ad_x86.cpp"
}
43725}

43727void vurshift_imm_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// shift
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43737#line 9244 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->constant(), true, vlen_enc);

43745#line 43745 "ad_x86.cpp"
}
43747}

43749void vurshift_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43759#line 9260 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, false);

43767#line 43767 "ad_x86.cpp"
}
43769}

43771void vurshift_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43781#line 9260 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, false);

43789#line 43789 "ad_x86.cpp"
}
43791}

43793void vurshift_reg_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43803#line 9260 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, false);

43811#line 43811 "ad_x86.cpp"
}
43813}

43815void vurshiftv_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43825#line 9276 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, true);

43833#line 43833 "ad_x86.cpp"
}
43835}

43837void vurshiftv_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43847#line 9276 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, true);

43855#line 43855 "ad_x86.cpp"
}
43857}

43859void vurshiftv_reg_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43869#line 9276 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc, true);

43877#line 43877 "ad_x86.cpp"
}
43879}

43881void vurshift_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43891#line 9291 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43899#line 43899 "ad_x86.cpp"
}
43901}

43903void vurshift_mem_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43913#line 9291 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43921#line 43921 "ad_x86.cpp"
}
43923}

43925void vurshift_mem_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43935#line 9291 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43943#line 43943 "ad_x86.cpp"
}
43945}

43947void vmaxv_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43957#line 9304 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

43965#line 43965 "ad_x86.cpp"
}
43967}

43969void vmaxv_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

43979#line 9317 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

43987#line 43987 "ad_x86.cpp"
}
43989}

43991void vminv_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44001#line 9330 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, true, vlen_enc);

44009#line 44009 "ad_x86.cpp"
}
44011}

44013void vminv_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44023#line 9343 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, Address::make_raw(opnd_array(2)->base(ra_,this,idx2), opnd_array(2)->index(ra_,this,idx2), opnd_array(2)->scale(), opnd_array(2)->disp(ra_,this,idx2), opnd_array(2)->disp_reloc()), true, vlen_enc);

44031#line 44031 "ad_x86.cpp"
}
44033}

44035void vrearrangev_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44045#line 9356 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(3)->as_KRegister(ra_,this,idx3)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, false, vlen_enc);

44053#line 44053 "ad_x86.cpp"
}
44055}

44057void vabs_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44066#line 9373 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(2)->as_KRegister(ra_,this,idx2)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, true, vlen_enc);

44074#line 44074 "ad_x86.cpp"
}
44076}

44078void vabs_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44087#line 9373 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(2)->as_KRegister(ra_,this,idx2)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, true, vlen_enc);

44095#line 44095 "ad_x86.cpp"
}
44097}

44099void vabs_masked_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44108#line 9373 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(2)->as_KRegister(ra_,this,idx2)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, true, vlen_enc);

44116#line 44116 "ad_x86.cpp"
}
44118}

44120void vabs_masked_2Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44129#line 9373 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(2)->as_KRegister(ra_,this,idx2)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */, true, vlen_enc);

44137#line 44137 "ad_x86.cpp"
}
44139}

44141void vfma_reg_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src3
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44152#line 9387 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* src3 */, true, vlen_enc);

44160#line 44160 "ad_x86.cpp"
}
44162}

44164void vfma_reg_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src3
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44175#line 9387 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, opnd_array(3)->as_XMMRegister(ra_,this,idx3)/* src3 */, true, vlen_enc);

44183#line 44183 "ad_x86.cpp"
}
44185}

44187void vfma_mem_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src3
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44198#line 9401 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, Address::make_raw(opnd_array(3)->base(ra_,this,idx3), opnd_array(3)->index(ra_,this,idx3), opnd_array(3)->scale(), opnd_array(3)->disp(ra_,this,idx3), opnd_array(3)->disp_reloc()), true, vlen_enc);

44206#line 44206 "ad_x86.cpp"
}
44208}

44210void vfma_mem_masked_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// dst
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// src3
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// mask
{
  C2_MacroAssembler _masm(&cbuf);

44221#line 9401 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vlen_enc = vector_length_encoding(this);
  BasicType bt = Matcher::vector_element_basic_type(this);
  int opc = this->ideal_Opcode();
  ___masm. evmasked_op(opc, bt, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* dst */,
                 opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, Address::make_raw(opnd_array(3)->base(ra_,this,idx3), opnd_array(3)->index(ra_,this,idx3), opnd_array(3)->scale(), opnd_array(3)->disp(ra_,this,idx3), opnd_array(3)->disp_reloc()), true, vlen_enc);

44229#line 44229 "ad_x86.cpp"
}
44231}

44233void evcmp_maskedNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// cond
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// mask
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// scratch
{
  C2_MacroAssembler _masm(&cbuf);

44245#line 9415 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  assert(bottom_type()->isa_vectmask(), "TypeVectMask expected")do { if (!(bottom_type()->isa_vectmask())) { (*g_assert_poison
) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"
, 9416, "assert(" "bottom_type()->isa_vectmask()" ") failed"
, "TypeVectMask expected"); ::breakpoint(); } } while (0);
  int vlen_enc = vector_length_encoding(this, opnd_array(1));
  BasicType src1_elem_bt = Matcher::vector_element_basic_type(this, opnd_array(1));

  // Comparison i
  switch (src1_elem_bt) {
    case T_BYTE: {
      bool is_unsigned = is_unsigned_booltest_pred(opnd_array(3)->constant());
      Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred(opnd_array(3)->constant());
      ___masm. evpcmpb(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      break;
    }
    case T_SHORT: {
      bool is_unsigned = is_unsigned_booltest_pred(opnd_array(3)->constant());
      Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred(opnd_array(3)->constant());
      ___masm. evpcmpw(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      break;
    }
    case T_INT: {
      bool is_unsigned = is_unsigned_booltest_pred(opnd_array(3)->constant());
      Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred(opnd_array(3)->constant());
      ___masm. evpcmpd(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      break;
    }
    case T_LONG: {
      bool is_unsigned = is_unsigned_booltest_pred(opnd_array(3)->constant());
      Assembler::ComparisonPredicate cmp = booltest_pred_to_comparison_pred(opnd_array(3)->constant());
      ___masm. evpcmpq(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, !is_unsigned, vlen_enc);
      break;
    }
    case T_FLOAT: {
      Assembler::ComparisonPredicateFP cmp = booltest_pred_to_comparison_pred_fp(opnd_array(3)->constant());
      ___masm. evcmpps(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen_enc);
      break;
    }
    case T_DOUBLE: {
      Assembler::ComparisonPredicateFP cmp = booltest_pred_to_comparison_pred_fp(opnd_array(3)->constant());
      ___masm. evcmppd(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(4)->as_KRegister(ra_,this,idx4)/* mask */, opnd_array(1)->as_XMMRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* src2 */, cmp, vlen_enc);
      break;
    }
    default: assert(false, "%s", type2name(src1_elem_bt))do { if (!(false)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 9456, "assert(" "false" ") failed", "%s", type2name(src1_elem_bt
)); ::breakpoint(); } } while (0); break;
  }

44290#line 44290 "ad_x86.cpp"
}
44292}

44294void mask_all_evexI_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// cnt
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

44304#line 9467 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vec_len = Matcher::vector_length(this);
  if (VM_Version::supports_avx512bw()) {
    ___masm. movq(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, opnd_array(1)->constant());
    ___masm. kmovql(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */);
    ___masm. kshiftrql(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, 64 - vec_len);
  } else {
    assert(vec_len <= 16, "")do { if (!(vec_len <= 16)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 9474, "assert(" "vec_len <= 16" ") failed", ""); ::breakpoint
(); } } while (0);
    ___masm. movq(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, opnd_array(1)->constant());
    ___masm. kmovwl(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */);
    ___masm. kshiftrwl(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, 16 - vec_len);
  }

44318#line 44318 "ad_x86.cpp"
}
44320}

44322void mask_all_evexINode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

44332#line 9487 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vec_len = Matcher::vector_length(this);
  if (VM_Version::supports_avx512bw()) {
    ___masm. movslq(opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. kmovql(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(3)->as_Register(ra_,this,idx3)/* tmp */);
    ___masm. kshiftrql(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, 64 - vec_len);
  } else {
    assert(vec_len <= 16, "")do { if (!(vec_len <= 16)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 9494, "assert(" "vec_len <= 16" ") failed", ""); ::breakpoint
(); } } while (0);
    ___masm. kmovwl(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. kshiftrwl(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, 16 - vec_len);
  }

44345#line 44345 "ad_x86.cpp"
}
44347}

44349void mask_all_evexLNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

44358#line 9506 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int vec_len = Matcher::vector_length(this);
  if (VM_Version::supports_avx512bw()) {
    ___masm. kmovql(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. kshiftrql(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, 64 - vec_len);
  } else {
    assert(vec_len <= 16, "")do { if (!(vec_len <= 16)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 9512, "assert(" "vec_len <= 16" ") failed", ""); ::breakpoint
(); } } while (0);
    ___masm. kmovwl(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);
    ___masm. kshiftrwl(opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* dst */, 16 - vec_len);
  }

44370#line 44370 "ad_x86.cpp"
}
44372}

44374void mask_not_immLT8Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// dst
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// rtmp
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// ktmp
{
  C2_MacroAssembler _masm(&cbuf);

44386#line 9525 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint masklen = Matcher::vector_length(this);
  ___masm. knot(masklen, opnd_array(3)->as_KRegister(ra_,this,idx3)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src */, opnd_array(5)->as_KRegister(ra_,this,idx5)/* ktmp */, opnd_array(4)->as_Register(ra_,this,idx4)/* rtmp */);

44391#line 44391 "ad_x86.cpp"
}
44393}

44395void mask_not_immNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// cnt
{
  C2_MacroAssembler _masm(&cbuf);

44404#line 9538 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  uint masklen = Matcher::vector_length(this);
  ___masm. knot(masklen, opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src */);

44409#line 44409 "ad_x86.cpp"
}
44411}

44413void long_to_maskLE8_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// rtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// rtmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// xtmp
{
  C2_MacroAssembler _masm(&cbuf);

44425#line 9550 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int mask_len = Matcher::vector_length(this);
  int vec_enc  = vector_length_encoding(mask_len);
  ___masm. vector_long_to_maskvec(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(3)->as_Register(ra_,this,idx3)/* rtmp1 */,
                            opnd_array(4)->as_Register(ra_,this,idx4)/* rtmp2 */, xnoreg, mask_len, vec_enc);

44432#line 44432 "ad_x86.cpp"
}
44434}

44436void long_to_maskGT8_avxNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// rtmp1
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// rtmp2
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// xtmp1
{
  C2_MacroAssembler _masm(&cbuf);

44448#line 9565 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  int mask_len = Matcher::vector_length(this);
  assert(mask_len <= 32, "invalid mask length")do { if (!(mask_len <= 32)) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 9567, "assert(" "mask_len <= 32" ") failed", "invalid mask length"
); ::breakpoint(); } } while (0);
  int vec_enc  = vector_length_encoding(mask_len);
  ___masm. vector_long_to_maskvec(opnd_array(2)->as_XMMRegister(ra_,this,idx2)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */, opnd_array(3)->as_Register(ra_,this,idx3)/* rtmp1 */,
                            opnd_array(4)->as_Register(ra_,this,idx4)/* rtmp2 */, opnd_array(5)->as_XMMRegister(ra_,this,idx5)/* xtmp1 */, mask_len, vec_enc);

44456#line 44456 "ad_x86.cpp"
}
44458}

44460void long_to_mask_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src
{
  C2_MacroAssembler _masm(&cbuf);

44468#line 9579 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  ___masm. kmov(opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(1)->as_Register(ra_,this,idx1)/* src */);

44472#line 44472 "ad_x86.cpp"
}
44474}

44476void mask_opers_evexNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// kscratch
{
  C2_MacroAssembler _masm(&cbuf);

44486#line 9592 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  const MachNode* mask1 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(1))));
  const MachNode* mask2 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(2))));
  assert(0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type()), "")do { if (!(0 == Type::cmp(mask1->bottom_type(), mask2->
bottom_type()))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 9595, "assert(" "0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type())"
 ") failed", ""); ::breakpoint(); } } while (0);
  uint masklen = Matcher::vector_length(this);
  masklen = (masklen < 16 && !VM_Version::supports_avx512dq()) ? 16 : masklen;
  ___masm. masked_op(this->ideal_Opcode(), masklen, opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* src2 */);

44495#line 44495 "ad_x86.cpp"
}
44497}

44499void mask_opers_evex_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// kscratch
{
  C2_MacroAssembler _masm(&cbuf);

44509#line 9592 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  const MachNode* mask1 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(1))));
  const MachNode* mask2 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(2))));
  assert(0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type()), "")do { if (!(0 == Type::cmp(mask1->bottom_type(), mask2->
bottom_type()))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 9595, "assert(" "0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type())"
 ") failed", ""); ::breakpoint(); } } while (0);
  uint masklen = Matcher::vector_length(this);
  masklen = (masklen < 16 && !VM_Version::supports_avx512dq()) ? 16 : masklen;
  ___masm. masked_op(this->ideal_Opcode(), masklen, opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* src2 */);

44518#line 44518 "ad_x86.cpp"
}
44520}

44522void mask_opers_evex_1Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// src1
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// src2
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// kscratch
{
  C2_MacroAssembler _masm(&cbuf);

44532#line 9592 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad"

  const MachNode* mask1 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(1))));
  const MachNode* mask2 = static_cast<const MachNode*>(this->in(this->operand_index(opnd_array(2))));
  assert(0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type()), "")do { if (!(0 == Type::cmp(mask1->bottom_type(), mask2->
bottom_type()))) { (*g_assert_poison) = 'X';; report_vm_error
("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86.ad",
 9595, "assert(" "0 == Type::cmp(mask1->bottom_type(), mask2->bottom_type())"
 ") failed", ""); ::breakpoint(); } } while (0);
  uint masklen = Matcher::vector_length(this);
  masklen = (masklen < 16 && !VM_Version::supports_avx512dq()) ? 16 : masklen;
  ___masm. masked_op(this->ideal_Opcode(), masklen, opnd_array(0)->as_KRegister(ra_,this)/* dst */, opnd_array(1)->as_KRegister(ra_,this,idx1)/* src1 */, opnd_array(2)->as_KRegister(ra_,this,idx2)/* src2 */);

44541#line 44541 "ad_x86.cpp"
}
44543}

44545void castMMNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
// User did not define which encode class to use.
44551}

44553uint castMMNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 44553, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
44556}

44558void castVVNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
// User did not define which encode class to use.
44564}

44566uint castVVNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 44566, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
44569}

44571void castVVLegNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 1;
unsigned idx1 = 1; 	// dst
// User did not define which encode class to use.
44577}

44579uint castVVLegNode::size(PhaseRegAlloc *ra_) const {
assert(VerifyOops || MachNode::size(ra_) <= 0, "bad fixed size")do { if (!(VerifyOops || MachNode::size(ra_) <= 0)) { (*g_assert_poison
) = 'X';; report_vm_error("ad_x86.cpp", 44579, "assert(" "VerifyOops || MachNode::size(ra_) <= 0"
 ") failed", "bad fixed size"); ::breakpoint(); } } while (0);
return (VerifyOops ? MachNode::size(ra_) : 0);
44582}

44584void compareAndSwapP_shenandoahNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

44596#line 43 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/shenandoah/shenandoah_x86_64.ad"

  ShenandoahBarrierSet::assembler()->cmpxchg_oop(&_masm,
                                                 opnd_array(0)->as_Register(ra_,this)/* res */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(3)->as_Register(ra_,this,idx3)/* newval */,
                                                 false, // swap
                                                 opnd_array(4)->as_Register(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_Register(ra_,this,idx5)/* tmp2 */);

44603#line 44603 "ad_x86.cpp"
}
44605}

44607void compareAndSwapP_shenandoah_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

44619#line 43 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/shenandoah/shenandoah_x86_64.ad"

  ShenandoahBarrierSet::assembler()->cmpxchg_oop(&_masm,
                                                 opnd_array(0)->as_Register(ra_,this)/* res */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(3)->as_Register(ra_,this,idx3)/* newval */,
                                                 false, // swap
                                                 opnd_array(4)->as_Register(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_Register(ra_,this,idx5)/* tmp2 */);

44626#line 44626 "ad_x86.cpp"
}
44628}

44630void compareAndSwapN_shenandoahNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

44642#line 64 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/shenandoah/shenandoah_x86_64.ad"

  ShenandoahBarrierSet::assembler()->cmpxchg_oop(&_masm,
                                                 opnd_array(0)->as_Register(ra_,this)/* res */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(3)->as_Register(ra_,this,idx3)/* newval */,
                                                 false, // swap
                                                 opnd_array(4)->as_Register(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_Register(ra_,this,idx5)/* tmp2 */);

44649#line 44649 "ad_x86.cpp"
}
44651}

44653void compareAndSwapN_shenandoah_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

44665#line 64 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/shenandoah/shenandoah_x86_64.ad"

  ShenandoahBarrierSet::assembler()->cmpxchg_oop(&_masm,
                                                 opnd_array(0)->as_Register(ra_,this)/* res */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(3)->as_Register(ra_,this,idx3)/* newval */,
                                                 false, // swap
                                                 opnd_array(4)->as_Register(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_Register(ra_,this,idx5)/* tmp2 */);

44672#line 44672 "ad_x86.cpp"
}
44674}

44676void compareAndExchangeN_shenandoahNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

44688#line 83 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/shenandoah/shenandoah_x86_64.ad"

  ShenandoahBarrierSet::assembler()->cmpxchg_oop(&_masm,
                                                 NULL__null, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(3)->as_Register(ra_,this,idx3)/* newval */,
                                                 true, // exchange
                                                 opnd_array(4)->as_Register(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_Register(ra_,this,idx5)/* tmp2 */);

44695#line 44695 "ad_x86.cpp"
}
44697}

44699void compareAndExchangeP_shenandoahNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem_ptr
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp1
unsigned idx5 = idx4 + opnd_array(4)->num_edges(); 	// tmp2
{
  C2_MacroAssembler _masm(&cbuf);

44711#line 105 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/shenandoah/shenandoah_x86_64.ad"

  ShenandoahBarrierSet::assembler()->cmpxchg_oop(&_masm,
                                                 NULL__null, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(3)->as_Register(ra_,this,idx3)/* newval */,
                                                 true,  // exchange
                                                 opnd_array(4)->as_Register(ra_,this,idx4)/* tmp1 */, opnd_array(5)->as_Register(ra_,this,idx5)/* tmp2 */);

44718#line 44718 "ad_x86.cpp"
}
44720}

44722void zLoadPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// dst
{
  C2_MacroAssembler _masm(&cbuf);

44731#line 76 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/z/z_x86_64.ad"

  ___masm. movptr(opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  z_load_barrier(_masm, this, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* dst */, noreg /* tmp */, barrier_data());

44736#line 44736 "ad_x86.cpp"
}
44738}

44740void zCompareAndExchangePNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

44751#line 92 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/z/z_x86_64.ad"

  if (barrier_data() != ZLoadBarrierElided) { // barrier could be elided by ZBarrierSetC2::analyze_dominating_barriers()
    ___masm. movptr(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */);
  }
  ___masm. lock();
  ___masm. cmpxchgptr(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

  if (barrier_data() != ZLoadBarrierElided) {
    Label good;
    z_load_barrier_cmpxchg(_masm, this, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, good);
    ___masm. movptr(opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */);
    ___masm. lock();
    ___masm. cmpxchgptr(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
    ___masm. bind(good);
  }

44768#line 44768 "ad_x86.cpp"
}
44770}

44772void zCompareAndSwapPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

44783#line 123 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/z/z_x86_64.ad"

  if (barrier_data() != ZLoadBarrierElided) { // barrier could be elided by ZBarrierSetC2::analyze_dominating_barriers()
    ___masm. movptr(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */);
  }
  ___masm. lock();
  ___masm. cmpxchgptr(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

  if (barrier_data() != ZLoadBarrierElided) {
    Label good;
    z_load_barrier_cmpxchg(_masm, this, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, good);
    ___masm. movptr(opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */);
    ___masm. lock();
    ___masm. cmpxchgptr(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
    ___masm. bind(good);
    ___masm. cmpptr(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */);
  }
  ___masm. setb(Assembler::equal, opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

44803#line 44803 "ad_x86.cpp"
}
44805}

44807void zCompareAndSwapP_0Node::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// oldval
unsigned idx3 = idx2 + opnd_array(2)->num_edges(); 	// newval
unsigned idx4 = idx3 + opnd_array(3)->num_edges(); 	// tmp
{
  C2_MacroAssembler _masm(&cbuf);

44818#line 123 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/z/z_x86_64.ad"

  if (barrier_data() != ZLoadBarrierElided) { // barrier could be elided by ZBarrierSetC2::analyze_dominating_barriers()
    ___masm. movptr(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */);
  }
  ___masm. lock();
  ___masm. cmpxchgptr(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));

  if (barrier_data() != ZLoadBarrierElided) {
    Label good;
    z_load_barrier_cmpxchg(_masm, this, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()), opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, good);
    ___masm. movptr(opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */, opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */);
    ___masm. lock();
    ___masm. cmpxchgptr(opnd_array(3)->as_Register(ra_,this,idx3)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
    ___masm. bind(good);
    ___masm. cmpptr(opnd_array(4)->as_Register(ra_,this,idx4)/* tmp */, opnd_array(2)->as_Register(ra_,this,idx2)/* oldval */);
  }
  ___masm. setb(Assembler::equal, opnd_array(0)->as_Register(ra_,this)/* res */);
  ___masm. movzbl(opnd_array(0)->as_Register(ra_,this)/* res */, opnd_array(0)->as_Register(ra_,this)/* res */);

44838#line 44838 "ad_x86.cpp"
}
44840}

44842void zXChgPNode::emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const {
cbuf.set_insts_mark();
// Start at oper_input_base() and count operands
unsigned idx0 = 2;
unsigned idx1 = 2; 	// mem
unsigned idx2 = idx1 + opnd_array(1)->num_edges(); 	// newval
{
  C2_MacroAssembler _masm(&cbuf);

44851#line 153 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/gc/z/z_x86_64.ad"

  ___masm. xchgptr(opnd_array(2)->as_Register(ra_,this,idx2)/* newval */, Address::make_raw(opnd_array(1)->base(ra_,this,idx1), opnd_array(1)->index(ra_,this,idx1), opnd_array(1)->scale(), opnd_array(1)->disp(ra_,this,idx1), opnd_array(1)->disp_reloc()));
  z_load_barrier(_masm, this, Address(noreg, 0), opnd_array(2)->as_Register(ra_,this,idx2)/* newval */, noreg /* tmp */, barrier_data());

44856#line 44856 "ad_x86.cpp"
}
44858}

44860const MachOper* loadBNode::memory_operand() const { return _opnds[1]; }
44861const MachOper* loadB2LNode::memory_operand() const { return _opnds[1]; }
44862const MachOper* loadUBNode::memory_operand() const { return _opnds[1]; }
44863const MachOper* loadUB2LNode::memory_operand() const { return _opnds[1]; }
44864const MachOper* loadUB2L_immINode::memory_operand() const { return _opnds[1]; }
44865const MachOper* loadSNode::memory_operand() const { return _opnds[1]; }
44866const MachOper* loadS2BNode::memory_operand() const { return _opnds[1]; }
44867const MachOper* loadS2LNode::memory_operand() const { return _opnds[1]; }
44868const MachOper* loadUSNode::memory_operand() const { return _opnds[1]; }
44869const MachOper* loadUS2BNode::memory_operand() const { return _opnds[1]; }
44870const MachOper* loadUS2LNode::memory_operand() const { return _opnds[1]; }
44871const MachOper* loadUS2L_immI_255Node::memory_operand() const { return _opnds[1]; }
44872const MachOper* loadUS2L_immINode::memory_operand() const { return _opnds[1]; }
44873const MachOper* loadINode::memory_operand() const { return _opnds[1]; }
44874const MachOper* loadI2BNode::memory_operand() const { return _opnds[1]; }
44875const MachOper* loadI2UBNode::memory_operand() const { return _opnds[1]; }
44876const MachOper* loadI2SNode::memory_operand() const { return _opnds[1]; }
44877const MachOper* loadI2USNode::memory_operand() const { return _opnds[1]; }
44878const MachOper* loadI2LNode::memory_operand() const { return _opnds[1]; }
44879const MachOper* loadI2L_immI_255Node::memory_operand() const { return _opnds[1]; }
44880const MachOper* loadI2L_immI_65535Node::memory_operand() const { return _opnds[1]; }
44881const MachOper* loadI2L_immU31Node::memory_operand() const { return _opnds[1]; }
44882const MachOper* loadUI2LNode::memory_operand() const { return _opnds[1]; }
44883const MachOper* loadLNode::memory_operand() const { return _opnds[1]; }
44884const MachOper* loadRangeNode::memory_operand() const { return _opnds[1]; }
44885const MachOper* loadPNode::memory_operand() const { return _opnds[1]; }
44886const MachOper* loadNNode::memory_operand() const { return _opnds[1]; }
44887const MachOper* loadKlassNode::memory_operand() const { return _opnds[1]; }
44888const MachOper* loadNKlassNode::memory_operand() const { return _opnds[1]; }
44889const MachOper* loadFNode::memory_operand() const { return _opnds[1]; }
44890const MachOper* loadD_partialNode::memory_operand() const { return _opnds[1]; }
44891const MachOper* loadDNode::memory_operand() const { return _opnds[1]; }
44892const MachOper* prefetchAllocNode::memory_operand() const { return _opnds[1]; }
44893const MachOper* prefetchAllocNTANode::memory_operand() const { return _opnds[1]; }
44894const MachOper* prefetchAllocT0Node::memory_operand() const { return _opnds[1]; }
44895const MachOper* prefetchAllocT2Node::memory_operand() const { return _opnds[1]; }
44896const MachOper* storeBNode::memory_operand() const { return _opnds[1]; }
44897const MachOper* storeCNode::memory_operand() const { return _opnds[1]; }
44898const MachOper* storeINode::memory_operand() const { return _opnds[1]; }
44899const MachOper* storeLNode::memory_operand() const { return _opnds[1]; }
44900const MachOper* storePNode::memory_operand() const { return _opnds[1]; }
44901const MachOper* storeImmP0Node::memory_operand() const { return _opnds[1]; }
44902const MachOper* storeImmPNode::memory_operand() const { return _opnds[1]; }
44903const MachOper* storeNNode::memory_operand() const { return _opnds[1]; }
44904const MachOper* storeNKlassNode::memory_operand() const { return _opnds[1]; }
44905const MachOper* storeImmN0Node::memory_operand() const { return _opnds[1]; }
44906const MachOper* storeImmNNode::memory_operand() const { return _opnds[1]; }
44907const MachOper* storeImmNKlassNode::memory_operand() const { return _opnds[1]; }
44908const MachOper* storeImmI0Node::memory_operand() const { return _opnds[1]; }
44909const MachOper* storeImmINode::memory_operand() const { return _opnds[1]; }
44910const MachOper* storeImmL0Node::memory_operand() const { return _opnds[1]; }
44911const MachOper* storeImmLNode::memory_operand() const { return _opnds[1]; }
44912const MachOper* storeImmC0Node::memory_operand() const { return _opnds[1]; }
44913const MachOper* storeImmI16Node::memory_operand() const { return _opnds[1]; }
44914const MachOper* storeImmB0Node::memory_operand() const { return _opnds[1]; }
44915const MachOper* storeImmBNode::memory_operand() const { return _opnds[1]; }
44916const MachOper* storeImmCM0_regNode::memory_operand() const { return _opnds[1]; }
44917const MachOper* storeImmCM0Node::memory_operand() const { return _opnds[1]; }
44918const MachOper* storeFNode::memory_operand() const { return _opnds[1]; }
44919const MachOper* storeF0Node::memory_operand() const { return _opnds[1]; }
44920const MachOper* storeF_immNode::memory_operand() const { return _opnds[1]; }
44921const MachOper* storeDNode::memory_operand() const { return _opnds[1]; }
44922const MachOper* storeD0_immNode::memory_operand() const { return _opnds[1]; }
44923const MachOper* storeD0Node::memory_operand() const { return _opnds[1]; }
44924const MachOper* cacheWBNode::memory_operand() const { return _opnds[1]; }
44925const MachOper* popCountI_memNode::memory_operand() const { return _opnds[1]; }
44926const MachOper* popCountL_memNode::memory_operand() const { return _opnds[1]; }
44927const MachOper* cmovI_memNode::memory_operand() const { return _opnds[4]; }
44928const MachOper* cmovI_memUNode::memory_operand() const { return _opnds[4]; }
44929const MachOper* cmovI_memUCFNode::memory_operand() const { return _opnds[4]; }
44930const MachOper* cmovL_memNode::memory_operand() const { return _opnds[4]; }
44931const MachOper* cmovL_memUNode::memory_operand() const { return _opnds[4]; }
44932const MachOper* cmovL_memUCFNode::memory_operand() const { return _opnds[4]; }
44933const MachOper* addI_rReg_memNode::memory_operand() const { return _opnds[2]; }
44934const MachOper* addI_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
44935const MachOper* addI_mem_rRegNode::memory_operand() const { return _opnds[1]; }
44936const MachOper* addI_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
44937const MachOper* addI_mem_immNode::memory_operand() const { return _opnds[1]; }
44938const MachOper* incI_memNode::memory_operand() const { return _opnds[1]; }
44939const MachOper* decI_memNode::memory_operand() const { return _opnds[1]; }
44940const MachOper* addL_rReg_memNode::memory_operand() const { return _opnds[2]; }
44941const MachOper* addL_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
44942const MachOper* addL_mem_rRegNode::memory_operand() const { return _opnds[1]; }
44943const MachOper* addL_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
44944const MachOper* addL_mem_immNode::memory_operand() const { return _opnds[1]; }
44945const MachOper* incL_memNode::memory_operand() const { return _opnds[1]; }
44946const MachOper* decL_memNode::memory_operand() const { return _opnds[1]; }
44947const MachOper* loadPLockedNode::memory_operand() const { return _opnds[1]; }
44948const MachOper* storePConditionalNode::memory_operand() const { return _opnds[1]; }
44949const MachOper* storeIConditionalNode::memory_operand() const { return _opnds[1]; }
44950const MachOper* storeLConditionalNode::memory_operand() const { return _opnds[1]; }
44951const MachOper* compareAndSwapPNode::memory_operand() const { return _opnds[1]; }
44952const MachOper* compareAndSwapP_0Node::memory_operand() const { return _opnds[1]; }
44953const MachOper* compareAndSwapLNode::memory_operand() const { return _opnds[1]; }
44954const MachOper* compareAndSwapL_0Node::memory_operand() const { return _opnds[1]; }
44955const MachOper* compareAndSwapINode::memory_operand() const { return _opnds[1]; }
44956const MachOper* compareAndSwapI_0Node::memory_operand() const { return _opnds[1]; }
44957const MachOper* compareAndSwapBNode::memory_operand() const { return _opnds[1]; }
44958const MachOper* compareAndSwapB_0Node::memory_operand() const { return _opnds[1]; }
44959const MachOper* compareAndSwapSNode::memory_operand() const { return _opnds[1]; }
44960const MachOper* compareAndSwapS_0Node::memory_operand() const { return _opnds[1]; }
44961const MachOper* compareAndSwapNNode::memory_operand() const { return _opnds[1]; }
44962const MachOper* compareAndSwapN_0Node::memory_operand() const { return _opnds[1]; }
44963const MachOper* compareAndExchangeBNode::memory_operand() const { return _opnds[1]; }
44964const MachOper* compareAndExchangeSNode::memory_operand() const { return _opnds[1]; }
44965const MachOper* compareAndExchangeINode::memory_operand() const { return _opnds[1]; }
44966const MachOper* compareAndExchangeLNode::memory_operand() const { return _opnds[1]; }
44967const MachOper* compareAndExchangeNNode::memory_operand() const { return _opnds[1]; }
44968const MachOper* compareAndExchangePNode::memory_operand() const { return _opnds[1]; }
44969const MachOper* xaddB_no_resNode::memory_operand() const { return _opnds[1]; }
44970const MachOper* xaddBNode::memory_operand() const { return _opnds[1]; }
44971const MachOper* xaddS_no_resNode::memory_operand() const { return _opnds[1]; }
44972const MachOper* xaddSNode::memory_operand() const { return _opnds[1]; }
44973const MachOper* xaddI_no_resNode::memory_operand() const { return _opnds[1]; }
44974const MachOper* xaddINode::memory_operand() const { return _opnds[1]; }
44975const MachOper* xaddL_no_resNode::memory_operand() const { return _opnds[1]; }
44976const MachOper* xaddLNode::memory_operand() const { return _opnds[1]; }
44977const MachOper* xchgBNode::memory_operand() const { return _opnds[1]; }
44978const MachOper* xchgSNode::memory_operand() const { return _opnds[1]; }
44979const MachOper* xchgINode::memory_operand() const { return _opnds[1]; }
44980const MachOper* xchgLNode::memory_operand() const { return _opnds[1]; }
44981const MachOper* xchgPNode::memory_operand() const { return _opnds[1]; }
44982const MachOper* xchgNNode::memory_operand() const { return _opnds[1]; }
44983const MachOper* subI_rReg_memNode::memory_operand() const { return _opnds[2]; }
44984const MachOper* subI_mem_rRegNode::memory_operand() const { return _opnds[1]; }
44985const MachOper* subI_mem_immNode::memory_operand() const { return _opnds[1]; }
44986const MachOper* subL_rReg_memNode::memory_operand() const { return _opnds[2]; }
44987const MachOper* subL_mem_rRegNode::memory_operand() const { return _opnds[1]; }
44988const MachOper* subL_mem_immNode::memory_operand() const { return _opnds[1]; }
44989const MachOper* negI_memNode::memory_operand() const { return _opnds[1]; }
44990const MachOper* negL_memNode::memory_operand() const { return _opnds[1]; }
44991const MachOper* mulI_memNode::memory_operand() const { return _opnds[2]; }
44992const MachOper* mulI_mem_0Node::memory_operand() const { return _opnds[1]; }
44993const MachOper* mulI_mem_immNode::memory_operand() const { return _opnds[1]; }
44994const MachOper* mulL_memNode::memory_operand() const { return _opnds[2]; }
44995const MachOper* mulL_mem_0Node::memory_operand() const { return _opnds[1]; }
44996const MachOper* mulL_mem_immNode::memory_operand() const { return _opnds[1]; }
44997const MachOper* salI_mem_1Node::memory_operand() const { return _opnds[1]; }
44998const MachOper* salI_mem_immNode::memory_operand() const { return _opnds[1]; }
44999const MachOper* salI_mem_CLNode::memory_operand() const { return _opnds[1]; }
45000const MachOper* sarI_mem_1Node::memory_operand() const { return _opnds[1]; }
45001const MachOper* sarI_mem_immNode::memory_operand() const { return _opnds[1]; }
45002const MachOper* sarI_mem_CLNode::memory_operand() const { return _opnds[1]; }
45003const MachOper* shrI_mem_1Node::memory_operand() const { return _opnds[1]; }
45004const MachOper* shrI_mem_immNode::memory_operand() const { return _opnds[1]; }
45005const MachOper* shrI_mem_CLNode::memory_operand() const { return _opnds[1]; }
45006const MachOper* salL_mem_1Node::memory_operand() const { return _opnds[1]; }
45007const MachOper* salL_mem_immNode::memory_operand() const { return _opnds[1]; }
45008const MachOper* salL_mem_CLNode::memory_operand() const { return _opnds[1]; }
45009const MachOper* sarL_mem_1Node::memory_operand() const { return _opnds[1]; }
45010const MachOper* sarL_mem_immNode::memory_operand() const { return _opnds[1]; }
45011const MachOper* sarL_mem_CLNode::memory_operand() const { return _opnds[1]; }
45012const MachOper* shrL_mem_1Node::memory_operand() const { return _opnds[1]; }
45013const MachOper* shrL_mem_immNode::memory_operand() const { return _opnds[1]; }
45014const MachOper* shrL_mem_CLNode::memory_operand() const { return _opnds[1]; }
45015const MachOper* andI_rReg_memNode::memory_operand() const { return _opnds[2]; }
45016const MachOper* andI_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45017const MachOper* andB_mem_rRegNode::memory_operand() const { return _opnds[1]; }
45018const MachOper* andB_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
45019const MachOper* andI_mem_rRegNode::memory_operand() const { return _opnds[1]; }
45020const MachOper* andI_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
45021const MachOper* andI_mem_immNode::memory_operand() const { return _opnds[1]; }
45022const MachOper* andnI_rReg_rReg_memNode::memory_operand() const { return _opnds[3]; }
45023const MachOper* andnI_rReg_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45024const MachOper* blsiI_rReg_memNode::memory_operand() const { return _opnds[2]; }
45025const MachOper* blsiI_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45026const MachOper* blsmskI_rReg_memNode::memory_operand() const { return _opnds[1]; }
45027const MachOper* blsmskI_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45028const MachOper* blsrI_rReg_memNode::memory_operand() const { return _opnds[1]; }
45029const MachOper* blsrI_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45030const MachOper* orI_rReg_memNode::memory_operand() const { return _opnds[2]; }
45031const MachOper* orI_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45032const MachOper* orB_mem_rRegNode::memory_operand() const { return _opnds[1]; }
45033const MachOper* orB_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
45034const MachOper* orI_mem_rRegNode::memory_operand() const { return _opnds[1]; }
45035const MachOper* orI_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
45036const MachOper* orI_mem_immNode::memory_operand() const { return _opnds[1]; }
45037const MachOper* xorI_rReg_memNode::memory_operand() const { return _opnds[2]; }
45038const MachOper* xorI_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45039const MachOper* xorB_mem_rRegNode::memory_operand() const { return _opnds[1]; }
45040const MachOper* xorB_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
45041const MachOper* xorI_mem_rRegNode::memory_operand() const { return _opnds[1]; }
45042const MachOper* xorI_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
45043const MachOper* xorI_mem_immNode::memory_operand() const { return _opnds[1]; }
45044const MachOper* andL_rReg_memNode::memory_operand() const { return _opnds[2]; }
45045const MachOper* andL_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45046const MachOper* andL_mem_rRegNode::memory_operand() const { return _opnds[1]; }
45047const MachOper* andL_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
45048const MachOper* andL_mem_immNode::memory_operand() const { return _opnds[1]; }
45049const MachOper* btrL_mem_immNode::memory_operand() const { return _opnds[1]; }
45050const MachOper* andnL_rReg_rReg_memNode::memory_operand() const { return _opnds[3]; }
45051const MachOper* andnL_rReg_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45052const MachOper* blsiL_rReg_memNode::memory_operand() const { return _opnds[2]; }
45053const MachOper* blsiL_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45054const MachOper* blsmskL_rReg_memNode::memory_operand() const { return _opnds[1]; }
45055const MachOper* blsmskL_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45056const MachOper* blsrL_rReg_memNode::memory_operand() const { return _opnds[1]; }
45057const MachOper* blsrL_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45058const MachOper* orL_rReg_memNode::memory_operand() const { return _opnds[2]; }
45059const MachOper* orL_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45060const MachOper* orL_mem_rRegNode::memory_operand() const { return _opnds[1]; }
45061const MachOper* orL_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
45062const MachOper* orL_mem_immNode::memory_operand() const { return _opnds[1]; }
45063const MachOper* btsL_mem_immNode::memory_operand() const { return _opnds[1]; }
45064const MachOper* xorL_rReg_memNode::memory_operand() const { return _opnds[2]; }
45065const MachOper* xorL_rReg_mem_0Node::memory_operand() const { return _opnds[1]; }
45066const MachOper* xorL_mem_rRegNode::memory_operand() const { return _opnds[1]; }
45067const MachOper* xorL_mem_rReg_0Node::memory_operand() const { return _opnds[1]; }
45068const MachOper* xorL_mem_immNode::memory_operand() const { return _opnds[1]; }
45069const MachOper* cmpF_cc_memNode::memory_operand() const { return _opnds[2]; }
45070const MachOper* cmpF_cc_memCFNode::memory_operand() const { return _opnds[2]; }
45071const MachOper* cmpD_cc_memNode::memory_operand() const { return _opnds[2]; }
45072const MachOper* cmpD_cc_memCFNode::memory_operand() const { return _opnds[2]; }
45073const MachOper* cmpF_memNode::memory_operand() const { return _opnds[2]; }
45074const MachOper* cmpD_memNode::memory_operand() const { return _opnds[2]; }
45075const MachOper* convF2D_reg_memNode::memory_operand() const { return _opnds[1]; }
45076const MachOper* convD2F_reg_memNode::memory_operand() const { return _opnds[1]; }
45077const MachOper* convI2F_reg_memNode::memory_operand() const { return _opnds[1]; }
45078const MachOper* convI2D_reg_memNode::memory_operand() const { return _opnds[1]; }
45079const MachOper* convL2F_reg_memNode::memory_operand() const { return _opnds[1]; }
45080const MachOper* convL2D_reg_memNode::memory_operand() const { return _opnds[1]; }
45081const MachOper* convI2L_reg_mem_zexNode::memory_operand() const { return _opnds[1]; }
45082const MachOper* compI_rReg_memNode::memory_operand() const { return _opnds[2]; }
45083const MachOper* testI_reg_memNode::memory_operand() const { return _opnds[2]; }
45084const MachOper* testI_reg_mem_0Node::memory_operand() const { return _opnds[1]; }
45085const MachOper* compU_rReg_memNode::memory_operand() const { return _opnds[2]; }
45086const MachOper* compP_rReg_memNode::memory_operand() const { return _opnds[2]; }
45087const MachOper* compP_mem_rRegNode::memory_operand() const { return _opnds[2]; }
45088const MachOper* testP_memNode::memory_operand() const { return _opnds[1]; }
45089const MachOper* testP_mem_reg0Node::memory_operand() const { return _opnds[1]; }
45090const MachOper* compN_rReg_memNode::memory_operand() const { return _opnds[2]; }
45091const MachOper* compN_mem_immNode::memory_operand() const { return _opnds[2]; }
45092const MachOper* compN_mem_imm_klassNode::memory_operand() const { return _opnds[2]; }
45093const MachOper* testN_memNode::memory_operand() const { return _opnds[1]; }
45094const MachOper* testN_mem_reg0Node::memory_operand() const { return _opnds[1]; }
45095const MachOper* compL_rReg_memNode::memory_operand() const { return _opnds[2]; }
45096const MachOper* testL_reg_memNode::memory_operand() const { return _opnds[2]; }
45097const MachOper* testL_reg_mem_0Node::memory_operand() const { return _opnds[1]; }
45098const MachOper* testL_reg_mem2Node::memory_operand() const { return _opnds[2]; }
45099const MachOper* testL_reg_mem2_0Node::memory_operand() const { return _opnds[1]; }
45100const MachOper* compUL_rReg_memNode::memory_operand() const { return _opnds[2]; }
45101const MachOper* compB_mem_immNode::memory_operand() const { return _opnds[1]; }
45102const MachOper* testUB_mem_immNode::memory_operand() const { return _opnds[1]; }
45103const MachOper* testB_mem_immNode::memory_operand() const { return _opnds[1]; }
45104const MachOper* addF_memNode::memory_operand() const { return _opnds[2]; }
45105const MachOper* addF_mem_0Node::memory_operand() const { return _opnds[1]; }
45106const MachOper* addF_reg_memNode::memory_operand() const { return _opnds[2]; }
45107const MachOper* addF_reg_mem_0Node::memory_operand() const { return _opnds[1]; }
45108const MachOper* addD_memNode::memory_operand() const { return _opnds[2]; }
45109const MachOper* addD_mem_0Node::memory_operand() const { return _opnds[1]; }
45110const MachOper* addD_reg_memNode::memory_operand() const { return _opnds[2]; }
45111const MachOper* addD_reg_mem_0Node::memory_operand() const { return _opnds[1]; }
45112const MachOper* subF_memNode::memory_operand() const { return _opnds[2]; }
45113const MachOper* subF_reg_memNode::memory_operand() const { return _opnds[2]; }
45114const MachOper* subD_memNode::memory_operand() const { return _opnds[2]; }
45115const MachOper* subD_reg_memNode::memory_operand() const { return _opnds[2]; }
45116const MachOper* mulF_memNode::memory_operand() const { return _opnds[2]; }
45117const MachOper* mulF_mem_0Node::memory_operand() const { return _opnds[1]; }
45118const MachOper* mulF_reg_memNode::memory_operand() const { return _opnds[2]; }
45119const MachOper* mulF_reg_mem_0Node::memory_operand() const { return _opnds[1]; }
45120const MachOper* mulD_memNode::memory_operand() const { return _opnds[2]; }
45121const MachOper* mulD_mem_0Node::memory_operand() const { return _opnds[1]; }
45122const MachOper* mulD_reg_memNode::memory_operand() const { return _opnds[2]; }
45123const MachOper* mulD_reg_mem_0Node::memory_operand() const { return _opnds[1]; }
45124const MachOper* divF_memNode::memory_operand() const { return _opnds[2]; }
45125const MachOper* divF_reg_memNode::memory_operand() const { return _opnds[2]; }
45126const MachOper* divD_memNode::memory_operand() const { return _opnds[2]; }
45127const MachOper* divD_reg_memNode::memory_operand() const { return _opnds[2]; }
45128const MachOper* roundD_memNode::memory_operand() const { return _opnds[1]; }
45129const MachOper* vroundD_memNode::memory_operand() const { return _opnds[1]; }
45130const MachOper* vround8D_memNode::memory_operand() const { return _opnds[1]; }
45131const MachOper* loadVNode::memory_operand() const { return _opnds[1]; }
45132const MachOper* storeVNode::memory_operand() const { return _opnds[1]; }
45133const MachOper* gatherNode::memory_operand() const { return _opnds[1]; }
45134const MachOper* evgatherNode::memory_operand() const { return _opnds[1]; }
45135const MachOper* evgather_maskedNode::memory_operand() const { return _opnds[1]; }
45136const MachOper* scatterNode::memory_operand() const { return _opnds[1]; }
45137const MachOper* scatter_maskedNode::memory_operand() const { return _opnds[1]; }
45138const MachOper* ReplB_memNode::memory_operand() const { return _opnds[1]; }
45139const MachOper* ReplS_memNode::memory_operand() const { return _opnds[1]; }
45140const MachOper* ReplI_memNode::memory_operand() const { return _opnds[1]; }
45141const MachOper* ReplL_memNode::memory_operand() const { return _opnds[1]; }
45142const MachOper* ReplF_memNode::memory_operand() const { return _opnds[1]; }
45143const MachOper* ReplD_memNode::memory_operand() const { return _opnds[1]; }
45144const MachOper* vaddB_memNode::memory_operand() const { return _opnds[2]; }
45145const MachOper* vaddB_mem_0Node::memory_operand() const { return _opnds[1]; }
45146const MachOper* vaddS_memNode::memory_operand() const { return _opnds[2]; }
45147const MachOper* vaddS_mem_0Node::memory_operand() const { return _opnds[1]; }
45148const MachOper* vaddI_memNode::memory_operand() const { return _opnds[2]; }
45149const MachOper* vaddI_mem_0Node::memory_operand() const { return _opnds[1]; }
45150const MachOper* vaddL_memNode::memory_operand() const { return _opnds[2]; }
45151const MachOper* vaddL_mem_0Node::memory_operand() const { return _opnds[1]; }
45152const MachOper* vaddF_memNode::memory_operand() const { return _opnds[2]; }
45153const MachOper* vaddF_mem_0Node::memory_operand() const { return _opnds[1]; }
45154const MachOper* vaddD_memNode::memory_operand() const { return _opnds[2]; }
45155const MachOper* vaddD_mem_0Node::memory_operand() const { return _opnds[1]; }
45156const MachOper* vsubB_memNode::memory_operand() const { return _opnds[2]; }
45157const MachOper* vsubS_memNode::memory_operand() const { return _opnds[2]; }
45158const MachOper* vsubI_memNode::memory_operand() const { return _opnds[2]; }
45159const MachOper* vsubL_memNode::memory_operand() const { return _opnds[2]; }
45160const MachOper* vsubF_memNode::memory_operand() const { return _opnds[2]; }
45161const MachOper* vsubD_memNode::memory_operand() const { return _opnds[2]; }
45162const MachOper* vmulS_memNode::memory_operand() const { return _opnds[2]; }
45163const MachOper* vmulS_mem_0Node::memory_operand() const { return _opnds[1]; }
45164const MachOper* vmulI_memNode::memory_operand() const { return _opnds[2]; }
45165const MachOper* vmulI_mem_0Node::memory_operand() const { return _opnds[1]; }
45166const MachOper* vmulL_memNode::memory_operand() const { return _opnds[2]; }
45167const MachOper* vmulL_mem_0Node::memory_operand() const { return _opnds[1]; }
45168const MachOper* vmulF_memNode::memory_operand() const { return _opnds[2]; }
45169const MachOper* vmulF_mem_0Node::memory_operand() const { return _opnds[1]; }
45170const MachOper* vmulD_memNode::memory_operand() const { return _opnds[2]; }
45171const MachOper* vmulD_mem_0Node::memory_operand() const { return _opnds[1]; }
45172const MachOper* vdivF_memNode::memory_operand() const { return _opnds[2]; }
45173const MachOper* vdivD_memNode::memory_operand() const { return _opnds[2]; }
45174const MachOper* vsqrtF_memNode::memory_operand() const { return _opnds[1]; }
45175const MachOper* vsqrtD_memNode::memory_operand() const { return _opnds[1]; }
45176const MachOper* vand_memNode::memory_operand() const { return _opnds[2]; }
45177const MachOper* vand_mem_0Node::memory_operand() const { return _opnds[1]; }
45178const MachOper* vor_memNode::memory_operand() const { return _opnds[2]; }
45179const MachOper* vor_mem_0Node::memory_operand() const { return _opnds[1]; }
45180const MachOper* vxor_memNode::memory_operand() const { return _opnds[2]; }
45181const MachOper* vxor_mem_0Node::memory_operand() const { return _opnds[1]; }
45182const MachOper* vfmaF_memNode::memory_operand() const { return _opnds[3]; }
45183const MachOper* vfmaD_memNode::memory_operand() const { return _opnds[3]; }
45184const MachOper* vpternlog_memNode::memory_operand() const { return _opnds[3]; }
45185const MachOper* vmasked_load64Node::memory_operand() const { return _opnds[1]; }
45186const MachOper* vmasked_store64Node::memory_operand() const { return _opnds[1]; }
45187const MachOper* vadd_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45188const MachOper* vadd_mem_masked_0Node::memory_operand() const { return _opnds[2]; }
45189const MachOper* vadd_mem_masked_1Node::memory_operand() const { return _opnds[2]; }
45190const MachOper* vadd_mem_masked_2Node::memory_operand() const { return _opnds[2]; }
45191const MachOper* vadd_mem_masked_3Node::memory_operand() const { return _opnds[2]; }
45192const MachOper* vadd_mem_masked_4Node::memory_operand() const { return _opnds[2]; }
45193const MachOper* vxor_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45194const MachOper* vor_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45195const MachOper* vand_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45196const MachOper* vsub_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45197const MachOper* vsub_mem_masked_0Node::memory_operand() const { return _opnds[2]; }
45198const MachOper* vsub_mem_masked_1Node::memory_operand() const { return _opnds[2]; }
45199const MachOper* vsub_mem_masked_2Node::memory_operand() const { return _opnds[2]; }
45200const MachOper* vsub_mem_masked_3Node::memory_operand() const { return _opnds[2]; }
45201const MachOper* vsub_mem_masked_4Node::memory_operand() const { return _opnds[2]; }
45202const MachOper* vmul_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45203const MachOper* vmul_mem_masked_0Node::memory_operand() const { return _opnds[2]; }
45204const MachOper* vmul_mem_masked_1Node::memory_operand() const { return _opnds[2]; }
45205const MachOper* vmul_mem_masked_2Node::memory_operand() const { return _opnds[2]; }
45206const MachOper* vmul_mem_masked_3Node::memory_operand() const { return _opnds[2]; }
45207const MachOper* vdiv_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45208const MachOper* vdiv_mem_masked_0Node::memory_operand() const { return _opnds[2]; }
45209const MachOper* vlshift_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45210const MachOper* vlshift_mem_masked_0Node::memory_operand() const { return _opnds[2]; }
45211const MachOper* vlshift_mem_masked_1Node::memory_operand() const { return _opnds[2]; }
45212const MachOper* vrshift_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45213const MachOper* vrshift_mem_masked_0Node::memory_operand() const { return _opnds[2]; }
45214const MachOper* vrshift_mem_masked_1Node::memory_operand() const { return _opnds[2]; }
45215const MachOper* vurshift_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45216const MachOper* vurshift_mem_masked_0Node::memory_operand() const { return _opnds[2]; }
45217const MachOper* vurshift_mem_masked_1Node::memory_operand() const { return _opnds[2]; }
45218const MachOper* vmaxv_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45219const MachOper* vminv_mem_maskedNode::memory_operand() const { return _opnds[2]; }
45220const MachOper* vfma_mem_maskedNode::memory_operand() const { return _opnds[3]; }
45221const MachOper* vfma_mem_masked_0Node::memory_operand() const { return _opnds[3]; }
45222const MachOper* compareAndSwapP_shenandoahNode::memory_operand() const { return _opnds[1]; }
45223const MachOper* compareAndSwapP_shenandoah_0Node::memory_operand() const { return _opnds[1]; }
45224const MachOper* compareAndSwapN_shenandoahNode::memory_operand() const { return _opnds[1]; }
45225const MachOper* compareAndSwapN_shenandoah_0Node::memory_operand() const { return _opnds[1]; }
45226const MachOper* compareAndExchangeN_shenandoahNode::memory_operand() const { return _opnds[1]; }
45227const MachOper* compareAndExchangeP_shenandoahNode::memory_operand() const { return _opnds[1]; }
45228const MachOper* zLoadPNode::memory_operand() const { return _opnds[1]; }
45229const MachOper* zCompareAndExchangePNode::memory_operand() const { return _opnds[1]; }
45230const MachOper* zCompareAndSwapPNode::memory_operand() const { return _opnds[1]; }
45231const MachOper* zCompareAndSwapP_0Node::memory_operand() const { return _opnds[1]; }
45232const MachOper* zXChgPNode::memory_operand() const { return _opnds[1]; }


45235const bool Matcher::has_match_rule(int opcode) {
assert(_last_machine_leaf < opcode && opcode < _last_opcode, "opcode in range")do { if (!(_last_machine_leaf < opcode && opcode <
 _last_opcode)) { (*g_assert_poison) = 'X';; report_vm_error(
"ad_x86.cpp", 45235, "assert(" "_last_machine_leaf < opcode && opcode < _last_opcode"
 ") failed", "opcode in range"); ::breakpoint(); } } while (0
);
return _hasMatchRule[opcode];
45238}

45240const bool Matcher::_hasMatchRule[_last_opcode] = {
  false,  // Node
  false,  // Set
  false,  // RegN
  false,  // RegI
  false,  // RegP
  false,  // RegF
  false,  // RegD
  false,  // RegL
  false,  // VecA
  false,  // VecS
  false,  // VecD
  false,  // VecX
  false,  // VecY
  false,  // VecZ
  false,  // RegVectMask
  false,  // RegFlags
  false,  // _last_machine_leaf
  true ,  // AbsD
  true ,  // AbsF
  true ,  // AbsI
  true ,  // AbsL
  true ,  // AddD
  true ,  // AddF
  true ,  // AddI
  true ,  // AddL
  true ,  // AddP
  false,  // Allocate
  false,  // AllocateArray
  true ,  // AndI
  true ,  // AndL
  false,  // ArrayCopy
  true ,  // AryEq
  false,  // AtanD
  true ,  // Binary
  false,  // Blackhole
  true ,  // Bool
  false,  // BoxLock
  true ,  // ReverseBytesI
  true ,  // ReverseBytesL
  true ,  // ReverseBytesUS
  true ,  // ReverseBytesS
  false,  // CProj
  true ,  // CacheWB
  true ,  // CacheWBPreSync
  true ,  // CacheWBPostSync
  true ,  // CallDynamicJava
  false,  // CallJava
  true ,  // CallLeaf
  true ,  // CallLeafNoFP
  true ,  // CallLeafVector
  true ,  // CallRuntime
  true ,  // CallNative
  true ,  // CallStaticJava
  true ,  // CastDD
  true ,  // CastFF
  true ,  // CastII
  true ,  // CastLL
  true ,  // CastVV
  true ,  // CastX2P
  true ,  // CastP2X
  true ,  // CastPP
  false,  // Catch
  false,  // CatchProj
  true ,  // CheckCastPP
  true ,  // ClearArray
  false,  // ConstraintCast
  true ,  // CMoveD
  true ,  // CMoveVD
  true ,  // CMoveF
  true ,  // CMoveVF
  true ,  // CMoveI
  true ,  // CMoveL
  true ,  // CMoveP
  true ,  // CMoveN
  true ,  // CmpN
  true ,  // CmpD
  true ,  // CmpD3
  true ,  // CmpF
  true ,  // CmpF3
  true ,  // CmpI
  true ,  // CmpL
  true ,  // CmpL3
  true ,  // CmpLTMask
  true ,  // CmpP
  true ,  // CmpU
  true ,  // CmpUL
  true ,  // CompareAndSwapB
  true ,  // CompareAndSwapS
  true ,  // CompareAndSwapI
  true ,  // CompareAndSwapL
  true ,  // CompareAndSwapP
  true ,  // CompareAndSwapN
  true ,  // WeakCompareAndSwapB
  true ,  // WeakCompareAndSwapS
  true ,  // WeakCompareAndSwapI
  true ,  // WeakCompareAndSwapL
  true ,  // WeakCompareAndSwapP
  true ,  // WeakCompareAndSwapN
  true ,  // CompareAndExchangeB
  true ,  // CompareAndExchangeS
  true ,  // CompareAndExchangeI
  true ,  // CompareAndExchangeL
  true ,  // CompareAndExchangeP
  true ,  // CompareAndExchangeN
  true ,  // GetAndAddB
  true ,  // GetAndAddS
  true ,  // GetAndAddI
  true ,  // GetAndAddL
  true ,  // GetAndSetB
  true ,  // GetAndSetS
  true ,  // GetAndSetI
  true ,  // GetAndSetL
  true ,  // GetAndSetP
  true ,  // GetAndSetN
  false,  // Con
  true ,  // ConN
  true ,  // ConNKlass
  true ,  // ConD
  true ,  // ConF
  true ,  // ConI
  true ,  // ConL
  true ,  // ConP
  true ,  // Conv2B
  true ,  // ConvD2F
  true ,  // ConvD2I
  true ,  // ConvD2L
  true ,  // ConvF2D
  true ,  // ConvF2I
  true ,  // ConvF2L
  true ,  // ConvI2D
  true ,  // ConvI2F
  true ,  // ConvI2L
  true ,  // ConvL2D
  true ,  // ConvL2F
  true ,  // ConvL2I
  false,  // CountedLoop
  true ,  // CountedLoopEnd
  false,  // OuterStripMinedLoop
  false,  // OuterStripMinedLoopEnd
  false,  // LongCountedLoop
  false,  // LongCountedLoopEnd
  true ,  // CountLeadingZerosI
  true ,  // CountLeadingZerosL
  true ,  // CountTrailingZerosI
  true ,  // CountTrailingZerosL
  true ,  // CreateEx
  true ,  // DecodeN
  true ,  // DecodeNKlass
  true ,  // DivD
  true ,  // DivF
  true ,  // DivI
  true ,  // DivL
  false,  // DivMod
  true ,  // DivModI
  true ,  // DivModL
  true ,  // EncodeISOArray
  true ,  // EncodeP
  true ,  // EncodePKlass
  true ,  // FastLock
  true ,  // FastUnlock
  true ,  // FmaD
  true ,  // FmaF
  true ,  // Goto
  true ,  // Halt
  true ,  // HasNegatives
  true ,  // If
  false,  // RangeCheck
  false,  // IfFalse
  false,  // IfTrue
  false,  // Initialize
  false,  // JProj
  true ,  // Jump
  false,  // JumpProj
  true ,  // LShiftI
  true ,  // LShiftL
  true ,  // LoadB
  true ,  // LoadUB
  true ,  // LoadUS
  true ,  // LoadD
  false,  // LoadD_unaligned
  true ,  // LoadF
  true ,  // LoadI
  true ,  // LoadKlass
  true ,  // LoadNKlass
  true ,  // LoadL
  false,  // LoadL_unaligned
  true ,  // LoadPLocked
  true ,  // LoadP
  true ,  // LoadN
  true ,  // LoadRange
  true ,  // LoadS
  false,  // Lock
  false,  // Loop
  false,  // LoopLimit
  false,  // Mach
  false,  // MachNullCheck
  false,  // MachProj
  true ,  // MulAddS2I
  true ,  // MaxI
  false,  // MaxL
  true ,  // MaxD
  true ,  // MaxF
  true ,  // MemBarAcquire
  true ,  // LoadFence
  true ,  // SetVectMaskI
  true ,  // MemBarAcquireLock
  false,  // MemBarCPUOrder
  true ,  // MemBarRelease
  true ,  // StoreFence
  true ,  // StoreStoreFence
  true ,  // MemBarReleaseLock
  true ,  // MemBarVolatile
  true ,  // MemBarStoreStore
  false,  // MergeMem
  true ,  // MinI
  false,  // MinL
  true ,  // MinF
  true ,  // MinD
  false,  // ModD
  false,  // ModF
  true ,  // ModI
  true ,  // ModL
  true ,  // MoveI2F
  true ,  // MoveF2I
  true ,  // MoveL2D
  true ,  // MoveD2L
  true ,  // MulD
  true ,  // MulF
  true ,  // MulHiL
  true ,  // UMulHiL
  true ,  // MulI
  true ,  // MulL
  false,  // Multi
  true ,  // NegI
  true ,  // NegL
  true ,  // NegD
  true ,  // NegF
  false,  // NeverBranch
  true ,  // OnSpinWait
  false,  // Opaque1
  false,  // OpaqueLoopInit
  false,  // OpaqueLoopStride
  false,  // Opaque2
  false,  // Opaque3
  false,  // Opaque4
  false,  // ProfileBoolean
  true ,  // OrI
  true ,  // OrL
  true ,  // OverflowAddI
  true ,  // OverflowSubI
  true ,  // OverflowMulI
  true ,  // OverflowAddL
  true ,  // OverflowSubL
  true ,  // OverflowMulL
  false,  // PCTable
  false,  // Parm
  true ,  // PartialSubtypeCheck
  false,  // SubTypeCheck
  false,  // Phi
  true ,  // PopCountI
  true ,  // PopCountL
  true ,  // PopCountVI
  true ,  // PrefetchAllocation
  false,  // Proj
  true ,  // RShiftI
  true ,  // RShiftL
  false,  // Region
  true ,  // Rethrow
  true ,  // Return
  false,  // Root
  false,  // RoundDouble
  true ,  // RoundDoubleMode
  true ,  // RoundDoubleModeV
  false,  // RoundFloat
  true ,  // RotateLeft
  true ,  // RotateLeftV
  true ,  // RotateRight
  true ,  // RotateRightV
  true ,  // SafePoint
  false,  // SafePointScalarObject
  true ,  // ShenandoahCompareAndExchangeP
  true ,  // ShenandoahCompareAndExchangeN
  true ,  // ShenandoahCompareAndSwapN
  true ,  // ShenandoahCompareAndSwapP
  true ,  // ShenandoahWeakCompareAndSwapN
  true ,  // ShenandoahWeakCompareAndSwapP
  false,  // ShenandoahIUBarrier
  false,  // ShenandoahLoadReferenceBarrier
  false,  // SCMemProj
  true ,  // CopySignD
  true ,  // CopySignF
  true ,  // SignumD
  true ,  // SignumF
  true ,  // SqrtD
  true ,  // SqrtF
  false,  // Start
  false,  // StartOSR
  true ,  // StoreB
  true ,  // StoreC
  true ,  // StoreCM
  true ,  // StorePConditional
  true ,  // StoreIConditional
  true ,  // StoreLConditional
  true ,  // StoreD
  true ,  // StoreF
  true ,  // StoreI
  true ,  // StoreL
  true ,  // StoreP
  true ,  // StoreN
  true ,  // StoreNKlass
  true ,  // StrComp
  true ,  // StrCompressedCopy
  true ,  // StrEquals
  true ,  // StrIndexOf
  true ,  // StrIndexOfChar
  true ,  // StrInflatedCopy
  true ,  // SubD
  true ,  // SubF
  true ,  // SubI
  true ,  // SubL
  true ,  // TailCall
  true ,  // TailJump
  true ,  // MacroLogicV
  true ,  // ThreadLocal
  false,  // Unlock
  false,  // URShiftB
  false,  // URShiftS
  true ,  // URShiftI
  true ,  // URShiftL
  true ,  // XorI
  true ,  // XorL
  false,  // Vector
  true ,  // AddVB
  true ,  // AddVS
  true ,  // AddVI
  true ,  // AddReductionVI
  true ,  // AddVL
  true ,  // AddReductionVL
  true ,  // AddVF
  true ,  // AddReductionVF
  true ,  // AddVD
  true ,  // AddReductionVD
  true ,  // SubVB
  true ,  // SubVS
  true ,  // SubVI
  true ,  // SubVL
  true ,  // SubVF
  true ,  // SubVD
  true ,  // MulVB
  true ,  // MulVS
  true ,  // MulVI
  true ,  // MulReductionVI
  true ,  // MulVL
  true ,  // MulReductionVL
  true ,  // MulVF
  true ,  // MulReductionVF
  true ,  // MulVD
  true ,  // MulReductionVD
  true ,  // MulAddVS2VI
  true ,  // FmaVD
  true ,  // FmaVF
  true ,  // DivVF
  true ,  // DivVD
  true ,  // AbsVB
  true ,  // AbsVS
  true ,  // AbsVI
  true ,  // AbsVL
  true ,  // AbsVF
  true ,  // AbsVD
  false,  // NegVI
  true ,  // NegVF
  true ,  // NegVD
  true ,  // SqrtVD
  true ,  // SqrtVF
  true ,  // LShiftCntV
  true ,  // RShiftCntV
  true ,  // LShiftVB
  true ,  // LShiftVS
  true ,  // LShiftVI
  true ,  // LShiftVL
  true ,  // RShiftVB
  true ,  // RShiftVS
  true ,  // RShiftVI
  true ,  // RShiftVL
  true ,  // URShiftVB
  true ,  // URShiftVS
  true ,  // URShiftVI
  true ,  // URShiftVL
  true ,  // AndV
  true ,  // AndReductionV
  true ,  // OrV
  true ,  // OrReductionV
  true ,  // XorV
  true ,  // XorReductionV
  true ,  // MinV
  true ,  // MaxV
  true ,  // MinReductionV
  true ,  // MaxReductionV
  true ,  // LoadVector
  true ,  // LoadVectorGather
  true ,  // LoadVectorGatherMasked
  true ,  // StoreVector
  true ,  // StoreVectorScatter
  true ,  // StoreVectorScatterMasked
  true ,  // LoadVectorMasked
  true ,  // StoreVectorMasked
  true ,  // VectorCmpMasked
  true ,  // VectorMaskGen
  false,  // VectorMaskOp
  true ,  // VectorMaskTrueCount
  true ,  // VectorMaskFirstTrue
  true ,  // VectorMaskLastTrue
  true ,  // VectorMaskToLong
  true ,  // VectorLongToMask
  false,  // Pack
  false,  // PackB
  false,  // PackS
  false,  // PackI
  false,  // PackL
  false,  // PackF
  false,  // PackD
  false,  // Pack2L
  false,  // Pack2D
  true ,  // ReplicateB
  true ,  // ReplicateS
  true ,  // ReplicateI
  true ,  // ReplicateL
  true ,  // ReplicateF
  true ,  // ReplicateD
  false,  // Extract
  true ,  // ExtractB
  false,  // ExtractUB
  false,  // ExtractC
  true ,  // ExtractS
  true ,  // ExtractI
  true ,  // ExtractL
  true ,  // ExtractF
  true ,  // ExtractD
  false,  // Digit
  false,  // LowerCase
  false,  // UpperCase
  false,  // Whitespace
  false,  // VectorBox
  false,  // VectorBoxAllocate
  false,  // VectorUnbox
  false,  // VectorMaskWrapper
  true ,  // VectorMaskCmp
  true ,  // VectorMaskCast
  true ,  // VectorTest
  true ,  // VectorBlend
  true ,  // VectorRearrange
  true ,  // VectorLoadMask
  true ,  // VectorLoadShuffle
  true ,  // VectorLoadConst
  true ,  // VectorStoreMask
  true ,  // VectorReinterpret
  false,  // VectorCast
  true ,  // VectorCastB2X
  true ,  // VectorCastS2X
  true ,  // VectorCastI2X
  true ,  // VectorCastL2X
  true ,  // VectorCastF2X
  true ,  // VectorCastD2X
  true ,  // VectorInsert
  true ,  // MaskAll
  true ,  // AndVMask
  true ,  // OrVMask
  true    // XorVMask
45709};


45712int Compile::sync_stack_slots() const { return 2; }

45714uint Matcher::stack_alignment_in_bytes() { return StackAlignmentInBytes; }

45716OptoReg::Name Matcher::return_addr() const { return OptoReg::stack2reg(- 2 +
            align_up((Compile::current()->in_preserve_stack_slots() +
                      Compile::current()->fixed_slots()),
                     stack_alignment_in_slots())); }

45721uint Compile::varargs_C_out_slots_killed() const { return frame::arg_reg_save_area_bytes/BytesPerInt; }

45723OptoRegPair Matcher::return_value(uint ideal_reg) {

45725#line 2834 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  assert(ideal_reg >= Op_RegI && ideal_reg <= Op_RegL,do { if (!(ideal_reg >= Op_RegI && ideal_reg <=
 Op_RegL)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2836, "assert(" "ideal_reg >= Op_RegI && ideal_reg <= Op_RegL"
 ") failed", "only return normal values"); ::breakpoint(); } }
 while (0)
         "only return normal values")do { if (!(ideal_reg >= Op_RegI && ideal_reg <=
 Op_RegL)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2836, "assert(" "ideal_reg >= Op_RegI && ideal_reg <= Op_RegL"
 ") failed", "only return normal values"); ::breakpoint(); } }
 while (0);

  static const int lo[Op_RegL + 1] = {
    0,
    0,
    RAX_num,  // Op_RegN
    RAX_num,  // Op_RegI
    RAX_num,  // Op_RegP
    XMM0_num, // Op_RegF
    XMM0_num, // Op_RegD
    RAX_num   // Op_RegL
  };
  static const int hi[Op_RegL + 1] = {
    0,
    0,
    OptoReg::Bad, // Op_RegN
    OptoReg::Bad, // Op_RegI
    RAX_H_num,    // Op_RegP
    OptoReg::Bad, // Op_RegF
    XMM0b_num,    // Op_RegD
    RAX_H_num     // Op_RegL
  };
  // Excluded flags and vector registers.
  assert(ARRAY_SIZE(hi) == _last_machine_leaf - 8, "missing type")do { if (!(sizeof(array_size_impl(hi)) == _last_machine_leaf -
 8)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2859, "assert(" "sizeof(array_size_impl(hi)) == _last_machine_leaf - 8"
 ") failed", "missing type"); ::breakpoint(); } } while (0);
  return OptoRegPair(hi[ideal_reg], lo[ideal_reg]);

45754#line 45754 "ad_x86.cpp"

45756}

45758OptoRegPair Matcher::c_return_value(uint ideal_reg) {

45760#line 2834 "/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"

  assert(ideal_reg >= Op_RegI && ideal_reg <= Op_RegL,do { if (!(ideal_reg >= Op_RegI && ideal_reg <=
 Op_RegL)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2836, "assert(" "ideal_reg >= Op_RegI && ideal_reg <= Op_RegL"
 ") failed", "only return normal values"); ::breakpoint(); } }
 while (0)
         "only return normal values")do { if (!(ideal_reg >= Op_RegI && ideal_reg <=
 Op_RegL)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2836, "assert(" "ideal_reg >= Op_RegI && ideal_reg <= Op_RegL"
 ") failed", "only return normal values"); ::breakpoint(); } }
 while (0);

  static const int lo[Op_RegL + 1] = {
    0,
    0,
    RAX_num,  // Op_RegN
    RAX_num,  // Op_RegI
    RAX_num,  // Op_RegP
    XMM0_num, // Op_RegF
    XMM0_num, // Op_RegD
    RAX_num   // Op_RegL
  };
  static const int hi[Op_RegL + 1] = {
    0,
    0,
    OptoReg::Bad, // Op_RegN
    OptoReg::Bad, // Op_RegI
    RAX_H_num,    // Op_RegP
    OptoReg::Bad, // Op_RegF
    XMM0b_num,    // Op_RegD
    RAX_H_num     // Op_RegL
  };
  // Excluded flags and vector registers.
  assert(ARRAY_SIZE(hi) == _last_machine_leaf - 8, "missing type")do { if (!(sizeof(array_size_impl(hi)) == _last_machine_leaf -
 8)) { (*g_assert_poison) = 'X';; report_vm_error("/home/daniel/Projects/java/jdk/src/hotspot/cpu/x86/x86_64.ad"
, 2859, "assert(" "sizeof(array_size_impl(hi)) == _last_machine_leaf - 8"
 ") failed", "missing type"); ::breakpoint(); } } while (0);
  return OptoRegPair(hi[ideal_reg], lo[ideal_reg]);

45789#line 45789 "ad_x86.cpp"

45791}

45793OptoReg::Name Matcher::inline_cache_reg() { return OptoReg::Name(RAX_num); }

45795int Matcher::inline_cache_reg_encode() { return _regEncode[inline_cache_reg()]; }

45797OptoReg::Name Matcher::interpreter_frame_pointer_reg() { return OptoReg::Name(RBP_num); }

45799OptoReg::Name Matcher::c_frame_pointer() const { return OptoReg::Name(RSP_num); }

45801// Number of callee-save + always-save registers
45802int  Matcher::number_of_saved_registers() {
return 0;
45804};

45806bool Compile::needs_deep_clone_jvms() { return false; }

45808// Check consistency of C++ compilation with ADLC options:
45809// Check adlc -DLINUX=1
45810#ifndef LINUX1
45811#  error "LINUX must be defined"
45812#endif // LINUX
45813// Check adlc -D_GNU_SOURCE=1
45814#ifndef _GNU_SOURCE1
45815#  error "_GNU_SOURCE must be defined"
45816#endif // _GNU_SOURCE
45817// Check adlc -DAMD64=1
45818#ifndef AMD641
45819#  error "AMD64 must be defined"
45820#endif // AMD64
45821// Check adlc -D_LP64=1
45822#ifndef _LP641
45823#  error "_LP64 must be defined"
45824#endif // _LP64